- 24 May, 2015 37 commits
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Alexander Usyskin authored
We can receive mtu with one call now, no need to store it. Signed-off-by:
Alexander Usyskin <alexander.usyskin@intel.com> Signed-off-by:
Tomas Winkler <tomas.winkler@intel.com> Signed-off-by:
Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Alexander Usyskin authored
This should be used for debug only. The feaure is gated by "allow_fixed_address" control exposed in debugfs. Signed-off-by:
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Alexander Usyskin authored
Fixed address is simplified FW client that doesn't require connection and doesn't support flow control. So it can be only one host client per fixed FW client. Fixed client access is available only for drivers on mei bus, connection from user-space is blocked. Signed-off-by:
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Alexander Usyskin authored
For ME clients that use single receiving buffer the driver tracks credentials on mei_me_clients structure for all connections. The driver needs to book keep the shared resource correctly and track the connections, particularly the credit has to be cleaned when there is no active connection to a particular me client. This solves issue when subsequent connection will not get an ill impression that it can write. We add active connection counter the particular ME client and when the counter reach zero, we clear the credits. Signed-off-by:
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Alexander Usyskin authored
Keep a pointer to associated me client in the host client object to eliminate me client searches. Check if the me client is active in the firmware by checking if its is linked on the me clients list Add accessors for the me client properties from host client. Signed-off-by:
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Tomas Winkler authored
Simplify connect state machine by changing the logic around Connection request in progress - only check if we have a callback in relevant queue. Extract common code into mei_cl_send_connect() function Signed-off-by:
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Tomas Winkler authored
Split disconnected state into two parts first reception disconnect response from the firmware and second actually setting of disconnected state. Book keeping data are needed for processing and after firmware disconnected the client and are cleaned when setting the disconnected state in mei_cl_set_disconneted() function. Add mei_cl_send_disconnect to reduce code duplication. Signed-off-by:
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Tomas Winkler authored
HW has to be in known state before the initialisation sequence is started. The polling step for settling aliveness was set to 200ms while in practise this can be done in up to 30msecs. Cc: <stable@vger.kernel.org> #3.18+ Signed-off-by:
Barak Yoresh <barak.yoresh@intel.com> Signed-off-by:
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Pratik Patel authored
This driver manages Qualcomm CoreSight Replicator device, which resides on the AMBA bus. Replicator has been made programmable to allow software to turn of the replicator branch to sink that is not being used. This avoids trace traffic to the unused/non-current sink from causing back pressure that results in overflows at the source. Signed-off-by:
Pratik Patel <pratikp@codeaurora.org> Signed-off-by:
Ivan T. Ivanov <ivan.ivanov@linaro.org> Signed-off-by:
Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by:
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Pankaj Dubey authored
fixes obvious typo in of_coresight.c %s/non-configuable/non-configurable Signed-off-by:
Pankaj Dubey <pankaj.dubey@samsung.com> Signed-off-by:
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Linus Walleij authored
Put in a blurb in the device tree bindings indicating that coresight blocks may have an optional ATCLK. Signed-off-by:
Linus Walleij <linus.walleij@linaro.org> Signed-off-by:
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Linus Walleij authored
As can be seen from the datasheet of the CoreSight Components, DDI0314 table A-4 the funnel has a clock signal apart from the AHB interconnect ("amba_pclk", that we're already handling) called ATCLK, ARM Trace Clock, that SoC implementers may provide from an entirely different clock source. So to model this correctly create an optional path for handling ATCLK alongside the PCLK so we don't break old platforms that only define PCLK ("amba_pclk") but still makes it possible for SoCs that have both clock signals (such as the DB8500) to fetch and prepare/enable/disable/ unprepare both clocks. The ATCLK is enabled and disabled using the runtime PM callbacks. As the replicator is a platform device, the code is a bit different from the other CoreSight components and the bus core does not activate runtime PM by default, so we need a few extra calls. Reviewed-by:Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by:
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Linus Walleij authored
As can be seen from the datasheet of the CoreSight Components, DDI0314 table A-6 the funnel has a clock signal apart from the AHB interconnect ("amba_pclk", that we're already handling) called ATCLK, ARM Trace Clock, that SoC implementers may provide from an entirely different clock source. So to model this correctly create an optional path for handling ATCLK alongside the PCLK so we don't break old platforms that only define PCLK ("amba_pclk") but still makes it possible for SoCs that have both clock signals (such as the DB8500) to fetch and prepare/enable/disable/ unprepare both clocks. The ATCLK is enabled and disabled using the runtime PM callbacks. Reviewed-by: -
Linus Walleij authored
As can be seen from the datasheet of the CoreSight Components, DDI0314 table A-8 the ETB has a clock signal apart from the AHB interconnect ("amba_pclk", that we're already handling) called ATCLK, ARM Trace Clock, that SoC implementers may provide from an entirely different clock source. So to model this correctly create an optional path for handling ATCLK alongside the PCLK so we don't break old platforms that only define PCLK ("amba_pclk") but still makes it possible for SoCs that have both clock signals (such as the DB8500) to fetch and prepare/enable/disable/ unprepare both clocks. The ATCLK is enabled and disabled using the runtime PM callbacks. Reviewed-by: -
Linus Walleij authored
As can be seen from the datasheet of the CoreSight Components, DDI0314H page A-19 the TPIU has a clock signal apart from the AHB interconnect ("amba_pclk", that we're already handling) called ATCLK, ARM Trace Clock, that SoC implementers may provide from an entirely different clock source. So to model this correctly create an optional path for handling ATCLK alongside the PCLK so we don't break old platforms that only define PCLK ("amba_pclk") but still makes it possible for SoCs that have both clock signals (such as the DB8500) to fetch and prepare/enable/disable/ unprepare both clocks in conjunction. The ATCLK is enabled and disabled using the runtime PM callbacks. Reviewed-by: -
Linus Walleij authored
As can be seen from the datasheet of the CoreSight Components, DDI0401C A.1.1 the ETM has a clock signal apart from the AHB interconnect ("amba_pclk", that we're already handling) called ATCLK, ARM Trace Clock, that SoC implementers may provide from an entirely different clock source. So to model this correctly create an optional path for handling ATCLK alongside the PCLK so we don't break old platforms that only define PCLK ("amba_pclk") but still makes it possible for SoCs that have both clock signals (such as the DB8500) to fetch and prepare/enable/disable/ unprepare both clocks. The ATCLK is enabled and disabled using the runtime PM callbacks. Reviewed-by: -
Linus Walleij authored
This uses runtime PM to manage the PCLK ("amba_pclk") instead of screwing around with the framework by going in and taking a copy from the amba device. The amba bus core will unprepare and disable the clock when the device is unused when CONFIG_PM is selected, else the clock will be always on. Prior to this patch, as the AMBA primecell bus code enables the PCLK, it would be left on after probe as the clk_prepare_enable() and clk_disable_unprepare() was called and thus just increase and decreas the refcount by one, without it reaching zero and actually disabling the clock. Now the runtime PM callbacks will make sure the PCLK is properly disabled after probe. Reviewed-by: -
Linus Walleij authored
This uses runtime PM to manage the PCLK ("amba_pclk") instead of screwing around with the framework by going in and taking a copy from the amba device. The amba bus core will unprepare and disable the clock when the device is unused when CONFIG_PM is selected, else the clock will be always on. Prior to this patch, as the AMBA primecell bus code enables the PCLK, it would be left on after probe as clk_disable_unprepare() was not called. Now the runtime PM callbacks will make sure the PCLK is properly disabled after probe. Reviewed-by: -
Linus Walleij authored
This uses runtime PM to manage the PCLK ("amba_pclk") instead of screwing around with the framework by going in and taking a copy from the amba device. The amba bus core will unprepare and disable the clock when the device is unused when CONFIG_PM is selected, else the clock will be always on. Prior to this patch, as the AMBA primecell bus code enables the PCLK, it would be left on after probe as the clk_prepare_enable() and clk_disable_unprepare() was called and thus just increase and decreas the refcount by one, without it reaching zero and actually disabling the clock. Now the runtime PM callbacks will make sure the PCLK is properly disabled after probe. Reviewed-by: -
Linus Walleij authored
This uses runtime PM to manage the PCLK ("amba_pclk") instead of screwing around with the framework by going in and taking a copy from the amba device. The amba bus core will unprepare and disable the clock when the device is unused when CONFIG_PM is selected, else the clock will be always on. Prior to this patch, as the AMBA primecell bus code enables the PCLK, it would be left on after probe as the clk_prepare_enable() and clk_disable_unprepare() was called and thus just increase and decreas the refcount by one, without it reaching zero and actually disabling the clock. Now the runtime PM callbacks will make sure the PCLK is properly disabled after probe. Reviewed-by: -
Linus Walleij authored
This uses runtime PM to manage the PCLK ("amba_pclk") instead of screwing around with the framework by going in and taking a copy from the amba device. The amba bus core will unprepare and disable the clock when the device is unused when CONFIG_PM is selected, else the clock will be always on. Prior to this patch, as the AMBA primecell bus code enables the PCLK, it would be left on after probe as the clk_prepare_enable() and clk_disable_unprepare() was called and thus just increase and decreas the refcount by one, without it reaching zero and actually disabling the clock. Now the runtime PM callbacks will make sure the PCLK is properly disabled after probe. Reviewed-by: -
Linus Walleij authored
The Ux500 has a PrimeCell version 4B instead of the 3B as supported by the driver, extend the match table to cover this version. Signed-off-by:
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Linus Walleij authored
Helpfully report a bit more about the hardware found in the silicon when matching the AMBA device IDs by using the associated .data pointer in the AMBA match. Signed-off-by:
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Mathieu Poirier authored
Using function "module_amba_driver()" makes the code simpler by eliminating boilerplate code. Wei Yongjun sent out a set of patches addressing those in all the coresight driver but missed ETMv3. Signed-off-by:
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Mathieu Poirier authored
ETM ID registers contain valuable information about the capabilities of the implementation and are very useful when configuring the device for various trace scenarios. Signed-off-by:
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Mathieu Poirier authored
Having access to the ETMv4 management registers is very useful as they give meaningful information on how the IP block has been configured at synthesis time. Signed-off-by:
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Pratik Patel authored
Adding sysfs entries to access and configure specifics about the virtual machine ID comparator functions. Signed-off-by:
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Pratik Patel authored
Adding sysfs entries to access and configure specifics about the context ID comparator functions. Signed-off-by:
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Pratik Patel authored
Adding sysfs entries to control the selection of the resources the trace unit will use as triggers to perform a trace run. Signed-off-by:
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Pratik Patel authored
Adding sysfs entries related to the counter functionality, more specifically to set, control and reload the counters. Signed-off-by:
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Pratik Patel authored
Adding sysfs entries to access the sequencers related registers, more specifically the sequencer state, the sequencer state transition and the sequencer reset control registers. Signed-off-by:
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Pratik Patel authored
Adding sysfs entries to control the various mode the address comparator registers can enact, i.e, start/top, single, and range. Also supplementing with address comparator types configuration registers access, mandatory to complete the configuration of the comparator functions. Signed-off-by:
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Pratik Patel authored
Adding sysfs entries to control the ViewInst register's event selector along with secure and non-secure exception level instruction tracing. Signed-off-by:
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Pratik Patel authored
Adding sysfs entries to configure: . global timestamp. . how often trace synchronisation occur. . the threashold value for cycle counting. . branch and broadcasting regions. Signed-off-by:
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Pratik Patel authored
Adding sysfs entries to: . set the tracing entity with default values. . set various mode associated to the tracing entity. . select the processing entity the tracing entity relates to. . select various events of interest. Signed-off-by:
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Pratik Patel authored
Tracers can be configured with various options at synthesis time and knowing what resources are available is important for SW configuration purposes. As such adding RO sysfs entries for characteristics related to the tracer implementation. Signed-off-by:
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Pratik Patel authored
This driver manages the CoreSight ETMv4 (Embedded Trace Macrocell) IP block to support HW assisted tracing on ARMv7 and ARMv8 architectures. Signed-off-by:
Kaixu Xia <xiakaixu@huawei.com> Signed-off-by:
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- 18 May, 2015 3 commits
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Mark Brown authored
We attempt to sanity check the buffer depth reported by the hardware by making sure it is not less than zero however this check will never be true since the buffer depth is stored in an unsigned integer. Instead change the check to look for the top bit being set which was the intention. Signed-off-by:
Mark Brown <broonie@kernel.org> Signed-off-by:
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Mark Brown authored
When we initialise the ETB driver we attempt to allocate a buffer suitable for storing the data buffered in the hardware based on sizing information reported by the hardware. Unfortunately if the hardware is not properly configured (for example if power domains are not set up correctly) then we may read back a nonsensically large value and therefore the allocation will be too big to succeed. Print an error message showing the amount of memory we tried to allocate if the buffer allocation fails to help users diagnose such problems. Normally it is bad practice to print an error message on memory allocation failures since there are verbose core messages reported for this but in this case where the allocation size might be incorrect it is a useful hint. Signed-off-by:
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Linus Torvalds authored
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