- 05 Sep, 2014 3 commits
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Daniel Vetter authored
Signed-off-by:Daniel Vetter <daniel.vetter@ffwll.ch>
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Chris Wilson authored
If we successfully confuse the hardware, and cause it to drop a queued pageflip, we wait for 60s and issue a warning before continuing on with the modeset. However, this leaves the pending pageflip still stuck indefinitely. Pretend to userspace that it does complete, and let us start afresh following the modeset. v2: Rebase after refactor v3: Rebase, rebase. Signed-off-by:
Chris Wilson <chris@chris-wilson.co.uk> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by:
Ville Syrjälä <ville.syrjala@linux.intel.com> References: https://bugs.freedesktop.org/show_bug.cgi?id=82612Signed-off-by:
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Chris Wilson authored
Long ago, back in the racy haydays of 915gm interrupt handling, page flips would occasionally go astray and leave the hardware stuck, and the display not updating. This annoyed people who relied on their systems being able to display continuously updating information 24/7, and so some code to detect when the driver missed the page flip completion signal was added. Until recently, it was presumed that the interrupt handling was now flawless, but once again Simon Farnsworth has found a system whose display will stall. Reinstate the pageflip stall detection, which works by checking to see if the hardware has been updated to the new framebuffer address following each vblank. If the hardware is scanning out from the new framebuffer, but we still think the flip is pending, then we kick our driver into submision. This is a continuation of the effort started with commit 4e5359cd Author: Simon Farnsworth <simon.farnsworth@onelan.co.uk> Date: Wed Sep 1 17:47:52 2010 +0100 drm/i915: Avoid pageflipping freeze when we miss the flip prepare interrupt This now includes a belt-and-braces approach to make sure the driver (or the hardware) doesn't miss an interrupt and cause us to stop updating the display should the unthinkable happen and the pageflip fail - i.e. that the user is able to continue submitting flips. v2: Cleanup, refactor, and rename v3: Only start counting vblanks after the flip command has been seen by the hardware. v4: Record the seqno after we touch the ring, or else there may be no seqno allocated yet. v5: Rebase on mmio-flip. v6: Rebase, rebase. Reported-by:
Simon Farnsworth <simon@farnz.org.uk> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=75502Signed-off-by:
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- 04 Sep, 2014 12 commits
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Damien Lespiau authored
Tired of copy/pasting things around. v2: Rebase on top of the for_each_pipe() change adding dev_priv as first argument. Signed-off-by:Damien Lespiau <damien.lespiau@intel.com> Signed-off-by:
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Damien Lespiau authored
The new version of the macro does a few things better: - protect the arguments, - only evaluate the arguments once, - check that the arguments are of the same type, Change LC_FREQ_2K to be a unsigned 64bit constant and removed the '()' from the caller as a result. Signed-off-by:
Jani Nikula <jani.nikula@intel.com> Signed-off-by:
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Ville Syrjälä authored
Jani wanted some comments to explain why we call certain vdd on/off functions in certain places. v2: Make the comments more thorough (Imre) Reviewed-by:
Imre Deak <imre.deak@intel.com> Signed-off-by:
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Ville Syrjälä authored
We need to turn the DP port off after the pipe, otherwise the pipe won't turn off properly on certain pch platforms at least (happens on my ILK for example). This also matches the BSpec modeset sequence better. We still don't match the spec exactly though (eg. audio disable should happen much earlier), but at last this eliminates the nasty wait_for_pipe_off() timeouts. We already did the port disable after the pipe for VLV/CHV and for CPU eDP. For g4x leave the port disable where it is since that matches the modeset sequence in the documentation and I don't have a suitable machine to test if the other order would work. Signed-off-by:
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Ville Syrjälä authored
Bspec says we should enable the DP port before enabling panel power, and that the port must be enabled with training pattern 1. Do so. Signed-off-by:
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Ville Syrjälä authored
On VLV/CHV the panel power sequencer may need to be "kicked" a bit to lock onto the new port, and that needs to happen before any aux transfers are attempted if we want the aux transfers to actaully succeed. So turn on panel power (part of the "kick") before aux transfers (DPMS_ON + link training). This also matches the documented modeset sequence better for pch platforms. The documentation doesn't explicitly state anything about the DPMS or link training DPCD writes, but the panel power on step is always listed before link training is mentioned. Signed-off-by:
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Ville Syrjälä authored
Try to make sure we find the power sequencer that the BIOS used by first looking for one which has the panel power enabled, then fall back to one with VDD force bit enabled, and finally look at just the port select bits. This should make us pick the correct power sequencer when the BIOS has already enabled the panel. Signed-off-by:
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Ville Syrjälä authored
The power sequencer loses its state when the disp2d power well is down. Clear the dev_priv->pps_pipe tracking so that the power sequencer state gets reinitialized the next time it's needed. v2: Fix the pps_mutex vs. power_domain mutex deadlock by taking power domain reference first v3: Rename from edp_pps_(un)lock() to just pps_(un)lock() for the future, update due to backlight code changes Reviewed-by: -
Ville Syrjälä authored
VLV/CHV have a per-pipe panel power sequencer which locks onto the port once used. We need to keep track wich power sequencers are locked to which ports. v2: remove spurious whitespace change, rebase due to backlight changes (Imre) Reviewed-by:
Antti Koskipaa <antti.koskipaa@linux.intel.com> Signed-off-by:
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Ville Syrjälä authored
Introduce a new mutex (pps_mutex) to protect the power sequencer state. For now this state includes want_panel_vdd as well as the power sequencer registers. We need a single mutex (as opposed to per port) because later on we will need to deal with VLV/CHV which have multiple power sequencer which can be reassigned to different ports. v2: Add the locking to intel_dp_encoder_suspend too (Imre) v3: Take care intel_edp_backlight_power() and _intel_edp_backlight_on/off(), deal with reboot notifier vlv_power_sequencer_pipe() call (Imre) Reviewed-by: -
Chris Wilson authored
Ville found an old w/a documented for g4x that suggested that we need to reset the HEAD after writing START. This is a useful fixup for some of the g4x ring initialisation woes, but as usual, not all. v2: Do the rewrite unconditionally anyway References: https://bugs.freedesktop.org/show_bug.cgi?id=76554Signed-off-by:
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Chris Wilson authored
When unbinding, there is a possibility that we drop the active reference on the object, thereby freeing it. If that happens, we may destroy the vm link as well as the object and vma. So iterate carefully. Signed-off-by:
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- 03 Sep, 2014 25 commits
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Derek Foreman authored
Really just for completeness - old init function ends up making the plane exactly the same way due to the way the enums are set up. Signed-off-by:
Derek Foreman <derek.foreman@collabora.co.uk> Signed-off-by:
Gustavo Padovan <gustavo.padovan@collabora.co.uk> Reviewed-by:
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Ville Syrjälä authored
Check for !HAS_PCH_SPLIT() instead of 'gen < 5' in the PCH transcoder enable functions. Signed-off-by:
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Ville Syrjälä authored
A few open coded HAS_GMCH_DISPLAY() remain in the underrun reporting code. Convert them over. Signed-off-by:
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Ville Syrjälä authored
IS_GEN8() is a bad check in the forcewake code due to bdw vs. chv differences. Use IS_BROADWELL() instead. The only actual bug here is that we currently call __gen7_gt_force_wake_mt_reset() on chv. On the other places we have checked for chv before using IS_GEN8(), but change them to use IS_BROADWELL() anyway to reduce the chance of accidents in the future. Signed-off-by:
Deepak S <deepak.s@linux.intel.com> Signed-off-by:
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Ville Syrjälä authored
CHV doesn't have FBC, so don't go calling gen8_fbc_sw_flush() on it. Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by:
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Chris Wilson authored
Just a stray local variable, begone. Signed-off-by:
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Chris Wilson authored
We use the variable name latency_ns in both the local lowlevel wm calculation routines and at the global level. Rename the global value to reduce shadow warnings and future confusion. Signed-off-by:
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Damien Lespiau authored
We have CHV code that already makes the test obsolete. Besides, when num_wa_regs is 0 (platforms not gathering that W/A data), we expose something sensible already. Signed-off-by:
Arun Siluvery <arun.siluvery@linux.intel.com> Signed-off-by:
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Damien Lespiau authored
Signed-off-by:
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Damien Lespiau authored
If we happen to emit more than I915_MAX_WA_REGS workarounds, we will currently discard them, not even emit the LRI. Not really what we want, so warn loudly. Signed-off-by:
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Damien Lespiau authored
When entering intel_ring_emit_wa() with num_wa_regs equal to I915_MAX_WA_REGS, we end up indexing the intel_wa_regs array beyond its allocation. Fix the check then. Signed-off-by:
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Damien Lespiau authored
Those debugfs files are prefixed by i915, the name of the kernel module, presumably to make the difference with files exposed by core DRM. Also, add a ',' at the end of the last entry. This is to ease the conflict resolution when rebasing internal patches that add a member at the end of the array. Without it, wiggle can't do its job as we need to modify an existing line (appending the ','). Signed-off-by:
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Paulo Zanoni authored
Currently, CHV is using the same functions as HSW/BDW instead of the same functions as VLV. This looks wrong, especially since, for example, valleyview_modeset_global_resouces even has an IS_CHERRYVIEW check. This patch has the potential to fix display audio and the CHV CDCLK. Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by:
Paulo Zanoni <paulo.r.zanoni@intel.com> Reviewed-by:
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Chris Wilson authored
As we may query the edid multiple times following a detect, record the EDID found during output discovery and reuse it. This is a separate issue from caching the output EDID across detection cycles. v2: Also hookup the force() callback for audio detection when the user forces the connection status. v3: Ville spots a typo, s/==/!=/ Signed-off-by:
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Chris Wilson authored
As we may query the edid multiple times following a detect, record the EDID found during output discovery and reuse it. This is a separate issue from caching the output EDID across detection cycles. v2: Implement connector->force() callback so that edid is associated with the connector for user overrides as well (Ville) Signed-off-by:
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Chris Wilson authored
Both gmch and pch detection routines used the exact same routine for eDP, so de-duplicate. Signed-off-by:
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Sonika Jindal authored
This is the last patch in the series, so remove old defines Signed-off-by:
Sonika Jindal <sonika.jindal@intel.com> Signed-off-by:
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Sonika Jindal authored
Rename the defines to have levels instead of values for vswing and pre-emph levels as the values may differ in other scenarios like low vswing of eDP1.4 where the values are different. Done using following cocci patch for each define: @@ @@ # define DP_TRAIN_VOLTAGE_SWING_400 (0 << 0) + # define DP_TRAIN_VOLTAGE_SWING_LEVEL_0 (0 << 0) ... Signed-off-by:
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Sonika Jindal authored
Rename the defines to have levels instead of values for vswing and pre-emph levels as the values may differ in other scenarios like low vswing of eDP1.4 where the values are different. Done using following cocci patch for each define: @@ @@ # define DP_TRAIN_VOLTAGE_SWING_400 (0 << 0) + # define DP_TRAIN_VOLTAGE_SWING_LEVEL_0 (0 << 0) ... Signed-off-by:
Dave Airlie <airlied@gmail.com> Acked-by:
Thierry Reding <thierry.reding@gmail.com> Signed-off-by:
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Sonika Jindal authored
Rename the defines to have levels instead of values for vswing and pre-emph levels as the values may differ in other scenarios like low vswing of eDP1.4 where the values are different. Done using following cocci patch for each define: @@ @@ # define DP_TRAIN_VOLTAGE_SWING_1200 (3 << 0) + # define DP_TRAIN_VOLTAGE_SWING_LEVEL_3 (0 << 0) ... Signed-off-by:
Alex Deucher <alexdeucher@gmail.com> Acked-by:
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Sonika Jindal authored
Rename the defines to have levels instead of values for vswing and pre-emph levels as the values may differ in other scenarios like low vswing of eDP1.4 where the values are different. Done using following cocci patch for each define: @@ @@ # define DP_TRAIN_VOLTAGE_SWING_400 (0 << 0) + # define DP_TRAIN_VOLTAGE_SWING_LEVEL_0 (0 << 0) ... Signed-off-by:
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Sonika Jindal authored
Rename the defines to have levels instead of values for vswing and pre-emph levels as the values may differ in other scenarios like low vswing of eDP1.4 where the values are different. Done using following cocci patch for each define: @@ @@ # define DP_TRAIN_VOLTAGE_SWING_400 (0 << 0) + # define DP_TRAIN_VOLTAGE_SWING_LEVEL_0 (0 << 0) ... Signed-off-by:
Jingoo Han <jg1.han@samsung.com> Signed-off-by:
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Sonika Jindal authored
Adding new defines, older one will be removed in the last patch in the series. This is to rename the defines to have levels instead of values for vswing and pre-emph levels as the values may differ in other scenarios like low vswing of eDP1.4 where the values are different. Done using following cocci patch for each define: @@ @@ # define DP_TRAIN_VOLTAGE_SWING_400 (0 << 0) + # define DP_TRAIN_VOLTAGE_SWING_LEVEL_0 (0 << 0) ... Cc: dri-devel@lists.freedesktop.org Signed-off-by:
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Jani Nikula authored
Signed-off-by:
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Ville Syrjälä authored
No point in calling intel_plane_restore() in .set_property() if the value didn't change. More importantly this papers over a bug where the current primary plane code forgets to update the user coordinates we store under intel_plane unless the primary plane .update_plane() hook is actually called. This means we have 0 in the coordinates straight after boot and any call to intel_restore_plane() (such as from restore_fbdev_mode()) will actually turn off the primary plane. This mess needs to be fixed properly but that's a bigger task and the first step there is killing off intel_pipe_set_base() and just calling the primary plane .update_plane() hook. For the immediate problem of black screen after boot this small patch is enough to hide it. The problem originates from these two commits: commit 3a5f87c2 Author: Thomas Wood <thomas.wood@intel.com> Date: Wed Aug 20 14:45:00 2014 +0100 drm: fix plane rotation when restoring fbdev configuration commit d91a2cb8e5104233c02bbde539bd4ee455ec12ac Author: Sonika Jindal <sonika.jindal@intel.com> Date: Fri Aug 22 14:06:04 2014 +0530 drm/i915: Add 180 degree primary plane rotation support Cc: Thomas Wood <thomas.wood@intel.com> Cc: Sonika Jindal <sonika.jindal@intel.com> Tested-by:
Mika Kuoppala <mika.kuoppala@linux.intel.com> Signed-off-by:
Alan Stern <stern@rowland.harvard.edu> Signed-off-by:
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