1. 07 Dec, 2019 1 commit
  2. 06 Dec, 2019 14 commits
  3. 05 Dec, 2019 8 commits
  4. 04 Dec, 2019 12 commits
  5. 03 Dec, 2019 5 commits
    • Chris Wilson's avatar
      drm/i915/gt: Set the PD again for Haswell · 13bb5b99
      Chris Wilson authored
      And Haswell still occasionally forgets it is meant to be using a new
      page directory, so repeat ourselves a little louder.
      
      <7> [509.919864] heartbeat rcs0 heartbeat {prio:-2147483645} not ticking
      <7> [509.919895] heartbeat 	Awake? 8
      <7> [509.919903] heartbeat 	Barriers?: no
      <7> [509.919912] heartbeat 	Heartbeat: 3008 ms ago
      <7> [509.919930] heartbeat 	Reset count: 0 (global 0)
      <7> [509.919937] heartbeat 	Requests:
      <7> [509.921008] heartbeat 		active  a7eb:56e1*  @ 5847ms:
      <7> [509.921157] heartbeat 		ring->start:  0x00001000
      <7> [509.921164] heartbeat 		ring->head:   0x00001610
      <7> [509.921170] heartbeat 		ring->tail:   0x000023d8
      <7> [509.921176] heartbeat 		ring->emit:   0x000023d8
      <7> [509.921182] heartbeat 		ring->space:  0x00002570
      <7> [509.921189] heartbeat 		ring->hwsp:   0x7fffe100
      <7> [509.921197] heartbeat [head 1628, postfix 1738, tail 1750, batch 0xffffffff_ffffffff]:
      <7> [509.921289] heartbeat [0000] 7a000002 00100002 00000000 00000000 7a000002 01154c1e 7ffff080 00000000
      <7> [509.921299] heartbeat [0020] 11000001 00002220 ffffffff 12400001 00002220 7ffff000 00000000 11000001
      <7> [509.921308] heartbeat [0040] 00002228 6e900000 7a000002 00100002 00000000 00000000 7a000002 01154c1e
      <7> [509.921317] heartbeat [0060] 7ffff080 00000000 12400001 00002228 7ffff000 00000000 7a000002 00100002
      <7> [509.921326] heartbeat [0080] 00000000 00000000 7a000002 01154c1e 7ffff080 00000000 7a000002 001010a1
      <7> [509.921335] heartbeat [00a0] 7ffff080 00000000 04000000 11000005 00022050 00010001 00012050 00010001
      <7> [509.921345] heartbeat [00c0] 0001a050 00010001 00000000 0c000000 459a110c 00000000 11000005 00022050
      <7> [509.921354] heartbeat [00e0] 00010000 00012050 00010000 0001a050 00010000 12400001 0001a050 7ffff000
      <7> [509.921363] heartbeat [0100] 00000000 04000001 18802100 00000000 7a000002 011050a1 7fffe100 000056e1
      <7> [509.921370] heartbeat [0120] 01000000 00000000
      <7> [509.921538] heartbeat 	MMIO base:  0x00002000
      <7> [509.921682] heartbeat 	CCID: 0x3fa0110d
      <7> [509.922342] heartbeat 	RING_START: 0x00001000
      <7> [509.922353] heartbeat 	RING_HEAD:  0x00001628
      <7> [509.922366] heartbeat 	RING_TAIL:  0x000023d8
      <7> [509.922381] heartbeat 	RING_CTL:   0x00003001
      <7> [509.922396] heartbeat 	RING_MODE:  0x00004000
      <7> [509.922408] heartbeat 	RING_IMR: ffffffde
      <7> [509.922421] heartbeat 	ACTHD:  0x00000000_30e01628
      <7> [509.922434] heartbeat 	BBADDR: 0x00000000_00004004
      <7> [509.922446] heartbeat 	DMA_FADDR: 0x00000000_00002800
      <7> [509.922458] heartbeat 	IPEIR: 0x00000000
      <7> [509.922470] heartbeat 	IPEHR: 0x780c0000
      <7> [509.922642] heartbeat 	PP_DIR_BASE: 0x6e700000
      <7> [509.922652] heartbeat 	PP_DIR_BASE_READ: 0x00000000
      <7> [509.922662] heartbeat 	PP_DIR_DCLV: 0xffffffff
      <7> [509.922678] heartbeat 		E  a7eb:56e1*  @ 5849ms:
      <7> [509.922689] heartbeat 		E  a7eb:56e2-  @ 5849ms:
      <7> [509.922698] heartbeat 		E  a7eb:56e3  @ 5848ms:
      <7> [509.922707] heartbeat 		E  a7eb:56e4  @ 5848ms:
      <7> [509.922715] heartbeat 		E  a7eb:56e5  @ 5847ms:
      <7> [509.922724] heartbeat 		E  a7eb:56e6  @ 5846ms:
      <7> [509.922735] heartbeat 		E  a7eb:56e7  @ 5846ms:
      <7> [509.922744] heartbeat 		...skipping 4 executing requests...
      <7> [509.922754] heartbeat 		E  a7eb:56ec  @ 3010ms:
      <7> [509.922796] heartbeat HWSP:
      <7> [509.922807] heartbeat [0000] 00000001 00000000 00000000 00000000 00000000 00000000 00000000 00000000
      <7> [509.922817] heartbeat [0020] 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
      <7> [509.922826] heartbeat *
      <7> [509.922836] heartbeat [0100] 000056e0 00000000 00000000 00000000 00000000 00000000 00000000 00000000
      <7> [509.922845] heartbeat [0120] 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
      <7> [509.922851] heartbeat *
      <7> [509.922870] heartbeat Idle? no
      <7> [509.922878] heartbeat Signals:
      <7> [509.923000] heartbeat 	[a7eb:56e2] @ 5850ms
      
      Here, we have a failed context restore after the PD switch, but note
      that the PP_DIR_BASE register does not match the LRI in the ring.
      
      Bump it to 8^W 4 loops, and with that Baytrail starts passing the sanity
      checks.
      Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
      Acked-by: default avatarMika Kuoppala <mika.kuoppala@linux.intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20191203211631.3167430-1-chris@chris-wilson.co.uk
      13bb5b99
    • Chris Wilson's avatar
      drm/i915/gem: Avoid parking the vma as we unbind · cb6c3d45
      Chris Wilson authored
      In order to avoid keeping a reference on the i915_vma (which is long
      overdue!) we have to coordinate all the possible lifetimes and only use
      the vma while we know it is alive. In this episode, we are reminded that
      while idle, the closed vma are destroyed. So if the GT idles while we are
      working with the vma, the vma itself becomes invalid.
      
      First class i915_vma here we come, but in the meantime keep piling on
      the straw.
      Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
      Reviewed-by: default avatarMatthew Auld <matthew.auld@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20191203155032.3137263-1-chris@chris-wilson.co.uk
      cb6c3d45
    • José Roberto de Souza's avatar
      drm/i915/display/mst: Move DPMS_OFF call to post_disable · 78eaaba3
      José Roberto de Souza authored
      Moving just to simplify handling as there is no change in behavior.
      
      Cc: Lucas De Marchi <lucas.demarchi@intel.com>
      Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
      Signed-off-by: default avatarJosé Roberto de Souza <jose.souza@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20191202222513.337777-3-jose.souza@intel.com
      78eaaba3
    • José Roberto de Souza's avatar
      drm/i915/dp: Power down sink before disable pipe/transcoder clock · 50a7efb2
      José Roberto de Souza authored
      Disabling pipe/transcoder clock before power down sink could cause
      sink lost signal, causing it to trigger a hotplug to notify source
      that link signal was lost.
      
      Cc: Lucas De Marchi <lucas.demarchi@intel.com>
      Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
      Signed-off-by: default avatarJosé Roberto de Souza <jose.souza@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20191202222513.337777-2-jose.souza@intel.com
      50a7efb2
    • José Roberto de Souza's avatar
      drm/i915/display: Check the old state to find port sync slave · e815aff5
      José Roberto de Souza authored
      If the CRTC is going from enabled to disabled and it is a port sync
      slave, it needs to check to the old state to be disabled before the
      port sync master.
      
      Cc: Manasi Navare <manasi.d.navare@intel.com>
      Cc: Matt Roper <matthew.d.roper@intel.com>
      Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
      Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
      Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
      Signed-off-by: default avatarJosé Roberto de Souza <jose.souza@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20191202222513.337777-1-jose.souza@intel.com
      e815aff5