- 22 Sep, 2016 8 commits
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Nicholas Piggin authored
When we originally added the ability to split the exception vectors from the kernel (commit 1f6a93e4 ("powerpc: Make it possible to move the interrupt handlers away from the kernel" 2008-09-15)), the LOAD_HANDLER() macro used an addi instruction to compute the offset of the common handler from the kernel base address. Using addi meant the handler had to be within 32K of the kernel base address, due to the addi instruction taking a signed immediate value. That necessitated creating a trampoline for the system call handler, because system_call_common (in entry64.S) is not linked within 32K of the kernel base address. Later in commit 61e2390e ("powerpc: Make load_hander handle upto 64k offset" 2012-11-15) we changed LOAD_HANDLER to take a 64K offset, by changing it to use ori. Although system_call_common is not in head_64.S or exceptions-64s.S, it is included in head-y, which causes it to be linked early in the kernel text, so in practice it ends up below 64K. Additionally if it can't be placed below 64K the linker will fail to build with a "relocation truncated to fit" error. So remove the trampoline. Newer toolchains are able to work out that the ori in LOAD_HANDLER only takes a 16 bit offset, and so they generate a 16 bit relocation. Older toolchains (binutils 2.22 at least) are not so smart, so we have to add the @l annotation to tell the assembler to generate a 16 bit relocation. Signed-off-by:
Nicholas Piggin <npiggin@gmail.com> Signed-off-by:
Michael Ellerman <mpe@ellerman.id.au>
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Nicholas Piggin authored
The 0xf80 hv_facility_unavailable trampoline branches to the 0xf60 handler. This works because they both do the same thing, but it should be fixed. Signed-off-by:
Nicholas Piggin <npiggin@gmail.com> Signed-off-by:
Michael Ellerman <mpe@ellerman.id.au>
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Russell Currey authored
On EEH events the kernel will print a dump of relevant registers. If EEH is unavailable (i.e. CONFIG_EEH is disabled, a new platform doesn't have EEH support, etc) this information isn't readily available. Add a new debugfs handler to trigger a PHB register dump, so that this information can be made available on demand. Signed-off-by:
Russell Currey <ruscur@russell.cc> Reviewed-by:
Gavin Shan <gwshan@linux.vnet.ibm.com> Signed-off-by:
Michael Ellerman <mpe@ellerman.id.au>
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Benjamin Herrenschmidt authored
The only difference is now the TCE table check which doesn't need to be ifdef'ed out, it will basically do nothing on BookE (it is only useful for ancient IBM machines). Signed-off-by:
Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by:
Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Signed-off-by:
Michael Ellerman <mpe@ellerman.id.au>
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Benjamin Herrenschmidt authored
Currently we turn the MMU off after copying the image, and we make sure there is no overlap between the hash table and the target pages in that case. That doesn't work for Radix however. In that case, the page tables are scattered and we can't really enforce that the target of the image isn't overlapping one of them. So instead, let's turn the MMU off before copying the image in radix mode. Thankfully, in radix mode, even under a hypervisor, we know we don't have the same kind of RMA limitations that hash mode has. While at it, also turn the MMU off early when using hash in non-LPAR mode, that way we can get rid of the collision check completely. Signed-off-by:
Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by:
Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Acked-by:
Balbir Singh <bsingharora@gmail.com> Signed-off-by:
Michael Ellerman <mpe@ellerman.id.au>
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Aneesh Kumar K.V authored
Signed-off-by:
Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Signed-off-by:
Michael Ellerman <mpe@ellerman.id.au>
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Benjamin Herrenschmidt authored
Just using the hash ops won't work anymore since radix will have NULL in there. Instead create an mmu_cleanup_all() function which will do the right thing based on the MMU mode. For Radix, for now I clear UPRT and the PTCR, effectively switching back to Radix with no partition table setup. Currently set it to NULL on BookE thought it might be a good idea to wipe the TLB there (Scott ?) Signed-off-by:
Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by:
Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Acked-by:
Balbir Singh <bsingharora@gmail.com> Signed-off-by:
Michael Ellerman <mpe@ellerman.id.au>
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Benjamin Herrenschmidt authored
With Radix, it can be NULL even on !BOOKE these days so replace the ifdef with a NULL check which is cleaner anyway. Signed-off-by:
Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by:
Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Acked-by:
Balbir Singh <bsingharora@gmail.com> Signed-off-by:
Michael Ellerman <mpe@ellerman.id.au>
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- 20 Sep, 2016 10 commits
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Michael Ellerman authored
NO_IRQ has been == 0 on powerpc for just over ten years (since commit 0ebfff14 ("[POWERPC] Add new interrupt mapping core and change platforms to use it")). It's also 0 on most other arches. Although it's fairly harmless, every now and then it causes confusion when a driver is built on powerpc and another arch which doesn't define NO_IRQ. There's at least 6 definitions of NO_IRQ in drivers/, at least some of which are to work around that problem. So we'd like to remove it. This is fairly trivial in the arch code, we just convert: if (irq == NO_IRQ) to if (!irq) if (irq != NO_IRQ) to if (irq) irq = NO_IRQ; to irq = 0; return NO_IRQ; to return 0; And a few other odd cases as well. At least for now we keep the #define NO_IRQ, because there is driver code that uses NO_IRQ and the fixes to remove those will go via other trees. Note we also change some occurrences in PPC sound drivers, drivers/ps3, and drivers/macintosh. Signed-off-by:
Michael Ellerman <mpe@ellerman.id.au>
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Michael Neuling authored
Fred has taken over the cxl maintenance I was doing. This updates the MAINTAINERS file to reflect this. It also removes a duplicate entry in the files covered and adds an entry for the CXL PCI code in arch/powerpc. Signed-off-by:
Michael Neuling <mikey@neuling.org> Reviewed-by:
Andrew Donnellan <andrew.donnellan@au1.ibm.com> Reviewed-by:
Andrew Donnellan <andrew.donnellan@au1.ibm.com> Acked-by:
Frederic Barrat <fbarrat@linux.vnet.ibm.com> Signed-off-by:
Michael Ellerman <mpe@ellerman.id.au>
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Andrew Donnellan authored
If we fail to allocate work, we don't end up using hp_errlog_copy. Free it in the error path. Signed-off-by:
Andrew Donnellan <andrew.donnellan@au1.ibm.com> Reviewed-by:
Nathan Fontenot <nfont@linux.vnet.ibm.com> Signed-off-by:
Michael Ellerman <mpe@ellerman.id.au>
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Pan Xinhui authored
When we merge two contiguous partitions whose signatures are marked NVRAM_SIG_FREE, We need update prev's length and checksum, then write it to nvram, not cur's. So lets fix this mistake now. Also use memset instead of strncpy to set the partition's name. It's more readable if we want to fill up with duplicate chars . Fixes: fa2b4e54 ("powerpc/nvram: Improve partition removal") Signed-off-by:
Pan Xinhui <xinhui.pan@linux.vnet.ibm.com> Signed-off-by:
Michael Ellerman <mpe@ellerman.id.au>
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Pan Xinhui authored
If kmemdup fails, We need kfree *buff* first then return -ENOMEM. Otherwise there is a memory leak. Signed-off-by:
Pan Xinhui <xinhui.pan@linux.vnet.ibm.com> Reviewed-by:
Nathan Fontenot <nfont@linux.vnet.ibm.com> Signed-off-by:
Michael Ellerman <mpe@ellerman.id.au>
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Nicholas Piggin authored
mtmsrd with L=1 only affects MSR_EE and MSR_RI bits, and we always know what state those bits are, so the kernel MSR does not need to be loaded when modifying them. mtmsrd is often in the critical execution path, so avoiding dependency on even L1 load is noticable. On a POWER8 this saves about 3 cycles from the syscall path, and possibly a few from other exception returns (not measured). Signed-off-by:
Nicholas Piggin <npiggin@gmail.com> Signed-off-by:
Michael Ellerman <mpe@ellerman.id.au>
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Nicholas Piggin authored
The mflr r10 instruction was left over from when the code used LR to branch to system_call_entry from the exception handler. That was changed by commit 6a404806 ("powerpc: Avoid link stack corruption in MMU on syscall entry path") to use the count register. The value is never used now, so mflr can be removed, and r10 can be used for storage rather than spilling to the SPR scratch register. The scratch register spill causes a long pipeline stall due to the SPR read after write. This change brings getppid syscall cost from 406 to 376 cycles on POWER8. getppid for non-relocatable case is 371 cycles. Signed-off-by:
Nicholas Piggin <npiggin@gmail.com> Acked-by:
Balbir Singh <bsingharora@gmail.com> Signed-off-by:
Michael Ellerman <mpe@ellerman.id.au>
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Aneesh Kumar K.V authored
For hugetlb to work with 4K page size, we need MAX_ORDER to be 13 or more. When switching from a 64K page size to 4K linux page size using make oldconfig, we end up with a CONFIG_FORCE_MAX_ZONEORDER value of 9. This results in a 16M hugepage beiing considered as a gigantic huge page which in turn results in failure to setup hugepages if gigantic hugepage support is not enabled. This also results in kernel crash with 4K radix configuration. We hit the below BUG_ON on radix: kernel BUG at mm/huge_memory.c:364! Oops: Exception in kernel mode, sig: 5 [#1] SMP NR_CPUS=2048 NUMA PowerNV CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.8.0-rc1-00006-gbae9cc6 #1 task: c0000000f1af8000 task.stack: c0000000f1aec000 NIP: c000000000c5fa0c LR: c000000000c5f9d8 CTR: c000000000c5f9a4 REGS: c0000000f1aef920 TRAP: 0700 Not tainted (4.8.0-rc1-00006-gbae9cc6) MSR: 9000000102029033 <SF,HV,VEC,EE,ME,IR,DR,RI,LE,TM[E]> CR: 24000844 XER: 00000000 CFAR: c000000000c5f9e0 SOFTE: 1 .... NIP [c000000000c5fa0c] hugepage_init+0x68/0x238 LR [c000000000c5f9d8] hugepage_init+0x34/0x238 Fixes: a7ee5395 ("powerpc/Kconfig: Update config option based on page size") Cc: stable@vger.kernel.org # v4.7+ Reported-by:
Santhosh <santhog4@linux.vnet.ibm.com> Signed-off-by:
Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Acked-by:
Balbir Singh <bsingharora@gmail.com> Signed-off-by:
Michael Ellerman <mpe@ellerman.id.au>
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Nicholas Piggin authored
Add some documentation for the 64-bit syscall ABI, which doesn't seem to be documented elsewhere. This attempts to document existing practice. The only small discrepancy is glibc clobbers not quite matching the kernel (e.g., xer, some vsyscalls trash cr1 whereas glibc only clobbers cr0). These will be resolved after this document is merged. Signed-off-by:
Nicholas Piggin <npiggin@gmail.com> Signed-off-by:
Michael Ellerman <mpe@ellerman.id.au>
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Nicholas Piggin authored
The HMI (Hypervisor Maintenance Interrupt) is defined by the architecture to be higher priority than other maskable interrupts, so replay it first, as a best-effort to replay according to hardware priorities. Signed-off-by:
Nicholas Piggin <npiggin@gmail.com> Signed-off-by:
Michael Ellerman <mpe@ellerman.id.au>
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- 19 Sep, 2016 4 commits
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Michael Ellerman authored
In our linker script we open code the list of text sections, because we need to include the __ftr_alt sections, which are arch-specific. This means we can't use TEXT_TEXT as defined in vmlinux.lds.h, and so we don't have the MEM_KEEP() logic for memory hotplug sections. If we build the kernel with the gold linker, and with CONFIG_MEMORY_HOTPLUG=y, we see that functions marked __meminit can end up outside of the _stext/_etext range, and also outside of _sinittext/_einittext, eg: c000000000000000 T _stext c0000000009e0000 A _etext c0000000009e3f18 T hash__vmemmap_create_mapping c000000000ca0000 T _sinittext c000000000d00844 T _einittext This causes them to not be recognised as text by is_kernel_text(), and prevents them being patched by jump_label (and presumably ftrace/kprobes etc.). Fix it by adding MEM_KEEP() directives, mirroring what TEXT_TEXT does. This isn't a problem when CONFIG_MEMORY_HOTPLUG=n, because we use the standard INIT_TEXT_SECTION() and EXIT_TEXT macros from vmlinux.lds.h. Signed-off-by:
Michael Ellerman <mpe@ellerman.id.au> Tested-by:
Anton Blanchard <anton@samba.org> Signed-off-by:
Michael Ellerman <mpe@ellerman.id.au>
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Michael Ellerman authored
Currently the _GLOBAL() macro unilaterally sets the assembler section to ".text" at the start of the macro. This is rude as the caller may be using a different section. So let the caller decide which section to emit the code into. On big endian we do need to switch to the ".opd" section to emit the OPD, but do that with pushsection/popsection, thereby leaving the original section intact. I verified that the order of all entries in System.map is unchanged after this patch. The actual addresses shift around slightly so you can't just diff the System.map. Signed-off-by:
Michael Ellerman <mpe@ellerman.id.au> Reviewed-by:
Nicholas Piggin <npiggin@gmail.com> Signed-off-by:
Michael Ellerman <mpe@ellerman.id.au>
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Nicholas Piggin authored
Rather than forcing the whole function into the ".kprobes.text" section, just add the symbol's address to the kprobe blacklist. This also lets us drop the three versions of the_KPROBE macro, in exchange for just one version of _ASM_NOKPROBE_SYMBOL - which is a good cleanup. Signed-off-by:
Nicholas Piggin <npiggin@gmail.com> Signed-off-by:
Michael Ellerman <mpe@ellerman.id.au>
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Nicholas Piggin authored
Currently we mark the C implementations of some exception handlers as __kprobes. This has the effect of putting them in the ".kprobes.text" section, which separates them from the rest of the text. Instead we can use the blacklist macros to add the symbols to a blacklist which kprobes will check. This allows the linker to move exception handler functions close to callers and avoids trampolines in larger kernels. Signed-off-by:
Nicholas Piggin <npiggin@gmail.com> [mpe: Reword change log a bit] Signed-off-by:
Michael Ellerman <mpe@ellerman.id.au>
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- 13 Sep, 2016 18 commits
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Simon Guo authored
Normally, when MSR[VSX/VR/SPE] bits == 1, the used_vsr/used_vr/used_spe bit have already been set. However when loading a signal frame from user space we need to explicitly set used_vsr/used_vr/used_spe to make them consistent with the MSR bits from the signal frame. For example, CRIU application, who utilizes sigreturn to restore checkpointed process, will lead to the case where MSR[VSX] bit is active in signal frame, but used_vsr bit is not set in the kernel. (the same applies to VR/SPE). This patch fixes this by always setting used_* bit when MSR related bits are active in signal frame and we are doing sigreturn. Based on a proposal by Benh. Signed-off-by:
Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by:
Simon Guo <wei.guo.simon@gmail.com> [mpe: Massage change log] Signed-off-by:
Michael Ellerman <mpe@ellerman.id.au>
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Simon Guo authored
The ckpt_regs usage in gpr32_set_common/gpr32_get_common() will lead to following cppcheck error at ifndef CONFIG_PPC_TRANSACTIONAL_MEM case: [arch/powerpc/kernel/ptrace.c:2062]: (error) Uninitialized variable: ckpt_regs [arch/powerpc/kernel/ptrace.c:2130]: (error) Uninitialized variable: ckpt_regs The problem is due to gpr32_set_common() used ckpt_regs variable which only makes sense at #ifdef CONFIG_PPC_TRANSACTIONAL_MEM. This patch fix this issue by passing in "regs" parameter instead. Reported-by:
Daniel Axtens <dja@axtens.net> Signed-off-by:
Simon Guo <wei.guo.simon@gmail.com> Signed-off-by:
Michael Ellerman <mpe@ellerman.id.au>
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Frederic Barrat authored
When set_sl_ops() is called, the adapter data structure is not fully initialized yet. Therefore the device name is not showing up in the trace. Fix is simply to get the device name from the pci_dev structure. Fixes: 6d382616 ("cxl: Abstract the differences between the PSL and XSL") Signed-off-by:
Frederic Barrat <fbarrat@linux.vnet.ibm.com> Signed-off-by:
Michael Ellerman <mpe@ellerman.id.au>
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Colin Ian King authored
The message is missing a \n, add it. Switch to pr_warn(), it's shorter and less ugly. Signed-off-by:
Colin Ian King <colin.king@canonical.com> Signed-off-by:
Michael Ellerman <mpe@ellerman.id.au>
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Aneesh Kumar K.V authored
Power9 DD1 requires to update the hid0 register when switching from hash to radix. Signed-off-by:
Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Acked-by:
Michael Neuling <mikey@neuling.org> Signed-off-by:
Michael Ellerman <mpe@ellerman.id.au>
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Aneesh Kumar K.V authored
POWER9 DD1 requires pte to be marked invalid (V=0) before updating it with the new value. This makes this distinction for the different revisions. Signed-off-by:
Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Acked-by:
Michael Neuling <mikey@neuling.org> Signed-off-by:
Michael Ellerman <mpe@ellerman.id.au>
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Aneesh Kumar K.V authored
POWER9 DD1 uses RTS - 28 for the RTS value but other revisions use RTS - 31. This makes this distinction for the different revisions Signed-off-by:
Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Acked-by:
Michael Neuling <mikey@neuling.org> Signed-off-by:
Michael Ellerman <mpe@ellerman.id.au>
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Aneesh Kumar K.V authored
Signed-off-by:
Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Acked-by:
Michael Neuling <mikey@neuling.org> Signed-off-by:
Michael Ellerman <mpe@ellerman.id.au>
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Darren Stevens authored
The of_node for the SB600 (io-bridge) has its device_type set to 'io-bridge' Set it to 'isa' so that it can be found by isa_bridge_find_early() instead of using patches in the kernel. Signed-off-by:
Darren Stevens <darren@stevens-zone.net> Signed-off-by:
Michael Ellerman <mpe@ellerman.id.au>
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Darren Stevens authored
The device tree on the Nemo passes all of the i8259 interrupts with numbers between 212 and 222, and points their interrupt-parent property to the pasemi-opic, requiring custom patches to the kernel. Fix the values so that they can be controlled by the generic ppc i8259 code. Signed-off-by:
Darren Stevens <darren@stevens-zone.net> [mpe: Rework deeply nested if and boundary checks] Signed-off-by:
Michael Ellerman <mpe@ellerman.id.au>
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Darren Stevens authored
Add config option for the Nemo motherboard used in the Amigaone X1000. This is a custom PASemi board with an AMD SB600 southbridge, and needs some patches to it device tree. This option will be used to build these into the kernel Signed-off-by:
Darren Stevens <darren@stevens-zone.net> Signed-off-by:
Michael Ellerman <mpe@ellerman.id.au>
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PrasannaKumar Muralidharan authored
Checkpatch.pl warns about usage of asm/io.h. Use linux/io.h instead. Signed-off-by:
PrasannaKumar Muralidharan <prasannatsmkumar@gmail.com> Signed-off-by:
Michael Ellerman <mpe@ellerman.id.au>
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Colin Ian King authored
Trivial fix to spelling mistake in dev_warn message and remove extraneous trailing whitespace at end of the message. Signed-off-by:
Colin Ian King <colin.king@canonical.com> Signed-off-by:
Michael Ellerman <mpe@ellerman.id.au>
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Michael Ellerman authored
Use the standard Kbuild trick of foo-y to make the construction of UTC_MACHINE less verbose. Signed-off-by:
Michael Ellerman <mpe@ellerman.id.au>
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Michael Ellerman authored
Commit 2578bfae ("[POWERPC] Create and use CONFIG_WORD_SIZE") added CONFIG_WORD_SIZE, and suggests that other arches were going to do likewise. But that never happened, powerpc is the only architecture which uses it. So switch to using a simple make variable, BITS, like x86, sh, sparc and tile. It is also easier to spell and simpler, avoiding any confusion about whether it's defined due to ordering of make vs kconfig. Signed-off-by:
Michael Ellerman <mpe@ellerman.id.au>
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Michael Ellerman authored
Some of the rules in the boot Makefile use @ to hide the command, this means "make V=1" doesn't show them, which is confusing. So use the Kbuild standard $(Q) which means KBUILD_VERBOSE=1 or V=1 will work as expected. Signed-off-by:
Michael Ellerman <mpe@ellerman.id.au>
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Michael Ellerman authored
We can just use the standard .S -> .o rule, cmd_as_o_S. Signed-off-by:
Michael Ellerman <mpe@ellerman.id.au>
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Michael Ellerman authored
In fact it makes no sense at all to have this defined on little endian builds. Since we disabled the 32-bit VDSO on little endian, we don't build any 32-bit code when building a little endian kernel. Signed-off-by:
Michael Ellerman <mpe@ellerman.id.au>
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