- 23 Oct, 2008 7 commits
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Eric Anholt authored
Signed-off-by:
Eric Anholt <eric@anholt.net> Acked-by:
Keith Packard <keithp@keithp.com> Signed-off-by:
Dave Airlie <airlied@redhat.com>
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Eric Anholt authored
Otherwise, if we lost the race, the pipestat bit would be set without being reflected in IIR, and we would never clear the pipestat bit so the pipe event would never be generated again, and all vblank waits would time out. Signed-off-by:
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Eric Anholt authored
If the failing paths were hit, the vblank IRQ would never get turned off again. Signed-off-by:
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Zhenyu Wang authored
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Zhenyu Wang <zhenyu.z.wang@intel.com> Signed-off-by:
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Keith Packard authored
Current Intel errata for the GM965 says that using MSI may cause interrupts to be delayed or lost. The only workaround offered is to not use it. Signed-off-by:
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Zhenyu Wang authored
This avoids setting the cliprects pointer to a zero-sized allocation. Signed-off-by:
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Keith Packard authored
This uses the same spinlock as the user_irq code as it shares the same register, ensuring that interrupt registers are updated atomically. Signed-off-by:
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- 17 Oct, 2008 33 commits
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Matthias Hopf authored
Olaf Kirch noticed that the i915_set_status_page() function of the i915 kernel driver calls ioremap with an address offset that is supplied by userspace via ioctl. The function zeroes the mapped memory via memset and tells the hardware about the address. Turns out that access to that ioctl is not restricted to root so users could probably exploit that to do nasty things. We haven't tried to write actual exploit code though. It only affects the Intel G33 series and newer. Signed-off-by: -
Dave Airlie authored
This can be removed later when DRM doesn't depend on shmem. Signed-off-by: -
Alex Deucher authored
Someone noticed these registers moved around for later chips, so we redo the codepaths per-chip. PCIE chips don't appear to require explicit enables. Signed-off-by: -
Alex Deucher authored
This adds support for the RS400 family of IGPs for Intel CPUs. Signed-off-by: -
Alex Deucher authored
This adds support for the HS2100 IGP chipset. Signed-off-by: -
Eric Anholt authored
Fixes tiling swizzling mode failures that manifest in glReadPixels(). Signed-off-by:
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Keith Packard authored
At leavevt and lastclose time, cancel any pending retire work handler invocation, and keep the retire work handler from requeuing itself if it is currently running. This patch restructures i915_gem_idle to perform all of these tasks instead of having both leavevt and lastclose call a sequence of functions. Signed-off-by:
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Keith Packard authored
This should improve performance by avoiding uncached reads by the CPU (the point of having a status page), and may improve stability. This patch only affects G33, GM45 and G45 chips as those are the only ones using GTT-based HWS mappings. Signed-off-by:
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Keith Packard authored
G45 appears quite sensitive to ring initialization register writes, sometimes leaving the HEAD register with the START register contents. Check to make sure HEAD is reset correctly when START is written, and fix it up, screaming loudly. Signed-off-by:
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Keith Packard authored
Dwords 0 through 0x1f are reserved for use by the hardware. Move the GEM breadcrumb from 0x10 to 0x20 to keep out of this area. Signed-off-by:
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Eric Anholt authored
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Jesse Barnes authored
Like the last patch but adds a macro to get at the irq value instead of dereferencing pdev directly. Should make things easier for the BSD guys and if we ever support non-PCI devices. Signed-off-by:
Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by:
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Dave Airlie authored
doing an ipi for the wbinvd case isn't necessary. Signed-off-by: -
Dave Airlie authored
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Dave Airlie authored
init/entervt/leavevt should be root-only master ioctls. Signed-off-by: -
Eric Anholt authored
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Eric Anholt authored
Fixes failure to map the ringbuffer when PAT tells us we don't get to do uncached on something that's already mapped WC, or something along those lines. Signed-off-by:
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Eric Anholt authored
Fixes bad software fallback rendering in Mesa in dual-channel configurations. d9a2470012588dc5313a5ac8bb2f03575af00e99 Signed-off-by: -
Eric Anholt authored
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Eric Anholt authored
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Kristian Høgsberg authored
Signed-off-by:
Kristian Høgsberg <krh@redhat.com> Signed-off-by:
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Kristian Høgsberg authored
We fail ioctls that depend on the sarea_priv with EINVAL. Signed-off-by:
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Eric Anholt authored
In the conversion for GEM, we had stopped using the hardware lock to protect ring usage, since it was all internal to the DRM now. However, some paths weren't converted to using struct_mutex to prevent multiple threads from concurrently working on the ring, in particular between the vblank swap handler and ioctls. Signed-off-by:
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Kristian Høgsberg authored
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Eric Anholt authored
GEM allows the creation of persistent buffer objects accessible by the graphics device through new ioctls for managing execution of commands on the device. The userland API is almost entirely driver-specific to ensure that any driver building on this model can easily map the interface to individual driver requirements. GEM is used by the 2d driver for managing its internal state allocations and will be used for pixmap storage to reduce memory consumption and enable zero-copy GLX_EXT_texture_from_pixmap, and in the 3d driver is used to enable GL_EXT_framebuffer_object and GL_ARB_pixel_buffer_object. Signed-off-by:
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Eric Anholt authored
The driver would like to map IO space directly for copying data in when appropriate, to avoid CPU cache flushing for streaming writes. kmap_atomic_pfn lets us avoid IPIs associated with ioremap for this process. Signed-off-by:
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Keith Packard authored
GEM needs to create shmem files to back buffer objects. Though currently creation of files for objects could have been driven from userland, the modesetting work will require allocation of buffer objects before userland is running, for boot-time message display. Signed-off-by:
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Jesse Barnes authored
Previously, drivers supporting vblank interrupt waits would run the interrupt all the time, or all the time that any 3d client was running, preventing the CPU from sleeping for long when the system was otherwise idle. Now, interrupts are disabled any time that no client is waiting on a vblank event. The new method uses vblank counters on the chipsets when the interrupts are turned off, rather than counting interrupts, so that we can continue to present accurate vblank numbers. Co-author: Michel Dänzer <michel@tungstengraphics.com> Signed-off-by:
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David Howells authored
Wrap access to task credentials so that they can be separated more easily from the task_struct during the introduction of COW creds. Change most current->(|e|s|fs)[ug]id to current_(|e|s|fs)[ug]id(). Change some task->e?[ug]id to task_e?[ug]id(). In some places it makes more sense to use RCU directly rather than a convenient wrapper; these will be addressed by later patches. Signed-off-by:
David Howells <dhowells@redhat.com> Reviewed-by:
James Morris <jmorris@namei.org> Acked-by:
Serge Hallyn <serue@us.ibm.com> Signed-off-by:
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Jesse Barnes authored
Author: Zhenyu Wang <zhenyu.z.wang@intel.com> i915: official name for GM45 chipset Signed-off-by:
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Jesse Barnes authored
[Patch against drm-next. Consider this a trial balloon for our new Linux development model.] This is a big chunk of code. Separating it out makes it easier to change without churn on the main i915_drv.c file (and there will be churn as we fix bugs and add things like kernel mode setting). Also makes it easier to share this file with BSD. Signed-off-by:
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Dave Airlie authored
Make writeback not get disabled on resume. Signed-off-by: -
Dave Airlie authored
Pointed out by Roel Kluin on dri-devel. Signed-off-by:
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