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  1. 25 Jun, 2013 1 commit
    • Srinivas KANDAGATLA's avatar
      pinctrl: st: Add pinctrl and pinconf support. · 701016c0
      Srinivas KANDAGATLA authored
      This patch add pinctrl support to ST SoCs.
      
      About hardware:
      ST Set-Top-Box parts have two blocks called PIO and PIO-mux which handle
      pin configurations.
      
      Each multi-function pin is controlled, driven and routed through the PIO
      multiplexing block. Each pin supports GPIO functionality (ALT0) and
      multiple alternate functions(ALT1 - ALTx) that directly connect the pin
      to different hardware blocks. When a pin is in GPIO mode, Output Enable
      (OE), Open Drain(OD), and Pull Up (PU) are driven by the related PIO
      block. Otherwise the PIO multiplexing block configures these parameters
      and retiming the signal.
      
      About driver:
      This pinctrl driver manages both PIO and PIO-mux block using pinctrl,
      pinconf, pinmux, gpio subsystems. All the pinctrl related config
      information can only come from device trees.
      Signed-off-by: default avatarSrinivas Kandagatla <srinivas.kandagatla@st.com>
      Acked-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      Signed-off-by: default avatarMark Brown <broonie@linaro.org>
      701016c0
  2. 18 Jun, 2013 1 commit
  3. 20 May, 2013 1 commit
    • Heiko Stuebner's avatar
      pinctrl: Add pinctrl-s3c24xx driver · af99a750
      Heiko Stuebner authored
      The s3c24xx pins follow a similar pattern as the other Samsung SoCs and
      can therefore reuse the already introduced infrastructure.
      
      The s3c24xx SoCs have one design oddity in that the first 4 external
      interrupts do not reside in the eint pending register but in the main
      interrupt controller instead. We solve this by forwarding the external
      interrupt from the main controller into the irq domain of the pin bank.
      The masking/acking of these interrupts is handled in the same way.
      
      Furthermore the S3C2412/2413 SoCs contain another oddity in that they
      keep the same 4 eints in the main interrupt controller and eintpend
      register and requiring ack operations to happen in both. This is solved
      by using different compatible properties for the wakeup eint node which
      set a property accordingly.
      Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
      Reviewed-by: default avatarTomasz Figa <t.figa@samsung.com>
      Reviewed-by: default avatarSylwester Nawrocki <s.nawrocki@samsung.com>
      Acked-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      Signed-off-by: default avatarKukjin Kim <kgene.kim@samsung.com>
      af99a750
  4. 09 Apr, 2013 3 commits
  5. 04 Apr, 2013 1 commit
  6. 27 Mar, 2013 1 commit
  7. 07 Mar, 2013 1 commit
  8. 05 Feb, 2013 4 commits
  9. 30 Jan, 2013 2 commits
  10. 25 Jan, 2013 1 commit
  11. 22 Jan, 2013 1 commit
  12. 18 Jan, 2013 3 commits
  13. 01 Dec, 2012 1 commit
  14. 22 Nov, 2012 1 commit
  15. 15 Nov, 2012 2 commits
  16. 13 Nov, 2012 1 commit
  17. 11 Nov, 2012 3 commits
    • Barry Song's avatar
      pinctrl: sirf: enable the driver support new SiRFmarco SoC · d3e26f2f
      Barry Song authored
      The driver supports old up SiRFprimaII SoCs, this patch makes it support
      the new SiRFmarco as well.
      SiRFmarco, as a SMP SoC, adds new SIRFSOC_GPIO_PAD_EN_CLR registers, to
      disable GPIO pad, we should write 1 to the corresponding bit in the new
      CLEAR register instead of writing 0 to SIRFSOC_GPIO_PAD_EN.
      Signed-off-by: default avatarBarry Song <Baohua.Song@csr.com>
      Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      d3e26f2f
    • Thomas Petazzoni's avatar
      pinctrl: mvebu: move to its own directory · 06763c74
      Thomas Petazzoni authored
      Like the spear platform, the mvebu platform has multiple files: one
      core file, and then one file per SoC family. More files will be added
      later, as support for mach-orion5x and mach-mv78xx0 SoCs is added to
      pinctrl-mvebu. For those reasons, having a separate subdirectory,
      drivers/pinctrl/mvebu/ makes sense, and it had already been suggested
      by Linus Wallej when the driver was originally submitted.
      Signed-off-by: default avatarThomas Petazzoni <thomas.petazzoni@free-electrons.com>
      Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      06763c74
    • Thomas Petazzoni's avatar
      pinctrl: mvebu: allow plat-orion architectures to use pinctrl-mvebu · 55d2e40d
      Thomas Petazzoni authored
      The mach-kirkwood and mach-dove architectures have not yet been
      integrated into the mach-mvebu directory, which should ultimately
      contain the support for all Marvell SoCs from the Engineering Business
      Unit.
      
      However, before this can happen, we need to let mach-kirkwood and
      mach-dove use the pinctrl-mvebu driver, which supports the kirkwood
      and dove SoC families. In order to do that, we make this driver
      available as soon as PLAT_ORION is selected, instead of using
      ARCH_MVEBU as a condition. In the long term, PLAT_ORION should
      disappear and be fully replaced by ARCH_MVEBU, but the plan is to make
      the migration step by step, by first having the existing mach-*
      directories for Marvell SoCs converge on several infrastructures,
      including the pinctrl one.
      
      Also, like the spear pinctrl driver, we put all pinctrl-mvebu Kconfig
      options under a if, in order to avoid having certain options
      (PINCTRL_DOVE, PINCTRL_KIRKWOOD, etc.) selecting an option
      (PINCTLR_MVEBU) which itself has a dependency (on ARCH_MVEBU). In this
      a construct, the dependency is in fact ignored due to the selects.
      Signed-off-by: default avatarThomas Petazzoni <thomas.petazzoni@free-electrons.com>
      Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      55d2e40d
  18. 06 Nov, 2012 1 commit
    • Axel Lin's avatar
      pinctrl: samsung and exynos need to depend on OF && GPIOLIB · 924da314
      Axel Lin authored
      This patch fixes below build error when !CONFIG_OF_GPIO.
      
        CC      drivers/pinctrl/pinctrl-samsung.o
      drivers/pinctrl/pinctrl-samsung.c: In function 'samsung_pinctrl_parse_dt_pins':
      drivers/pinctrl/pinctrl-samsung.c:557:19: warning: unused variable 'prop' [-Wunused-variable]
      drivers/pinctrl/pinctrl-samsung.c: In function 'samsung_gpiolib_register':
      drivers/pinctrl/pinctrl-samsung.c:797:5: error: 'struct gpio_chip' has no member named 'of_node'
      make[2]: *** [drivers/pinctrl/pinctrl-samsung.o] Error 1
      make[1]: *** [drivers/pinctrl] Error 2
      make: *** [drivers] Error 2
      
      The samsung pinctrl driver supports only device tree enabled
      platforms. Thus make PINCTRL_SAMSUNG depend on OF && GPIOLIB.
      
      The reason to depend on GPIOLIB is CONFIG_OF_GPIO only available
      when GPIOLIB is selected.
      
      Since PINCTRL_EXYNOS4 select PINCTRL_SAMSUNG, thus also make
      PINCTRL_EXYNOS4 depend on OF && GPIOLIB.
      Signed-off-by: default avatarAxel Lin <axel.lin@ingics.com>
      Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      924da314
  19. 13 Oct, 2012 1 commit
  20. 01 Oct, 2012 1 commit
    • Simon Arlott's avatar
      pinctrl: add bcm2835 driver · e1b2dc70
      Simon Arlott authored
      The BCM2835 GPIO module is a combined GPIO controller, (GPIO) interrupt
      controller, and pinmux/control device.
      
      Original driver by Simon Arlott.
      Rewrite including GPIO chip device by Chris Boot.
      
      Upstreaming changes by Stephen Warren:
      * Wrote DT binding documentation.
      * Changed brcm,function to an integer to more directly match the
        datasheet, and to match brcm,pins being an integer.
      * Implemented pull-up/down pin config.
      * Removed read-only DT property and related code. The restriction this
        implemented are driven by the board, not the GPIO HW block, so don't
        really make sense of a HW block binding, were in general incomplete
        (since they could only know about the few pins hard-coded into the
        Raspberry Pi B board design and not the uncommitted GPIOS), and are
        better represented simply by not writing incorrect data into pin
        configuration nodes.
      * Don't set GPIO_IN function select in gpio_request_enable() to avoid
        glitches; defer this to gpio_set_direction(). Consequently, removed
        empty bcm2835_pmx_gpio_request_enable().
      * Simplified enabled_irq_map[]; make it explicitly 1 entry per bank.
      * Lifted use of enabled_irq_map[] outside the per-interrupt loop in
        IRQ handler, thus fixing an issue where the code was indexing into
        enabled_irq_map[] by intra-bank GPIO ID, not global GPIO ID.
      * Removed locking in IRQ handler, since all other code uses
        spin_lock_irqsave() and so guarantees it doesn't run concurrently
        with the handler.
      * Moved duplicated BUILD_BUG_ON()s into probe(). Also check size of
        bcm2835_gpio_pins[].
      * Remove range-checking from bcm2835_pctl_get_groups_count() since we've
        decided to trust the pinctrl core.
      * Made bcm2835_pmx_gpio_disable_free() call bcm2835_pinctrl_fsel_set()
        directly for simplicity.
      * Fixed body of dt_free_map() to match latest dt_node_to_map().
      * Removed GPIO ownership check from bcm2835_pmx_enable() since the pinctrl
        core owns doing this.
      * Made irq_chip and pinctrl_gpio_range .name == MODULE_NAME so it's more
        descriptive.
      * Simplified remove(); removed call to non-existent
        pinctrl_remove_gpio_range(), remove early return on error.
      * Don't force gpiochip's base to 0. Set gpio_range.base to gpiochip's
        base GPIO number.
      * Error-handling cleanups in probe().
      * Switched to module_platform_driver() rather than open-coding.
      * Made pin, group, and function names lower-case.
      * s/broadcom/brcm/ in DT property names.
      * s/2708/2835/.
      * Fixed a couple minor checkpatch warnings, and other minor cleanup.
      Signed-off-by: default avatarSimon Arlott <simon@fire.lp0.eu>
      Signed-off-by: default avatarChris Boot <bootc@bootc.net>
      Signed-off-by: default avatarStephen Warren <swarren@wwwdotorg.org>
      Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      e1b2dc70
  21. 22 Sep, 2012 5 commits
  22. 13 Sep, 2012 2 commits
  23. 06 Sep, 2012 2 commits