- 25 Jun, 2024 1 commit
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Srinivas Kandagatla authored
Add audio support to QCP platform which includes 2 x Speakers Headset Mic and Headset support. Signed-off-by:
Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20240624-qcp-audio-v1-1-323a6b5e1fe5@linaro.orgSigned-off-by:
Bjorn Andersson <andersson@kernel.org>
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- 23 Jun, 2024 10 commits
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Bartosz Golaszewski authored
Add a 20MB reserved memory region for use by SCM calls. Signed-off-by:
Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Link: https://lore.kernel.org/r/20240527-shm-bridge-v10-15-ce7afaa58d3a@linaro.orgSigned-off-by:
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Luca Weiss authored
With the smsm bindings and driver finally supporting mboxes, switch to that and stop using apcs as syscon. Signed-off-by:
Luca Weiss <luca@lucaweiss.eu> Reviewed-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by:
Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20240619-smsm-mbox-dts-v1-5-268ab7eef779@lucaweiss.euSigned-off-by:
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Luca Weiss authored
With the smsm bindings and driver finally supporting mboxes, switch to that and stop using apcs as syscon. Signed-off-by:
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Luca Weiss authored
With the smsm bindings and driver finally supporting mboxes, switch to that and stop using apcs as syscon. Signed-off-by:
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Luca Weiss authored
With the smsm bindings and driver finally supporting mboxes, switch to that and stop using apcs as syscon. Signed-off-by:
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Rajendra Nayak authored
Add tsens and thermal zones nodes for x1e80100 SoC. Signed-off-by:
Rajendra Nayak <quic_rjendra@quicinc.com> Signed-off-by:
Abel Vesa <abel.vesa@linaro.org> Reviewed-by:
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Luca Weiss authored
PM8008 regulators are used for the cameras found on FP5. Configure the chip and its voltages. Signed-off-by:
Luca Weiss <luca.weiss@fairphone.com> Reviewed-by:
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Luca Weiss authored
PM8008 regulators are used for the cameras found on FP4. Configure the chip and its voltages. Signed-off-by:
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Lin, Meng-Bo authored
There is PM8916 Battery voltage monitor on GPLUS FL8005A. Add PM8916 BMS and the battery to the device tree. Signed-off-by:
Lin, Meng-Bo <linmengbo06890@proton.me> Reviewed-by:
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Valeriy Klimin authored
Add the compatible for this device. Signed-off-by:
Valeriy Klimin <vdos63@gmail.com> Acked-by:
Conor Dooley <conor.dooley@microchip.com> Reviewed-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240621-sony-aries-v2-1-dddf10722522@gmail.comSigned-off-by:
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- 21 Jun, 2024 20 commits
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Johan Hovold authored
Enable the PM8008 PMIC which is used to power the camera sensors. Reviewed-by:
Bryan O'Donoghue <bryan.odonoghue@linaro.org> Tested-by:
Johan Hovold <johan+linaro@kernel.org> Reviewed-by:
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Tengfei Fan authored
Add AIM300 AIoT Carrier board DTS support, including usb, UART, PCIe, I2C functions support. Here is a diagram of AIM300 AIoT Carrie Board and SoM +--------------------------------------------------+ | AIM300 AIOT Carrier Board | | | | +-----------------+ | |power----->| Fixed regulator |---------+ | | +-----------------+ | | | | | | v VPH_PWR | | +----------------------------------------------+ | | | AIM300 SOM | | | | | |VPH_PWR | | | | v | | | | +-------+ +--------+ +------+ | | | | | UFS | | QCS8550| |PMIC | | | | | +-------+ +--------+ +------+ | | | | | | | +----------------------------------------------+ | | | | +----+ +------+ | | |USB | | UART | | | +----+ +------+ | +--------------------------------------------------+ Co-developed-by:
Qiang Yu <quic_qianyu@quicinc.com> Signed-off-by:
Ziyue Zhang <quic_ziyuzhan@quicinc.com> Signed-off-by:
Tengfei Fan <quic_tengfan@quicinc.com> Link: https://lore.kernel.org/r/20240618072202.2516025-5-quic_tengfan@quicinc.comSigned-off-by:
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Tengfei Fan authored
AIM300 Series is a highly optimized family of modules designed to support AIoT applications. It integrates QCS8550 SoC, UFS and PMIC chip etc. Here is a diagram of AIM300 SoM: +----------------------------------------+ |AIM300 SoM | | | | +-----+ | | |--->| UFS | | | | +-----+ | | | | | | | 3.7v | +-----------------+ | +---------+ | ---------->| PMIC |----->| QCS8550 | | | +-----------------+ +---------+ | | | | | | | | | +-----+ | | |--->| ... | | | +-----+ | | | +----------------------------------------+ Co-developed-by:Fenglin Wu <quic_fenglinw@quicinc.com> Signed-off-by:
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Tengfei Fan authored
QCS8550 is derived from SM8550. The difference between SM8550 and QCS8550 is QCS8550 doesn't have modem RF system. QCS8550 is mainly used in IoT products. QCS8550 firmware has different memory map compared to SM8550. The memory map will be runtime added through bootloader. There are 3 types of reserved memory regions here: 1. Firmware related regions which aren't shared with kernel. The device tree source in kernel doesn't need to have node to indicate the firmware related reserved information. Bootloader converys the information by updating devicetree at runtime. This will be described as: UEFI saves the physical address of the UEFI System Table to dts file's chosen node. Kernel read this table and add reserved memory regions to efi config table. Current reserved memory region may have reserved region which was not yet used, release note of the firmware have such kind of information. 2. Firmware related memory regions which are shared with Kernel The device tree source in the kernel needs to include nodes that indicate fimware-related shared information. A label name is suggested because this type of shared information needs to be referenced by specific drivers for handling purposes. Unlike previous platforms, QCS8550 boots using EFI and describes most reserved regions in the ESRT memory map. As a result, reserved memory regions which aren't relevant to the kernel(like the hypervisor region) don't need to be described in DT. 3. Remoteproc regions. Remoteproc regions will be reserved and then assigned to subsystem firmware later. Here is a reserved memory map for this platform: 0x80000000 +-------------------+ | | | Firmware Related | | | 0x8a800000 +-------------------+ | | | Remoteproc Region | | | 0xa7000000 +-------------------+ | | | Kernel Available | | | 0xd4d00000 +-------------------+ | | | Firmware Related | | | 0x100000000 +-------------------+ Reviewed-by: -
Tengfei Fan authored
Document QCS8550 SoC and the AIM300 AIoT board bindings. QCS8550 is derived from SM8550. The difference between SM8550 and QCS8550 is QCS8550 doesn't have modem RF system. QCS8550 is mainly used in IoT scenarios. AIM300 Series is a highly optimized family of modules designed to support AIoT applications. It integrates QCS8550 SoC, UFS and PMIC chip etc. AIM stands for Artificial Intelligence Module. AIoT stands for AI IoT. Reviewed-by:
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Komal Bajaj authored
Update the usb interrupts properties to fix the following bindings check errors: usb@a6f8800: interrupt-names:0: 'pwr_event' was expected from schema $id: http://devicetree.org/schemas/usb/qcom,dwc3.yaml# usb@a6f8800: interrupt-names:1: 'hs_phy_irq' was expected from schema $id: http://devicetree.org/schemas/usb/qcom,dwc3.yaml# usb@a6f8800: interrupt-names: ['hs_phy_irq', 'ss_phy_irq', 'dm_hs_phy_irq', 'dp_hs_phy_irq'] is too short from schema $id: http://devicetree.org/schemas/usb/qcom,dwc3.yaml# Fixes: dd1bd5bf ("arm64: dts: qcom: qdu1000: Add USB3 and PHY support") Cc: Krishna Kurapati <quic_kriskura@quicinc.com> Reported-by:kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202406171241.YKuCm3SC-lkp@intel.com/Signed-off-by:
Komal Bajaj <quic_kbajaj@quicinc.com> Reviewed-by:
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Bartosz Golaszewski authored
Add a node for the PMU module of the QCA6391 present on the RB5 board. Assign its LDO power outputs to the existing Bluetooth module. Add a node for the PCIe port to sm8250.dtsi and define the WLAN node on it in the board's .dts and also make it consume the power outputs of the PMU. Tested-by: Caleb Connolly <caleb.connolly@linaro.org> # OnePlus 8T Signed-off-by:
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Neil Armstrong authored
Describe the ath12k WLAN on-board the WCN7850 module present on the board. Signed-off-by:
Neil Armstrong <neil.armstrong@linaro.org> Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8650-HDK Signed-off-by:
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Bartosz Golaszewski authored
Describe the ath12k WLAN on-board the WCN7850 module present on the board. [Neil: authored the initial version of the change] Co-developed-by:
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Bartosz Golaszewski authored
Describe the ath12k WLAN on-board the WCN7850 module present on the board. [Neil: authored the initial version of the change] Co-developed-by:
Amit Pundir <amit.pundir@linaro.org> Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-QRD Signed-off-by:
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Lin, Meng-Bo authored
Enable sound and modem for the GPLUS FL8005A. The setup is similar to most MSM8916 devices, i.e.: - QDSP6 audio - Earpiece/headphones/microphones via digital/analog codec in MSM8916/PM8916 - WWAN Internet via BAM-DMUX Signed-off-by:
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Luca Weiss authored
Without explicitly specifying names for the regulators they are named based on the DeviceTree node name. This results in multiple regulators with the same name, making debug prints and regulator_summary impossible to reason about. Signed-off-by:
Caleb Connolly <caleb@postmarketos.org> Link: https://lore.kernel.org/r/20240618-qcm6490-regulator-name-v1-2-69fa05e9f58e@fairphone.comSigned-off-by:
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Luca Weiss authored
Without explicitly specifying names for the regulators they are named based on the DeviceTree node name. This results in multiple regulators with the same name, making debug prints and regulator_summary impossible to reason about. Signed-off-by:
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Komal Bajaj authored
Add secure qfprom node and also add properties for multi channel DDR. This is required for LLCC driver to pick the correct LLCC configuration. Fixes: 6209038f ("arm64: dts: qcom: qdu1000: Add LLCC/system-cache-controller") Signed-off-by:
Mukesh Ojha <quic_mojha@quicinc.com> Link: https://lore.kernel.org/r/20240618092711.15037-1-quic_kbajaj@quicinc.comSigned-off-by:
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Nícolas F. R. A. Prado authored
Currently the keyboard backlight is described in the common sc7180-trogdor dtsi as an led node below a pwmleds node, and the led node is set to disabled. Only the boards that have a keyboard backlight enable it. However, since the parent pwmleds node is still enabled everywhere, even on boards that don't have keyboard backlight it is probed and fails, resulting in an error: leds_pwm pwmleds: probe with driver leds_pwm failed with error -22 as well as a failure in the DT kselftest: not ok 45 /pwmleds Fix this by controlling the status of the parent pwmleds node instead of the child led, based on the presence of keyboard backlight. This is what is done on sc7280 already. While at it add a missing blank line before the child node to follow the coding style. Fixes: 7ec3e673 ("arm64: dts: qcom: sc7180-trogdor: add initial trogdor and lazor dt") Signed-off-by:
Nícolas F. R. A. Prado <nfraprado@collabora.com> Reviewed-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by:
Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20240614-sc7180-pwmleds-probe-v1-1-e2c3f1b42a43@collabora.comSigned-off-by:
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Dmitry Baryshkov authored
There is no need to specify exact name for the second (AUX) output clock. It has never been used for the lookups based on the system clock name. The driver generates it on its own, in order to remain compatible with the older DT. Drop the clock name. Fixes: d00b42f1 ("arm64: dts: qcom: sm8650: remove pcie-1-phy-aux-clk and add pcie1_phy pcie1_phy_aux_clk") Signed-off-by:
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Dmitry Baryshkov authored
There is no need to specify exact name for the second (AUX) output clock. It has never been used for the lookups based on the system clock name. The driver generates it on its own, in order to remain compatible with the older DT. Drop the clock name. Fixes: 0cc97d9e ("arm64: dts: qcom: sm8550: remove pcie-1-phy-aux-clk and add pcie1_phy pcie1_phy_aux_clk") Signed-off-by:
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Dmitry Baryshkov authored
There is no need to specify exact name for the second (AUX) output clock. It has never been used for the lookups based on the system clock name. The driver generates it on its own, in order to remain compatible with the older DT. Drop the clock name. Fixes: e7686284 ("arm64: dts: qcom: sm8450: correct pcie1 phy clocks inputs to gcc") Signed-off-by:
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Bjorn Andersson authored
The Embedded Controller in the Lenovo Yoga C630 is accessible on &i2c1 and provides battery and adapter status, as well as altmode notifications for the second USB Type-C port. Add a definition for the EC. Signed-off-by:
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Dmitry Baryshkov authored
Describe links between the first USB3 host and the DisplayPort that is routed to the same pins. Reviewed-by:
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- 13 Jun, 2024 6 commits
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Raymond Hackley authored
Enable sound and modem for Acer Iconia Talk S A1-724. The setup is similar to most MSM8916 devices, i.e.: - QDSP6 audio - Earpiece/headphones/microphones via digital/analog codec in MSM8916/PM8916 - WWAN Internet via BAM-DMUX Signed-off-by:
Raymond Hackley <raymondhackley@protonmail.com> Link: https://lore.kernel.org/r/20240609100243.834169-1-raymondhackley@protonmail.comSigned-off-by:
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Konrad Dybcio authored
Enable the A702 GPU (also marketed as "3D accelerator by qcom [1], lol). [1] https://docs.qualcomm.com/bundle/publicresource/87-61720-1_REV_A_QUALCOMM_ROBOTICS_RB1_PLATFORM__QUALCOMM_QRB2210__PRODUCT_BRIEF.pdfReviewed-by:
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Konrad Dybcio authored
Describe the GPU hardware on the QCM2290. Reviewed-by:
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Bjorn Andersson authored
Merge the QCM2290 GPUCC DeviceTree binding from the topic branch, to make available the clock constants that subsequent commits depend on.
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Konrad Dybcio authored
Add device tree bindings for graphics clock controller for Qualcomm Technology Inc's QCM2290 SoCs. Reviewed-by:
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Luca Weiss authored
Specify the file name for the squashed/non-split firmware with the .mbn extension instead of the split .mdt. The kernel can load both but the squashed version is preferred in dts nowadays. Signed-off-by:
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- 07 Jun, 2024 3 commits
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Konrad Dybcio authored
Add an 85C passive trip point to ensure the thermal framework takes sufficient action to prevent reaching junction temperature and a 110C critical point to help avoid hw damage. Also, register the GPU as a cooling device and hook it up to the right thermal zones. Signed-off-by:
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Konrad Dybcio authored
Add an 85C passive trip point to ensure the thermal framework takes sufficient action to prevent reaching junction temperature and a 110C critical point to help avoid hw damage. Remove the copypasta-from-downstream userspace governor entries while at it. Signed-off-by:
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Konrad Dybcio authored
Add an 85C passive trip point to ensure the thermal framework takes sufficient action to prevent reaching junction temperature and a 110C critical point to help avoid hw damage. Remove the copypasta-from-downstream userspace governor entries while at it. Signed-off-by:
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