- 04 Oct, 2011 15 commits
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Felipe Balbi authored
The dwc3 core has internal clock gating support. Let's allow that to happen by clearing the disable bit in GCTL register. Signed-off-by:
Felipe Balbi <balbi@ti.com> Signed-off-by:
Greg Kroah-Hartman <gregkh@suse.de>
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Felipe Balbi authored
cache the contents of GHWPARAMS* registers in our device structure for easy access. Signed-off-by:
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Felipe Balbi authored
That structure will hold a copy of readonly GHWPARAMS* registers for ease accessing by the driver. Signed-off-by:
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Felipe Balbi authored
The following patch adds support for streams to dwc3 driver. While at that, also fix one small issue on endpoint disable where we should clear all flags not only ENABLED. Reviewied-by:
Paul Zimmerman <paulz@synopsys.com> Signed-off-by:
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Felipe Balbi authored
We already have the value from gadget drivers, just need to pass it to our controller. Signed-off-by:
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Paul Zimmerman authored
Fix offset calculation in dwc3_trb_dma_offset() Signed-off-by:
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Paul Zimmerman authored
This makes DWC3_EP_WEDGE do the right thing, which is prevent DWC3_EP_WEDGE from ever being cleared by a ClearFeature(HALT) command. [ balbi@ti.com : allowed set_wedge to send SetHalt command to controller ] Signed-off-by:
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Paul Zimmerman authored
An older version of the databook said to wait for the FIFO to drain, but that has been removed from the newer databooks. Waiting for RxFIFO to drain caused problems when testing against one of the host controllers available in the market. After talking to one of the RTL engineers, he stated that we should _not_ wait for RxFIFO to drain. Signed-off-by:
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Paul Zimmerman authored
DEPSTARTCFG for non-EP0 EPs must only be sent once per config [ balbi@ti.com : changed config_start to start_config_issued ] Signed-off-by:
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Sebastian Andrzej Siewior authored
Some people think that this line is not compatible with the GPL. The statement was required due to the Buenos Aires Convention and is now deprecated. I remove it because it is said that it is pointless nowdays. Signed-off-by:
Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by:
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Sebastian Andrzej Siewior authored
Use "ep0in" and "ep0out" instead "ep1in" and "ep0out" which is confusing and not consistent with the remaining output. Signed-off-by:
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Sebastian Andrzej Siewior authored
We already give requests back in dwc3_ep0_stall_and_restart() so doing it again here will most likely corrupt the list. Signed-off-by:
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Felipe Balbi authored
The way it was before was really meaningless. Now it looks saner. Signed-off-by:
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Felipe Balbi authored
We don't need to care about direction on a two stage transfer. Signed-off-by:
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Felipe Balbi authored
According to USB 3.0 Specification, a SetAddress() while device is in Configured State has an unspecified behavior (see Section 9.4.6). Still USB30CV wasn't happy with my Stall reply. To make that thing happy, just accept the SetAddress() always. No problems have been observed thus far. Signed-off-by:
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- 29 Sep, 2011 4 commits
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Jon Levell authored
My webcam is a Logitech C300 and I get "chipmunk"ed squeaky sound. The following trivial patch fixes it. Signed-off-by:
Jon Levell <linuxusb@coralbark.net> Cc: stable <stable@kernel.org> Signed-off-by:
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Serge Hallyn authored
Add to the dev_state and alloc_async structures the user namespace corresponding to the uid and euid. Pass these to kill_pid_info_as_uid(), which can then implement a proper, user-namespace-aware uid check. Changelog: Sep 20: Per Oleg's suggestion: Instead of caching and passing user namespace, uid, and euid each separately, pass a struct cred. Sep 26: Address Alan Stern's comments: don't define a struct cred at usbdev_open(), and take and put a cred at async_completed() to ensure it lasts for the duration of kill_pid_info_as_cred(). Signed-off-by:
Serge Hallyn <serge.hallyn@canonical.com> Cc: Oleg Nesterov <oleg@redhat.com> Cc: "Eric W. Biederman" <ebiederm@xmission.com> Cc: Tejun Heo <tj@kernel.org> Signed-off-by:
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Dan Carpenter authored
"length" is type size_t so the cast to unsigned int truncates the upper bytes. This isn't an issue in real life (I've checked the callers) but it's a bit messy. Signed-off-by:
Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by:
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Rigbert Hamisch authored
add device ID for "HP un2430 Mobile Broadband Module" Signed-off-by:
Rigbert Hamisch <rigbert@gmx.de> Cc: stable <stable@kernel.org> Signed-off-by:
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- 26 Sep, 2011 21 commits
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Matthias Dellweg authored
In the usb printer class specific request get_device_id the value of wIndex is (interface << 8 | altsetting) instead of just interface. This enables the detection of some printers with libusb. Acked-by:
Alan Stern <stern@rowland.harvard.edu> Signed-off-by:
Matthias Dellweg <2500@gmx.de> Cc: stable <stable@kernel.org> Signed-off-by:
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Serge Hallyn authored
Alan Stern points out that after spin_unlock(&ps->lock) there is no guarantee that ps->pid won't be freed. Since kill_pid_info_as_uid() is called after the spin_unlock(), the pid passed to it must be pinned. Reported-by:
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Alan Stern authored
This patch (as1488) improves the comments and logic in uhci-hcd's suspend routine. The existing comments are hard to understand and don't give a good idea of what's really going on. The question of whether EGSM (Enter Global Suspend Mode) and RD (enable Resume Detect interrupts) can be useful when they're not both set is difficult. The spec doesn't give any details on how they interact with system wakeup, although clearly they are meant to be used together. To be safe, the patch changes the subroutine so that neither bit gets set unless they both do. There shouldn't be any functional changes from this; only systems that are designed badly or broken in some way need to avoid using those bits. Signed-off-by:
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Alan Stern authored
This patch (as1486) implements the kernel's new wakeup policy for USB host controllers. Since they don't generate wakeup requests on their but merely forward requests from their root hubs toward the CPU, they should be enabled for wakeup by default. Also, to be compliant with both the old and new policies, root hubs should not be enabled for remote wakeup by default. Userspace must enable it explicitly if it is desired. Signed-off-by:
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Sebastian Andrzej Siewior authored
This removes the need of ifdefs within the init function and with it the headache about the correct clean without bus X but with bus/platform Y & Z. xhci-pci is only compiled if CONFIG_PCI is selected which can be de-selected now without trouble. For now the result is kinda useless because we have no other glue code. However, since nobody is using USB_ARCH_HAS_XHCI then it should not be an issue :) Signed-off-by:
Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by:
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Sebastian Andrzej Siewior authored
xhci_gen_setup() is generic so it can be used to perform the bare xhci setup even on non-pci based platform. The typedef for the function pointer is moved into the headerfile Signed-off-by:
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Sebastian Andrzej Siewior authored
xhci_pci_setup() is split into three pieces: - xhci_gen_setup() The major remaining of xhci_pci_setup() is now containing the generic part of the xhci setup. It allocates the xhci struct, setup hcs_params? and friends, performs xhci_halt(), xhci_init and so one. It also obtains the quirks via a callback - xhci_pci_quirks() It checks the origin of the xhci core and sets core specific quirks. - xhci_pci_setup() PCI specific setup functions. Besides calling xhci_gen_setup() with xhci_pci_quirks() as an argument it performs PCI specific setup like obtaining the address of sbrn via a PCI config space. Signed-off-by:
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Sebastian Andrzej Siewior authored
pci_*_consistent() calls dma_*_coherent() with GFP_ATOMIC and requires pci_dev struct. This is a preparion for later where we no longer have the pci struct around. Signed-off-by:
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Sebastian Andrzej Siewior authored
The MSI related fuctionality requires a few structs which are not available if CONFIG_PCI is not enabled. This is a prepartion to allow xhci be built without CONFIG_PCI set. Signed-off-by:
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Sebastian Andrzej Siewior authored
This patch moves the complete MSI/MSI-X/Legacy dance into its own function. There is however one difference: If the XHCI_BROKEN_MSI flag is set then we don't free and register the irq, we simply return. This is preparation for later PCI decouple. Signed-off-by:
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Felipe Balbi authored
to make it look like OHCI and EHCI, we introduce that symbol and USB_XHCI_HCD depend on that instead of PCI. [bigeasy@linutronix.de: wire up USB_ARCH_HAS_HCD] Signed-off-by:
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Andiry Xu authored
Fix the debug message in xhci_address_device(). Signed-off-by:
Andiry Xu <andiry.xu@amd.com> Signed-off-by:
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Andiry Xu authored
Setting the chain (CH) bit in the link TRB of isochronous transfer rings is required by AMD 0.96 xHCI host controller to successfully transverse multi-TRB TD that span through different memory segments. When a Missed Service Error event occurs, if the chain bit is not set in the link TRB and the host skips TDs which just across a link TRB, the host may falsely recognize the link TRB as a normal TRB. You can see this may cause big trouble - the host does not jump to the right address which is pointed by the link TRB, but continue fetching the memory which is after the link TRB address, which may not even belong to the host, and the result cannot be predicted. This causes some big problems. Without the former patch I sent: "xHCI: prevent infinite loop when processing MSE event", the system may hang. With that patch applied, system does not hang, but the host still access wrong memory address and isoc transfer will fail. With this patch, isochronous transfer works as expected. This patch should be applied to kernels as old as 2.6.36, which was when the first isochronous support was added for the xHCI host controller. Signed-off-by:
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Andiry Xu authored
This patch adds sysfs support to xHCI usb2 hardware LPM, so developer can enable and disable usb2 hardware LPM manually for test purpose. Signed-off-by:
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Andiry Xu authored
If the device pass the USB2 software LPM and the host supports hardware LPM, enable hardware LPM for the device to let the host decide when to put the link into lower power state. If hardware LPM is enabled for a port and driver wants to put it into suspend, it must first disable hardware LPM, resume the port into U0, and then suspend the port. Signed-off-by:
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Andiry Xu authored
This patch tests USB2 software LPM for a USB2 LPM-capable device. When a lpm-capable device is addressed, if the host also supports software LPM, apply a test by putting the device into L1 state and resume it to see if the device can do L1 suspend/resume successfully. If the device fails to enter L1 or resume from L1 state, it may not function normally and usbcore may disconnect and re-enumerate it. In this case, store the device's Vid and Pid information, make sure the host will not test LPM for it twice. The test result is per device/host. Some devices claim to be lpm-capable, but fail to enter L1 or resume. So the test is necessary. The xHCI 1.0 errata has modified the USB2.0 LPM implementation. It redefines the HIRD field to BESL, and adds another register Port Hardware LPM Control (PORTHLPMC). However, this should not affect the LPM behavior on xHC which does not implement 1.0 errata. USB2.0 LPM errata defines a new bit BESL in the device's USB 2.0 extension descriptor. If the device reports it uses BESL, driver should use BESL instead of HIRD for it. Signed-off-by:
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Andiry Xu authored
Check the host's USB2 LPM capability. USB2 software LPM support is optional for xHCI 0.96 hosts. xHCI 1.0 hosts should support software LPM, and may support hardware LPM. Signed-off-by:
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Andiry Xu authored
When the link state changes, xHC will report a port status change event and set the PORT_PLC bit, for both USB3 and USB2 root hub ports. The PLC will be cleared by usbcore for USB3 root hub ports, but not for USB2 ports, because they do not report USB_PORT_STAT_C_LINK_STATE in wPortChange. Clear it for USB2 root hub ports in handle_port_status(). Signed-off-by:
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Andiry Xu authored
Introduce xhci_test_and_clear_bit() to clear RWC bit in PORTSC register. Signed-off-by:
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Andiry Xu authored
Introduce xhci_set_link_state() to remove redundant codes. Signed-off-by:
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Andiry Xu authored
Check device's LPM capability by examining the bmAttibutes field of the USB2.0 Extension Descriptor. Signed-off-by:
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