- 15 Jun, 2018 40 commits
-
-
Harry Wentland authored
DC has an upcoming change that requires these to read the board layout. Signed-off-by:
Harry Wentland <harry.wentland@amd.com> Reviewed-by:
Alex Deucher <alexander.deucher@amd.com> Signed-off-by:
-
Junwei Zhang authored
Don't need validation list any more Signed-off-by:
Junwei Zhang <Jerry.Zhang@amd.com> Reviewed-by:
David Zhou <david1.zhou@amd.com> Reviewed-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
-
David Panariti authored
SQ can generate interrupts and installs the ISR to handle the SQ interrupts. Add parsing SQ data in interrupt handler. v2: Remove CZ only limitation. Rebase. Signed-off-by:
David Panariti <David.Panariti@amd.com> Signed-off-by:
Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by:
Nicolai Hähnle <nicolai.haehnle@amd.com> Signed-off-by:
-
David Panariti authored
SQ can generate interrupts on EDC/ECC errors and this struct controls how the interrupt is handled. The guts are filled in in the gf_v<major>_<minor>.c files. v2: Rebase. Signed-off-by:
-
David Panariti authored
ISR will DRM_ERROR ECC error message. v2: Remove CZ only limitation. Rebase. Signed-off-by:
-
Shirish S authored
This patch is extends the usage of WB in gfx8's ib test which was originally implemented in the below upstream patch "ed9324af drm/amdgpu: change gfx9 ib test to use WB" For reference below are the reasons for switching to WB: 1)Because when doing IB test we don't want to involve KIQ health status affect, and since SCRATCH register access is go through KIQ that way GFX IB test would failed due to KIQ fail. 2)acccessing SCRATCH register cost much more time than WB method because SCRATCH register access runs through KIQ which at least could begin after GPU world switch back to current Guest VF Signed-off-by:
Shirish S <shirish.s@amd.com> Reviewed-by:
-
Emily Deng authored
For buffer object that has shadow buffer, need twice commands. Signed-off-by:
Emily Deng <Emily.Deng@amd.com> Reviewed-by:
-
Boyuan Zhang authored
Add AMDGPU_HW_IP_VCN_JPEG to queue mgr Signed-off-by:
Boyuan Zhang <boyuan.zhang@amd.com> Reviewed-by:
-
Boyuan Zhang authored
Add AMDGPU_HW_IP_VCN_JPEG to info query Signed-off-by:
-
Boyuan Zhang authored
Add AMDGPU_HW_IP_VCN_JPEG define for jpeg CS Signed-off-by:
-
Boyuan Zhang authored
Enable vcn jpeg ib ring test in amdgpu_ib.c Signed-off-by:
-
Boyuan Zhang authored
Add an ib test for vcn jpeg. Signed-off-by:
-
Boyuan Zhang authored
Add a ring test for vcn jpeg. Signed-off-by:
-
Boyuan Zhang authored
Add software finish for vcn jpeg ring. v2: remove unnecessary scheduler entity. Signed-off-by:
-
Boyuan Zhang authored
Add patch commands to jepg ring by calling set patch ring function. v2: remove modifications on max_dw, buf_mask and ptr_mask, since we are now using extra_dw for jpeg ring. Signed-off-by:
-
Boyuan Zhang authored
Define extra dword for jpeg ring. Jpeg ring will allocate extra dword to store the patch commands for fixing the known issue. v2: dropping extra_dw for rings other than jpeg. Signed-off-by:
-
Boyuan Zhang authored
Implement a patch to maunally reset read pointer v2: using ring assignment instead of amdgpu_ring_write. adding comments for each steps in the patch function. v3: fixing a typo bug. v4: fixing a bug in v3. Signed-off-by:
-
Boyuan Zhang authored
Add implementations for vcn jpeg ring initialization Signed-off-by:
-
Boyuan Zhang authored
Add vcn jpeg irq support. Signed-off-by:
-
Boyuan Zhang authored
Set all vcn jpeg ring function pointers. Signed-off-by:
-
Boyuan Zhang authored
Implement all ring functions needed for jpeg ring v2: remove unnecessary mem read function. Signed-off-by:
-
Boyuan Zhang authored
Add more jpeg registers defines that are needed for jpeg ring functions Signed-off-by:
-
Boyuan Zhang authored
Add new packet for vcn jpeg, including condition checks, types and packet Signed-off-by:
-
Boyuan Zhang authored
Add jpeg to amdgpu_vcn v2: remove unnecessary scheduler entity Signed-off-by:
-
Boyuan Zhang authored
Add AMDGPU_RING_TYPE_VCN_JPEG ring define Signed-off-by:
-
Andrey Grodzovsky authored
With this we can now terminate jobs enqueue into SW queue the moment the task is being killed instead of waiting for last user of drm file to release it. Also stop checking for kref_read(&ctx->refcount) == 1 when calling drm_sched_entity_do_release since other task might still hold a reference to this entity but we don't care since KILL means terminate job submission regardless of what other tasks are doing. v2: Use returned remaining timeout as parameter for the next call. Rebase. v3: Switch to working with jiffies. Streamline remainder TO usage. Rebase. v4: Rebase. Signed-off-by:
-
Andrey Grodzovsky authored
Dying process might be blocked from receiving any more signals so avoid using it. Also retire enity->fini_status and just check the SW queue, if it's not empty do the fallback cleanup. Also handle entity->last_scheduled == NULL use case which happens when HW ring is already hangged whem a new entity tried to enqeue jobs. v2: Return the remaining timeout and use that as parameter for the next call. This way when we need to cleanup multiple queues we don't wait for the entire TO period for each queue but rather in total. Styling comments. Rebase. v3: Update types from unsigned to long. Work with jiffies instead of ms. Return 0 when TO expires. Rebase. v4: Remove unnecessary timeout calculation. Signed-off-by:
-
Michel Dänzer authored
Reviewed-by:
Michel Dänzer <michel.daenzer@amd.com> Signed-off-by:
-
Michel Dänzer authored
* Fix format of return value descriptions * Document all parameters of amdgpu_bo_free_kernel * Document amdgpu_bo_get_preferred_pin_domain Reviewed-by:
-
Michel Dänzer authored
Reviewed-by:
-
Shirish S authored
This patch replaces kzalloc's flag from GFP_KERNEL to GFP_ATOMIC to avoid sleeping in atomic context. Below is the stack trace: BUG: sleeping function called from invalid context at mm/slab.h:*** in_atomic(): 1, irqs_disabled(): 0, pid: 1137, name: DrmThread CPU: 1 PID: 1137 Comm: DrmThread Tainted: G W 4.14.43 #10 Call Trace: dump_stack+0x4d/0x63 ___might_sleep+0x11f/0x12e __kmalloc+0x76/0x126 amdgpu_atom_execute_table_locked+0xfc/0x285 amdgpu_atom_execute_table+0x5d/0x72 transmitter_control_v1_5+0xef/0x11a hwss_edp_backlight_control+0x132/0x151 dce110_disable_stream+0x133/0x16e core_link_disable_stream+0x1c5/0x23b dce110_reset_hw_ctx_wrap+0xb4/0x1aa dce110_apply_ctx_to_hw+0x4e/0x6da ? generic_reg_get+0x1f/0x33 dc_commit_state+0x33f/0x3d2 amdgpu_dm_atomic_commit_tail+0x2cf/0x5d2 ? wait_for_common+0x5b/0x69 commit_tail+0x42/0x64 drm_atomic_helper_commit+0xdc/0xf9 drm_atomic_helper_set_config+0x5c/0x76 __drm_mode_set_config_internal+0x64/0x105 drm_mode_setcrtc+0x474/0x56f ? drm_mode_getcrtc+0x155/0x155 drm_ioctl_kernel+0x6c/0xa8 drm_ioctl+0x267/0x353 ? drm_mode_getcrtc+0x155/0x155 amdgpu_drm_ioctl+0x4f/0x7f vfs_ioctl+0x21/0x2f do_vfs_ioctl+0x4c4/0x4e7 ? security_file_ioctl+0x3b/0x4f SyS_ioctl+0x57/0x79 do_syscall_64+0x64/0x72 entry_SYSCALL_64_after_hwframe+0x3d/0xa2 V2: Added stack trace in commit message. Signed-off-by:
-
Michel Dänzer authored
Reviewed-by:
-
Michel Dänzer authored
Reviewed-by:
-
Michel Dänzer authored
So that it can be referenced from e.g. DOC comments. Reviewed-by:
-
Alex Deucher authored
Switch hawaii and bonaire to use powerplay rather than the old dpm implementation. Powerplay supports more features and is better maintained. Ultimately, we can drop the older dpm implementation like we did for other older asics. Reviewed-by:
Huang Rui <ray.huang@amd.com> Reviewed-by:
Rex Zhu <rezhu@amd.com> Signed-off-by:
-
Alex Deucher authored
It's required for displays on Raven. The DCN bandwidth calcs use floating point, but DCN is APU only and it already depends on X86. Reviewed-by:
-
Alex Deucher authored
Just enable it always. This was leftover from feature bring up. Reviewed-by:
-
Samuel Li authored
Document the GEM domains exposed to userspace. Suggested-by:
Samuel Li <Samuel.Li@amd.com> Reviewed-by:
-
Samuel Li authored
Document the amdgpu buffer object API. v2: Add a DOC section and some more clarification. v3: Add some clarification and fix a spelling. Suggested-by:
-
Tony Cheng authored
Signed-off-by:
Tony Cheng <tony.cheng@amd.com> Acked-by:
-
