- 20 Jan, 2021 4 commits
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Chris Wilson authored
When flushing objects larger than the CPU cache it is preferrable to use a single wbinvd() rather than overlapping clflush(). At runtime, we avoid wbinvd() due to its system-wide latencies, but during singlethreaded suspend, no one will observe the imposed latency and we can opt for the faster wbinvd to clear all objects in a single hit. Signed-off-by:
Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by:
Matthew Auld <matthew.auld@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210119214336.1463-1-chris@chris-wilson.co.uk
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Matthew Auld authored
Sanity check the object size before allocating a new gem object. Fixes: 97d55396 ("drm/i915/region: convert object_create into object_init") Testcase: igt/gem_create/create-massive Signed-off-by:
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John Harrison authored
There is a module parameter for controlling what GuC/HuC features are enabled. Setting to -1 means 'use the default'. However, the default was not well defined, out of date and needs to be different across platforms. The default is now to disable both GuC and HuC on legacy platforms where legacy means TGL/RKL and anything prior to Gen12. For new platforms, the default is to load HuC but not enable GuC submission as that has not landed yet. Signed-off-by:
John Harrison <John.C.Harrison@Intel.com> Reviewed-by:
Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Signed-off-by:
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Chris Wilson authored
If we enable_breadcrumbs for a request while that request is being removed from HW; we may see that the request is active as we take the ce->signal_lock and proceed to attach the request to ce->signals. However, during unsubmission after marking the request as inactive, we see that the request has not yet been added to ce->signals and so skip the removal. Pull the check during cancel_breadcrumbs under the same spinlock as enabling so that we the two tests are consistent in enable/cancel. Otherwise, we may insert a request onto ce->signals that we expect should not be there: intel_context_remove_breadcrumbs:488 GEM_BUG_ON(!__i915_request_is_complete(rq)) While updating, we can note that we are always called with irqs-disabled, due to the engine->active.lock being held at the single caller, and so remove the irqsave/restore making it symmetric to enable_breadcrumbs. Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/2931 Fixes: c18636f7 ("drm/i915: Remove requirement for holding i915_request.lock for breadcrumbs") Signed-off-by:
Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210119162057.31097-1-chris@chris-wilson.co.uk
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- 19 Jan, 2021 15 commits
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Chris Wilson authored
Currently, if a modeset/pageflip needs to wait for render completion to an object, we boost the priority of that rendering above all other work. We can apply the same interactive priority boosting to explicit fences that we can unwrap into a native i915_request (i.e. sync_file). Signed-off-by:
Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210119204454.10343-1-chris@chris-wilson.co.uk
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Chris Wilson authored
flush_write_domain() is only used within the GEM domain management code, so move it to i915_gem_domain.c and drop the export. Signed-off-by:
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Matthew Auld authored
In a few places we always end up mapping the pool object with the FORCE constraint(to prevent hitting -EBUSY) which will destroy the cached mapping if it has a different type. As a simple first step, make the mapping type part of the pool interface, where the behaviour is to only give out pool objects which match the requested mapping type. Suggested-by:
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Matthew Auld authored
Looks like it belongs there anyway, otherwise we have to include the entirety of i915_gem_object.h just to get at the enum. Signed-off-by:
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CQ Tang authored
io_mapping_map_wc() expects the offset to be relative to the iomapping base address. Currently we just pass in the physical address for the page which only works if the region.start starts at zero. Signed-off-by:
CQ Tang <cq.tang@intel.com> Signed-off-by:
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Kui Wen authored
For the device local-memory case, sgt.pfn will always be equal to zero, since we instead use sgt.dma. Also, for device local-memory it is perfectly valid for it to start from zero anyway, so no need to add a new check for that either. Signed-off-by:
Kui Wen <kui.wen@intel.com> Signed-off-by:
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Chris Wilson authored
Rather than trying to avoid the use-after-free possible with the current context chasing, simply remove presentation of the per-client stats from debugfs. While we know from bug reports that this debugfs/i915_gem_objects has been used by chromeos (and chrome itself) for debug purposes, google suggests that it is unparsed, so we are free to invoke debugfs is not ABI and remove details from it. Suggested-by:
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Chris Wilson authored
The benefit of only resetting a single engine is that we leave other streams of userspace work intact across a hang; vital for process isolation. We had wired up individual engine resets for gen6, but only enabled it from gen8; now let's turn it on for the forgotten gen7. gen6 is still a mystery as how to unravel some global state that appears to be reset along with an engine (in particular the ppgtt enabling in GFX_MODE). Signed-off-by:
Mika Kuoppala <mika.kuoppala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210119110802.22228-6-chris@chris-wilson.co.uk
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Chris Wilson authored
Take advantage of calling xcs_resume under a forcewake by using direct mmio access. In particular, we can avoid the sleeping variants to allow resume to be called from softirq context, required for engine resets. v2: Keep the posting read at the start of resume as a guardian memory barrier. Signed-off-by:
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Chris Wilson authored
During the reset of ring submission, we first stop the engine by clearing the HEAD/TAIL and marking the ring as disabled. However, it would be safer to disable the ring (after emptying) before resetting the HEAD/TAIL. Suggested-by:
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Chris Wilson authored
Push the sleeping stop_ring() out of the reset resume function to reset prepare; we are not allowed to sleep in the former. Signed-off-by:
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Chris Wilson authored
The engine resets selftests kick the tasklets, safe up until now as only execlists supported engine resets. Signed-off-by:
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Chris Wilson authored
CI reports that Baytail requires one more invalidate after CACHE_MODE for it to be happy. Fixes: ace44e13 ("drm/i915/gt: Clear CACHE_MODE prior to clearing residuals") Signed-off-by:
Akeem G Abodunrin <akeem.g.abodunrin@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210119110802.22228-1-chris@chris-wilson.co.uk
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Chris Wilson authored
While immensely convenient for developing to only tackle the first error, and not be flooded by repeated or secondiary issues, many more casual testers are not setup to remotely capture debug traces. For those testers, it is more beneficial to keep the system running in the remote chance that they are able to extract the original debug logs. Signed-off-by:
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Chris Wilson authored
Now that i915 compiles cleanly with Werror, we can enforce enabling DEBUG_GEM when selecting the default debug config. Signed-off-by:
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- 18 Jan, 2021 2 commits
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Chris Wilson authored
Similar to commit 49b20dbf ("drm/i915/gt: Perform an arbitration check before busywaiting"), also add a check prior to the busywait on gen8+, as we have now seen (because we added a selftest to add fault injection into the engine resets) the same engine reset failure leading to an indefinite wait on the ring-stop semaphore. So not a Tigerlake specific bug after all, though it still seems odd behaviour for the busywait as we do get the arbitration point elsewhere on a miss. Testcase: igt_reset_fail_engine Signed-off-by:
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Chris Wilson authored
Since we do a bare context switch with no restore, the clear residual kernel runs on dirty state, and we must be careful to avoid executing with bad state from context registers inherited from a malicious client. Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/2955 Fixes: 008ead6e ("drm/i915/gt: Restore clear-residual mitigations for Ivybridge, Baytrail") Fixes: 09aa9e45 ("drm/i915/gt: Restore clear-residual mitigations for Ivybridge, Baytrail") Testcase: igt/gem_ctx_isolation # ivb,vlv Signed-off-by:
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- 15 Jan, 2021 15 commits
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Chris Wilson authored
As context-in/out is now always serialised, we do not have to worry about concurrent enabling/disable of the busy-stats and can reduce the atomic_t active to a plain unsigned int, and the seqlock to a seqcount. Signed-off-by:
Andi Shyti <andi.shyti@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210115142331.24458-3-chris@chris-wilson.co.uk
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Chris Wilson authored
Lift the busy-stats context-in/out implementation out of intel_lrc, so that we can reuse it for other scheduler implementations. Signed-off-by:
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Chris Wilson authored
Since schedule-in/out is now entirely serialised by the tasklet bitlock, we do not need to worry about concurrent in/out operations and so reduce the atomic operations to plain instructions. Signed-off-by:
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Matthew Auld authored
warning: symbol '__i915_gem_object_create_stolen' was not declared. Should it be static? warning: symbol '_i915_gem_object_stolen_init' was not declared. Should it be static? Signed-off-by:
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Matthew Auld authored
Give more flexibility to the caller, if they already have an allocated object, in case they wish to apply some transformation to the object prior to handing it over to the region specific initialisation step, like in gem_create_ext where we would like to first apply the extensions to the object. Signed-off-by:
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Matthew Auld authored
Depending on the regions min_page_size we might need to adjust the object size, ensure this matches our expectations. Suggested-by:
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Matthew Auld authored
In preparation for gem_create_ext break out the gem_create uAPI, so that we don't clutter i915_gem.c once we start adding various extensions Signed-off-by:
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Chris Wilson authored
Avoid the full blown memory barrier of test_and_set_bit() by noting the completed request and removing it from the lists. Signed-off-by:
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Chris Wilson authored
Take a snapshot of the ctx->engines, so we can avoid taking the ctx->engines_mutex for a mere read in get_engines(). Signed-off-by:
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Chris Wilson authored
When cloning the engines from the source context, we need to ensure that the engines are not freed as we copy them, and that the flags we clone from the source correspond with the engines we copy across. To do this we need only take a reference to the src->engines, rather than hold the src->engine_mutex, so long as we verify that nothing changed under the read. Signed-off-by:
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Chris Wilson authored
Originally, we used the signal->lock as a means of following the previous link in its timeline and peeking at the previous fence. However, we have replaced the explicit serialisation with a series of very careful probes that anticipate the links being deleted and the fences recycled before we are able to acquire a strong reference to it. We do not need the signal->lock crutch anymore, nor want the contention. Signed-off-by:
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Chris Wilson authored
When we know that we are inside the timeline mutex, or inside the submission flow (under active.lock or the holder's rcu lock), we know that the rq->hwsp is stable and we can use the simpler direct version. Signed-off-by:
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Joonas Lahtinen authored
Backmerging to get a common base for merging topic branches between drm-intel-next and drm-intel-gt-next. Signed-off-by:Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
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Dave Airlie authored
Merge tag 'drm-intel-gt-next-2021-01-14' of git://anongit.freedesktop.org/drm/drm-intel into drm-next UAPI Changes: - Deprecate I915_PMU_LAST and optimize state tracking (Tvrtko) Avoid relying on last item ABI marker in i915_drm.h, add a comment to mark as deprecated. Cross-subsystem Changes: Core Changes: Driver Changes: - Restore clear residuals security mitigations for Ivybridge and Baytrail (Chris) - Close #1858: Allow sysadmin to choose applied GPU security mitigations through i915.mitigations=... similar to CPU (Chris) - Fix for #2024: GPU hangs on HSW GT1 (Chris) - Fix for #2707: Driver hang when editing UVs in Blender (Chris, Ville) - Fix for #2797: False positive GuC loading error message (Chris) - Fix for #2859: Missing GuC firmware for older Cometlakes (Chris) - Lessen probability of GPU hang due to DMAR faults [reason 7, next page table ptr is invalid] on Tigerlake (Chris) - Fix REVID macros for TGL to fetch correct stepping (Aditya) - Limit frequency drop to RPe on parking (Chris, Edward) - Limit W/A 1406941453 to TGL, RKL and DG1 (Swathi) - Make W/A 22010271021 permanent on DG1 (Lucas) - Implement W/A 16011163337 to prevent a HS/DS hang on DG1 (Swathi) - Only disable preemption on gen8 render engines (Chris) - Disable arbitration around Braswell's PDP updates (Chris) - Disable arbitration on no-preempt requests (Chris) - Check for arbitration after writing start seqno before busywaiting (Chris) - Retain default context state across shrinking (Venkata, CQ) - Fix mismatch between misplaced vma check and vma insert for 32-bit addressing userspaces (Chris, CQ) - Propagate error for vmap() failure instead kernel NULL deref (Chris) - Propagate error from cancelled submit due to context closure immediately (Chris) - Fix RCU race on HWSP tracking per request (Chris) - Clear CMD parser shadow and GPU reloc batches (Matt A) - Populate logical context during first pin (Maarten) - Optimistically prune dma-resv from the shrinker (Chris) - Fix for virtual engine ownership race (Chris) - Remove timeslice suppression to restore fairness for virtual engines (Chris) - Rearrange IVB/HSW workarounds properly between GT and engine (Chris) - Taint the reset mutex with the shrinker (Chris) - Replace direct submit with direct call to tasklet (Chris) - Multiple corrections to virtual engine dequeue and breadcrumbs code (Chris) - Avoid wakeref from potentially hard IRQ context in PMU (Tvrtko) - Use raw clock for RC6 time estimation in PMU (Tvrtko) - Differentiate OOM failures from invalid map types (Chris) - Fix Gen9 to have 64 MOCS entries similar to Gen11 (Chris) - Ignore repeated attempts to suspend request flow across reset (Chris) - Remove livelock from "do_idle_maps" VT-d W/A (Chris) - Cancel the preemption timeout early in case engine reset fails (Chris) - Code flow optimization in the scheduling code (Chris) - Clear the execlists timers upon reset (Chris) - Drain the breadcrumbs just once (Chris, Matt A) - Track the overall GT awake/busy time (Chris) - Tweak submission tasklet flushing to avoid starvation (Chris) - Track timelines created using the HWSP to restore on resume (Chris) - Use cmpxchg64 for 32b compatilibity for active tracking (Chris) - Prefer recycling an idle GGTT fence to avoid GPU wait (Chris) - Restructure GT code organization for clearer split between GuC and execlists (Chris, Daniele, John, Matt A) - Remove GuC code that will remain unused by new interfaces (Matt B) - Restructure the CS timestamp clocks code to local to GT (Chris) - Fix error return paths in perf code (Zhang) - Replace idr_init() by idr_init_base() in perf (Deepak) - Fix shmem_pin_map error path (Colin) - Drop redundant free_work worker for GEM contexts (Chris, Mika) - Increase readability and understandability of intel_workarounds.c (Lucas) - Defer enabling the breadcrumb interrupt to after submission (Chris) - Deal with buddy alloc block sizes beyond 4G (Venkata, Chris) - Encode fence specific waitqueue behaviour into the wait.flags (Chris) - Don't cancel the breadcrumb interrupt shadow too early (Chris) - Cancel submitted requests upon context reset (Chris) - Use correct locks in GuC code (Tvrtko) - Prevent use of engine->wa_ctx after error (Chris, Matt R) - Fix build warning on 32-bit (Arnd) - Avoid memory leak if platform would have more than 16 W/A (Tvrtko) - Avoid unnecessary #if CONFIG_PM in PMU code (Chris, Tvrtko) - Improve debugging output (Chris, Tvrtko, Matt R) - Make file local variables static (Jani) - Avoid uint*_t types in i915 (Jani) - Selftest improvements (Chris, Matt A, Dan) - Documentation fixes (Chris, Jose) Signed-off-by:
Dave Airlie <airlied@redhat.com> # Conflicts: # drivers/gpu/drm/i915/gt/intel_breadcrumbs.c # drivers/gpu/drm/i915/gt/intel_breadcrumbs_types.h # drivers/gpu/drm/i915/gt/intel_lrc.c # drivers/gpu/drm/i915/gvt/mmio_context.h # drivers/gpu/drm/i915/i915_drv.h From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210114152232.GA21588@jlahtine-mobl.ger.corp.intel.com
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git://anongit.freedesktop.org/drm/drm-intelDave Airlie authored
- PSR fixes and improvements for selective fetch (Jose) - GVT build fixed and cleanup (Jani) - RKL display fixes (Lee, Matt) - DSI fix (Hans) - Panel Power and Backlight fixes (Anshuman, Jani) - RPM fix (Chris) - Fix HTI port checking (Jose) - Clean-up in cursor code (Ville) - Once again, trying to use fast+narrow link on eDP (Ville) - DG1 display fix (Matt) Signed-off-by:
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- 14 Jan, 2021 4 commits
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Dave Airlie authored
Merge tag 'amd-drm-next-5.12-2021-01-08' of https://gitlab.freedesktop.org/agd5f/linux into drm-next amd-drm-next-5.12-2021-01-08: amdgpu: - Rework IH ring handling on vega and navi - Rework HDP handling for vega and navi - swSMU documenation updates - Overdrive support for Sienna Cichlid and newer asics - swSMU updates for vangogh - swSMU updates for renoir - Enable FP16 on DCE8-11 - Misc code cleanups and bug fixes radeon: - Fixes for platforms that can't access PCI resources correctly - Misc code cleanups From: Alex Deucher <alexdeucher@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210108221811.3868-1-alexander.deucher@amd.comSigned-off-by:
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Chris Wilson authored
Remove all the manual inlines from non-critical sections in gt/ add/remove: 2/0 grow/shrink: 0/3 up/down: 762/-1473 (-711) Function old new delta mi_set_context.isra - 602 +602 write_dma_entry - 160 +160 __set_pd_entry 214 69 -145 clear_pd_entry 190 42 -148 ring_request_alloc 2021 841 -1180 Total: Before=1605086, After=1604375, chg -0.04% Signed-off-by:
Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210113152224.29794-1-chris@chris-wilson.co.uk
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Chris Wilson authored
Remove the extraneous inlines. The only split by the compiler that looked dubious was execlists_schedule_out, so push the code around slightly to move all the work into the out-of-line function. In a normal build, bloat-o-meter shows that only the execlists_schedule_out is contentious: add/remove: 1/0 grow/shrink: 0/2 up/down: 803/-1532 (-729) Function old new delta __execlists_schedule_out - 803 +803 execlists_submission_tasklet 6488 5766 -722 execlists_reset_csb.constprop 1587 777 -810 Total: Before=1605815, After=1605086, chg -0.05% Signed-off-by:
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Chris Wilson authored
The GFX_MODE is reset along with the engine, turning off ppGTT. We need to re-enable it upon resume afterwards. Signed-off-by:
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