- 11 Jul, 2012 7 commits
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Naveen N. Rao authored
If arch_validate_hwbkpt_settings() fails, bp->ctx won't be valid and the kernel panics. Add a check to fix this. Reported-by:
Edjunior Barbosa Machado <emachado@linux.vnet.ibm.com> Signed-off-by:
Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com> Signed-off-by:
Benjamin Herrenschmidt <benh@kernel.crashing.org>
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Stephen Rothwell authored
This allows the linker to know that calls to them do not need to switch TOC and stop errors like the following when linking large configurations: powerpc64-linux-ld: drivers/built-in.o: In function `.gpiochip_is_requested': (.text+0x4): sibling call optimization to `_savegpr0_29' does not allow automatic multiple TOCs; recompile with -mminimal-toc or -fno-optimize-sibling-calls, or make `_savegpr0_29' extern Signed-off-by:
Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by:
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Anton Blanchard authored
We have a request for a fast method of getting CPU and NUMA node IDs from userspace. This patch implements a getcpu VDSO function, similar to x86. Ben suggested we use SPRG3 which is userspace readable. SPRG3 can be modified by a KVM guest, so we save the SPRG3 value in the paca and restore it when transitioning from the guest to the host. I have a glibc patch that implements sched_getcpu on top of this. Testing on a POWER7: baseline: 538 cycles vdso: 30 cycles Signed-off-by:
Anton Blanchard <anton@samba.org> Signed-off-by:
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Michael Ellerman authored
Purely for cosmetic purposes, otherwise it can appear that we are in single_step_pSeries() which is slightly confusing. Signed-off-by:
Michael Ellerman <michael@ellerman.id.au> Signed-off-by:
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Deepthi Dharwar authored
Currently the call to pseries_notify_cpuidle_add_cpu(), that takes action on the cpuidle front when a cpu is added/removed is being made from smp_xics_setup_cpu(). This caused lockdep issues as reported https://lkml.org/lkml/2012/5/17/2 On addition of each cpu, resources were cleared and re-allocated each time, all in critical section as part of start_secondary() call were interrupts are disabled. To resolve this issue, the pseries_notify_cpuidle_add_cpu() call is is being replaced by a hotplug notifier which would prevent cpuidle resources from being released and allocated each time cpu is onlined in the critical code path. It was fixed in https://lkml.org/lkml/2012/5/18/174. Also it is essential to call cpuidle_enable/disable_device between cpuidle_pause_and_lock() and cpuidle_resume_and_unlock() when used externally to avoid race conditions. Add support for CPU_ONLINE_FROZEN and CPU_DEAD_FROZEN as part of hotplug notify event for pseries_idle and unregister hotplug notifier while exiting out. The above mentioned issues are fixed as part of this patch. Signed-off-by:
Deepthi Dharwar <deepthi@linux.vnet.ibm.com> Signed-off-by:
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Benjamin Herrenschmidt authored
When I "fixed" the CONFIG_TRACE_IRQFLAGS case on interrupt entry, I screwed up a little bit with the test for user space vs. kernel. The code is fine, there's just some dead code around it. I basically removed the test and always create the added stack frame whether coming from user or kernel since in any case we do need to save a bunch of volatile registers or bad things would happen (we can take page faults in the kernel for example). Signed-off-by: -
Stuart Yoder authored
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Stuart Yoder <stuart.yoder@freescale.com> Signed-off-by:
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- 10 Jul, 2012 33 commits
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Michael Ellerman authored
Matt added BPF_JIT support in commit 0ca87f05, but currently none of our defconfigs build it. Turn that sucker on. Signed-off-by:
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Anton Blanchard authored
Add the ability to inject IOMMU faults. We enable this per device via a fail_iommu sysfs property, similar to fault injection on other subsystems. An example: ... 0003:01:00.1 Ethernet controller: Emulex Corporation OneConnect 10Gb NIC (be3) (rev 02) To inject one error to this device: echo 1 > /sys/bus/pci/devices/0003:01:00.1/fail_iommu echo 1 > /sys/kernel/debug/fail_iommu/probability echo 1 > /sys/kernel/debug/fail_iommu/times As feared, the first failure injected on the be3 results in an unrecoverable error, taking down both functions of the card permanently: be2net 0003:01:00.1: Unrecoverable error in the card Signed-off-by:
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Anton Blanchard authored
The DMA API debug code has hooks to verify all DMA entries have been freed at time of hot unplug. We need to call dma_debug_add_bus for this to work. Signed-off-by:
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Anton Blanchard authored
Similar to PCI, separate the bus probe from device probe. This allows us to attach bus notifiers for DMA debug and IOMMU fault injection before devices have been probed. Signed-off-by:
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Anton Blanchard authored
During boot we see a number of these warnings: vio 30000000: Warning: IOMMU dma not supported: mask 0xffffffffffffffff, table unavailable The reason for this is that we set IOMMU properties for all VIO devices even if they are not DMA capable. Only set DMA ops, table and mask for devices with a DMA window. Signed-off-by:
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Michael Neuling authored
Signed-off-by:
Michael Neuling <mikey@neuling.org> Acked-by:
Gavin Shan <shangw@linux.vnet.ibm.com> Signed-off-by:
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Anton Blanchard authored
We use SIAR or regs->nip for the instruction pointer depending on the PMU configuration, but we always use regs->nip in the callchain. Use perf_instruction_pointer so the backtrace is consistent. Signed-off-by:
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Anton Blanchard authored
At the moment we always use the SIAR if the PMU supports continuous sampling. Unfortunately the SIAR and the PMU exception are not synchronised for non marked events so we can end up with callchains that dont make sense. The following patch checks the HV and PR bits for samples coming from userspace and always uses pt_regs for them. Userspace will never have interrupts off so there is no real advantage to using the SIAR for non marked events in userspace. I had experimented with a patch that did a similar thing for kernel samples but we lost a significant amount of information. I was unable to profile any of our early exception code for example. Signed-off-by:
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Anton Blanchard authored
The logic to choose whether to use the SIAR or get the information out of pt_regs is going to get more complicated, so do it once in perf_read_regs. We overload regs->result which is gross but we are already doing it with regs->dsisr. Signed-off-by:
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Anton Blanchard authored
We want to access the MMCRA_SIHV and MMCRA_SIPR bits elsewhere so create mmcra_sihv and mmcra_sipr which hide the differences between the old and new layout of the bits. Signed-off-by:
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Michael Neuling authored
Some macros use RA where when RA=R0 the values is 0, so make this the enforced mnemonic in the macro. Idea suggested by Andreas Schwab. Signed-off-by:
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Michael Neuling authored
R0 is special since it'll be 0. Signed-off-by:
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Michael Neuling authored
Enforce the use of R0-R31 in macros where possible now we have all the fixes in. R0-R31 macros are removed here so that can't be used anymore. They should not be defined anywhere. Signed-off-by:
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Michael Neuling authored
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Michael Neuling authored
Now have ___PPC_RA/B/S/T we can use it in some places. These are places where we can't use the existing defines which will soon enforce R0-R31 usage. The macros being changed here are being used in inline asm, which can't convert to enforce the R0-R31 usage. bpf_jit uses a mix of both generated and non-generated with the same code, so just convert all these to use the ___PPC_R versions which won't enforce R usage later. Signed-off-by:
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Michael Neuling authored
These are currently the same as __PPC_RA/B/S/T but we'll wrap them soon. Signed-off-by:
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Michael Neuling authored
We need to do this so we can enforce the name of a and b in called macros PPC_RA/B later. Signed-off-by:
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Michael Neuling authored
These macros are using integers where they could be using logical names since they take registers. We are going to enforce this soon, so fix these up now. Signed-off-by:
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Michael Neuling authored
LOAD_REG_ADDR define is just a wrapper around real instructions so we can just use real register names here (ie. lower case). Signed-off-by:
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Michael Neuling authored
mtocrf define is just a wrapper around the real instructions so we can just use real register names here (ie. lower case). Also remove braces in macro so this is possible. Signed-off-by:
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Benjamin Herrenschmidt authored
Move this duplicated definition to ppc_asm.h and remove the braces which prevent the use of %rN register names Signed-off-by: -
Michael Neuling authored
Merge the defines of VCPU_GPR from different places. Signed-off-by:
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Michael Neuling authored
Merge the defines of STACKFRAMESIZE, STK_REG, STK_PARAM from different places. Signed-off-by:
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Michael Neuling authored
move lbz/stbciz to ppc-opcode.h. Signed-off-by:
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Michael Neuling authored
Now all the fixes are in place, let's rock-n-roll! Signed-off-by:
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Michael Neuling authored
Anything that uses a constructed instruction (ie. from ppc-opcode.h), need to use the new R0 macro, as %r0 is not going to work. Also convert usages of macros where we are just determining an offset (usually for a load/store), like: std r14,STK_REG(r14)(r1) Can't use STK_REG(r14) as %r14 doesn't work in the STK_REG macro since it's just calculating an offset. Signed-off-by:
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Michael Neuling authored
The assembler doesn't take %r0 register arguments in braces, so remove them. Signed-off-by:
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Michael Neuling authored
We are going to use these later and convert r0 to %r0 etc. Signed-off-by:
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Benjamin Herrenschmidt authored
We want to bring in the latest IRQ fixes
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Benjamin Herrenschmidt authored
udbg_init_debug_opal() should be udbg_init_debug_opal_raw() as the caller in arch/powerpc/kernel/udbg.c expects Signed-off-by: -
Benjamin Herrenschmidt authored
Newer gcc are being a bit blind here (it's pretty obvious we don't reach the code path using the array if we haven't initialized the pointer) but none of that is performance critical so let's just silence it. Signed-off-by: -
Benjamin Herrenschmidt authored
There was a typo, checking for CONFIG_TRACE_IRQFLAG instead of CONFIG_TRACE_IRQFLAGS causing some useful debug code to not be built This in turns causes a build error on BookE 64-bit due to incorrect semicolons at the end of a couple of macros, so let's fix that too Signed-off-by: -
Benjamin Herrenschmidt authored
Looks like we still have issues with pSeries and Cell idle code vs. the lazy irq state. In fact, the reset fixes that went upstream are exposing the problem more by causing BUG_ON() to trigger (which this patch turns into a WARN_ON instead). We need to be careful when using a variant of low power state that has the side effect of turning interrupts back on, to properly set all the SW & lazy state to look as if everything is enabled before we enter the low power state with MSR:EE off as we will return with MSR:EE on. If not, we have a discrepancy of state which can cause things to go very wrong later on. This patch moves the logic into a helper and uses it from the pseries and cell idle code. The power4/970 idle code already got things right (in assembly even !) so I'm not touching it. The power7 "bare metal" idle code is subtly different and correct. Remains PA6T and some hypervisor based Cell platforms which have questionable code in there, but they are mostly dead platforms so I'll fix them when I manage to get final answers from the respective maintainers about how the low power state actually works on them. Signed-off-by:
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