- 12 Oct, 2010 1 commit
-
-
Paul Mundt authored
This plugs in the alignment and emulation fault reporting for perf sw events. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
- 11 Oct, 2010 1 commit
-
-
Kulikov Vasiliy authored
Checks for (irq < 0) and (ilsel < 0) didn't make sense since they were unsigned. Made them signed. Signed-off-by: Vasiliy Kulikov <segooon@gmail.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
- 06 Oct, 2010 5 commits
-
-
Paul Mundt authored
SH-3 lacks an MMUCR_TI definition for global TLB flushes. As SH-3 parts lack a split TLB, the same global flush behaviour is accomplished through the flush bit, which just happens to be the same as on SH-4. This fixes up the build for all SH-3 MMU parts. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Nobuhiro Iwamatsu authored
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Akinobu Mita authored
The spinlock in traps_64.c is used without initialization. This fixes it by declaring DEFINE_SPINLOCK() and makes the spinlock static variable. Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: linux-sh@vger.kernel.org Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
The balancing stubs obviously need to be static inline.. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
The Kconfig and Makefile were overlooked, add those in now to improve odds of building. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
- 05 Oct, 2010 3 commits
-
-
Paul Mundt authored
SH7786 is the big user for subgroup splitting, mostly for the PCIe block, but those will follow later. For now we simply split up SCIF1, as used by the serial console on SDK7786 and others. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
This splits up the sh intc core in to something more vaguely resembling a subsystem. Most of the functionality was alread fairly well compartmentalized, and there were only a handful of interdependencies that needed to be resolved in the process. This also serves as future-proofing for the genirq and sparseirq rework, which will make some of the split out functionality wholly generic, allowing things to be killed off in place with minimal migration pain. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
If lookups happen while the radix node still points to a subgroup mapping, an IRQ hasn't yet been made available for the specified id, so error out accordingly. Once the slot is replaced with an IRQ mapping and the tag is discarded, lookup can commence as normal. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
- 04 Oct, 2010 2 commits
-
-
Paul Mundt authored
Many interrupts that share a single mask source but are on different hardware vectors will have an associated register tied to an INTEVT that denotes the precise cause for the interrupt exception being triggered. This introduces the concept of IRQ subgroups in the intc core, where a virtual IRQ map is constructed for each of the pre-defined cause bits, and a higher level chained handler takes control of the parent INTEVT. This enables CPUs with heavily muxed IRQ vectors (especially across disjoint blocks) to break things out in to a series of managed chained handlers while being able to dynamically lookup and adopt the IRQs created for them. This is largely an opt-in interface, requiring CPUs to manually submit IRQs for subgroup splitting, in addition to providing identifiers in their enum maps that can be used for lazy lookup via the radix tree. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
This implements a scheme roughly analogous to the PowerPC virtual to hardware IRQ mapping, which we use for IRQ to per-controller ID mapping. This makes it possible for drivers to use the IDs directly for lookup instead of hardcoding the vector. The main motivation for this work is as a building block for dynamically allocating virtual IRQs for demuxing INTC events sharing a single INTEVT in addition to a common masking source. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
- 03 Oct, 2010 7 commits
-
-
Paul Mundt authored
The gpiolib debugfs entry takes a hammer approach and iterates over all of the potential GPIOs, regardless of their type. The SH PFC code on the other hand contains a variable mismash of input/output/function types spread out sparsely, leading to situations where the debug code can trigger an out of range enum for the type. Since we already have an error path for out of range enums, we can just hand that up to the higher level instead of the current BUG() behaviour. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
The gpio sysfs support needs to get at these later, so drop the __initdata annotations. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
Presently the pinmux code is a one-way thing, but there's nothing preventing an unregistration if no one has grabbed any of the pins. This will permit us to save a bit of memory on systems that require pin demux for certain peripherals in the case where registration of those peripherals fails, or they are otherwise not attached to the system. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
At the moment ILSEL blows up with a BUG when aliased sets are handed in, but as the enable call is able to hand back errors we opt for that path instead. None of the ILSEL peripherals are vital to the board's operation, so trapping a BUG is a bit excessive. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
This adds gpio-keys mappings for the button matrix on the baseboard, now that we have support for the pin controller. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
This adds trivial support for the GPIOs implemented through the baseboard CPLD, used for driving the button matrix. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
We'll be adding more headers for this board, so move this over to its own directory. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
- 02 Oct, 2010 4 commits
-
-
Paul Mundt authored
As non-PFC chips are added that may support IRQs, pass through to the generic helper instead of triggering the WARN_ON(). Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
Some controllers will need to be initialized lazily due to pinmux constraints, while others may simply have no need to be brought online if there are no backing devices for them attached. In this case it's still necessary to be able to reserve their hardware vector map before dynamic IRQs get a hold of them. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
The SH-X3 proto CPU has all of the external IRQ and IRL pins muxed, make sure that we're able to grab them before attempting to register their respective IRQ controllers. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
This adds in support for GPIO/pinmux on the SH-X3 proto CPUs. This will subsequently be used by the x3proto board. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
- 01 Oct, 2010 3 commits
-
-
Paul Mundt authored
This adds in hardware IRQ auto-distribution support for SH-X3 proto CPUs, following the SH7786 support. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
This shuffles some of the shared bits out of the 7786 code and in to a shared SH-X3 support file. Presently just for userimask, but also a good place for the IRQ balancing wrappers. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
Rewrite the SH-X3 proto CPU clock framework for clkdev. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
- 30 Sep, 2010 2 commits
-
-
Magnus Damm authored
Update the SH kernel to keep SR.BL set until the VBR register has been initialized. Useful to allow boot of the kernel even though exceptions are pending. Without this patch there is a window of time when exceptions such as NMI are enabled but no exception handlers are installed. This patch modifies both the zImage loader and the actual kernel to boot with BL=1, but the zImage loader is modfied in such a way that the init_sr value is unchanged to not break the zImage loader provided by kexec. Tested on sh7724 Ecovec and on the SH4AL-DSP core included in sh7372. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Guennadi Liakhovetski authored
kfree() in clkdev_drop() function should actually be called with an address of a struct clk_lookup_alloc object, and not struct clk_lookup, as presently done. This just happens to work, because "struct clk_lookup cl" is the first member in struct clk_lookup_alloc. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
- 23 Sep, 2010 2 commits
-
-
Paul Mundt authored
While sh previously had its own debugfs root, there now exists a common arch_debugfs_dir prototype, so we switch everything over to that. Presumably once more architectures start making use of this we'll be able to just kill off the stub kdebugfs wrapper. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
matt mooney authored
Replace EXTRA_CFLAGS with ccflags-y. Signed-off-by: matt mooney <mfm@muteddisk.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
- 20 Sep, 2010 7 commits
-
-
Paul Mundt authored
This copies the pci_config_lock idea from x86 over, allowing us to kill off a couple of existing private locks. At the same time, these need to be converted to raw spinlocks for -rt kernels, so we make that change at the same time. This should make it easier for future parts to get the locking right instead of inevitable ending up with lock type mismatches. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
This gets each port handling its MSTP bit, as well as moving the PHY clock management in to the clock framework. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
Some of the existing code is flipping between __raw_xxx() and pci_{read,write}_reg(). As the latter are just wrappers for the former, flip over to using them consistently. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
Presently we error out if a link is disabled and simply drop the port registration outright. This follows the PPC changes and simply reports on the link state on boot, leaving the port registered, in order to more easily deal with hotplug on future parts. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
These settings are properly propagated by the hardware already, so there's no need to bother with them manually. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
The SH7786 PCIe is presently unable to enumerate itself in root complex mode, and has no visibility through either type 0 or type 1 accesses, despite having a mostly sensible extended config space for each port. Attempts to generate type 0 or type 1 config cycles result in completer aborts, so we're ultimately forced to use SuperHyway transactions instead. As each port has a single port <-> device mapping that resolves for any PCI_SLOT definition, we simply hijack devfn 0 for the SuperHyway transaction and bump up the devfn limit. With enumeration of the root complex now possible, we also need to insert an early fixup to hide the BARs from the kernel. With all of that done, it's now possible to use the pcieport services with all of the PCIe ports, which is the first step to power management support. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
Previously these IDs were only used by one driver, so there was not much need for having them generically defined. Now that this will no longer hold true, move them over. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
- 19 Sep, 2010 3 commits
-
-
Paul Mundt authored
The spec suggests waiting up to 500ms for the PHY to settle before testing link state, but practice shows that 100ms is sufficient (this is the delay value we also use on the other SH-4A PCI controllers, too). This makes device detection much more reliable, although in the future it should be a bit faster to simply serialize with a TLP IRQ. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
After configuration accesses have been completed deassert the configuration access enable cleanly. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-