- 14 Jun, 2019 3 commits
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Maxime Jourdan authored
The SEI510 board features a max98357a audio codec for built-in speaker Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Kevin Hilman authored
Merge tag 'asoc-tohdmitx' of https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into HEAD ASoC: tohdmitx bindings The patch on this branch adds bindings for tohdmitx, including a header to be used in DT bindings which needs to be shared with the arm-soc tree in order to allow system DTs to be merged. # gpg: Signature made Fri 14 Jun 2019 11:43:33 AM PDT # gpg: using RSA key ADE668AA675718B59FE29FEA24D68B725D5487D0 # gpg: issuer "broonie@kernel.org" # gpg: Good signature from "Mark Brown <broonie@sirena.org.uk>" [full] # gpg: aka "Mark Brown <broonie@debian.org>" [full] # gpg: aka "Mark Brown <broonie@kernel.org>" [full] # gpg: aka "Mark Brown <broonie@tardis.ed.ac.uk>" [full] # gpg: aka "Mark Brown <broonie@linaro.org>" [unknown] # gpg: aka "Mark Brown <Mark.Brown@linaro.org>" [unknown] * tag 'asoc-tohdmitx' of https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound: ASoC: meson: add tohdmitx DT bindings
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Jerome Brunet authored
Add the bindings and the related documentation for the audio hdmitx control glue of the Amlogic g12a SoC family Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Tested-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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- 11 Jun, 2019 32 commits
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Martin Blumenstingl authored
GPIO interrupts are used for the external Ethernet RGMII PHY interrupt line. Add the GPIO interrupt controller so we can describe that connection in the dts files. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Neil Armstrong authored
Setting to 2Mbaud/s is the nominal bus speed for common usages. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Neil Armstrong authored
Setting to 2Mbaud/s is the nominal bus speed for common usages. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Neil Armstrong authored
The 32k low power clock is necessary for the bluetooth part of the combo module to initialize correctly, simply add the same clock we use for the sdio pwrseq. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Neil Armstrong authored
The 32k low power clock is necessary for the bluetooth part of the combo module to initialize correctly, simply add the same clock we use for the sdio pwrseq. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Neil Armstrong authored
The SEI510 embeds an AP6398S SDIO module, let's add the corresponding SDIO, PWM clock and mmc-pwrseq nodes. Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Neil Armstrong authored
The X96 Max embeds an AP6398S SDIO module, let's add the corresponding SDIO, PWM clock and mmc-pwrseq nodes. Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Guillaume La Roque authored
Add nodes to support SDCard and onboard eMMC on the X96 Max. Signed-off-by: Guillaume La Roque <glaroque@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Jerome Brunet authored
The Amlogic G12A SDIO Controller has a bug preventing direct DDR access, add the port A (SDIO) pinctrl and controller nodes and mark this specific controller with the amlogic,dram-access-quirk property. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Neil Armstrong authored
This patch adds basic support for : - Amlogic G12B, which is very similar to G12A - The HardKernel Odroid-N2 based on the S922X SoC The Amlogic G12B SoC is very similar with the G12A SoC, sharing most of the features and architecture, but with these differences : - The first CPU cluster only has 2xCortex-A53 instead of 4 - G12B has a second cluster of 4xCortex-A73 - Both cluster can achieve 2GHz instead of 1,8GHz for G12A - CPU Clock architecture is difference, thus needing a different compatible to handle this slight difference - Supports a MIPI CSI input - Embeds a Mali-G52 instead of a Mali-G31, but integration is the same Actual support is done in the same way as for the GXM support, including the G12A dtsi and redefining the CPU clusters. Unlike GXM, the first cluster is different, thus needing to remove the last 2 cpu nodes of the first cluster. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Tested-by: Anand Moon <linux.amoon@gmail.com> [khilman: add vin-supply for vcc_v5 as suggested by Anand Moon] Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Neil Armstrong authored
Add compatible for the Amlogic G12B (S922X) SoC based Odroid-N2 SBC from HardKernel. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Neil Armstrong authored
Add compatible for the Amlogic G12B SoC, sharing most of the features and architecture with the G12A SoC. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Neil Armstrong authored
Add the external ethernet PHY interrupt on the Vega S95 board. Suggested-by: Christian Hewitt <christianshewitt@gmail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Neil Armstrong authored
Fix the SDIO WiFi support and add proper Bluetooth support on the Vega S95 board. Suggested-by: Christian Hewitt <christianshewitt@gmail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Neil Armstrong authored
Add SARARC node and associated regulator to support reading the ADC inputs on the Vega S95 Suggested-by: Christian Hewitt <christianshewitt@gmail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Neil Armstrong authored
Add CEC nodes to support CEC communication on Vega S95 Suggested-by: Christian Hewitt <christianshewitt@gmail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Neil Armstrong authored
Add HDMI nodes to support graphics on Vega S95 Suggested-by: Christian Hewitt <christianshewitt@gmail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Neil Armstrong authored
Align the regulator names with other GXBB SoCS for upcoming SARADC support and SDIO/SDCard fixes. Also fix how regulators are passed to MMC controllers & USB. Suggested-by: Christian Hewitt <christianshewitt@gmail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Christian Hewitt authored
This enables Bluetooth support for the following models: AP6335 in the WeTek Hub rev1 - BCM4335C0.hcd AP6255 in the WeTek Hub rev2 - BCM4345C0.hcd AP6330 in the WeTek Play 2 - BCM4330B1.hcd Signed-off-by: Christian Hewitt <christianshewitt@gmail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Christian Hewitt authored
Enable SARADC on Wetek Boards. Signed-off-by: Christian Hewitt <christianshewitt@gmail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Christian Hewitt authored
- Remove serial1 alias - Add support for uart_A rts/cts - Add bluetooth uart_A subnode qith shutdown gpio Fixes: b8b74dda ("ARM64: dts: meson-gxm: Add support for Khadas VIM2") Signed-off-by: Christian Hewitt <christianshewitt@gmail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Christian Hewitt authored
Fix DTC warnings: meson-gxm-khadas-vim2.dtb: Warning (avoid_unnecessary_addr_size): /gpio-keys-polled: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property Fixes: b8b74dda ("ARM64: dts: meson-gxm: Add support for Khadas VIM2") Signed-off-by: Christian Hewitt <christianshewitt@gmail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Tested-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Neil Armstrong authored
Enable the network interface of the X96 Mac using an external Realtek RTL8211F gigabit PHY, needing the same broken-eee properties as the previous Amlogic SoC generations. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Neil Armstrong authored
The Amlogic G12A has the hwrng module at the end of an unknown "EFUSE" bus. The hwrng is not enabled on the vendor G12A DTs, but is enabled on next generation SM1 SoC family sharing the exact same memory mapping. Let's add the "EFUSE" bus and the hwrng node. This hwrng has been checked with the rng-tools rngtest FIPS tool : rngtest: starting FIPS tests... rngtest: bits received from input: 1630240032 rngtest: FIPS 140-2 successes: 81436 rngtest: FIPS 140-2 failures: 76 rngtest: FIPS 140-2(2001-10-10) Monobit: 10 rngtest: FIPS 140-2(2001-10-10) Poker: 6 rngtest: FIPS 140-2(2001-10-10) Runs: 26 rngtest: FIPS 140-2(2001-10-10) Long run: 34 rngtest: FIPS 140-2(2001-10-10) Continuous run: 0 rngtest: input channel speed: (min=3.784; avg=5687.521; max=19073.486)Mibits/s rngtest: FIPS tests speed: (min=47.684; avg=52.348; max=52.835)Mibits/s rngtest: Program run time: 30000987 microseconds Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Jerome Brunet authored
After discussing with Amlogic, the Synopsys GMAC version used by the gx and axg family is the 3.70a. Set this is in DT Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Neil Armstrong authored
With the X96 Max board using an external Gigabit Ethernet PHY, add the same driver strength to the Ethernet pins as the vendor tree. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Neil Armstrong authored
With the default boot settings, the DDC drive strength is too weak, set the driver-strengh to 4mA to avoid errors on the DDC line. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Jerome Brunet authored
Enable the network interface of the SEI510 which use the internal PHY. Tested-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Jerome Brunet authored
The u200 is the main mother board for the S905D2. It can provide both the internal and external network. However, by default the resistance required for the external RGMII bus are not fitted, so enable the internal PHY. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Jerome Brunet authored
Add the g12a mdio multiplexer which allows to connect to either an external phy through the SoC pins or the internal 10/100 phy Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Jerome Brunet authored
Add the ethernet pinctrl settings for RMII, RGMII and internal phy leds Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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https://github.com/BayLibre/clk-mesonKevin Hilman authored
MPLL50M DT bindings typo fix Meson9 VPU typo fixes # gpg: Signature made Tue 11 Jun 2019 05:02:13 AM PDT # gpg: using RSA key F4E159AE18F3F56D5F1BB71BE6FC0F1C37F2DA85 # gpg: Good signature from "Jerome Brunet <jbrunet@baylibre.com>" [full] # gpg: aka "Jerome Brunet <jerome@liltaz.com>" [full] # gpg: aka "Jerome Brunet <jerome.brunet@gmail.com>" [full] * tag 'clk-meson-5.2-1-fixes' of https://github.com/BayLibre/clk-meson: clk: meson: meson8b: fix a typo in the VPU parent names array variable clk: meson: fix MPLL 50M binding id typo
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- 23 May, 2019 1 commit
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Jerome Brunet authored
Add the synopsys ethernet mac controller embedded in the g12a SoC family. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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- 21 May, 2019 4 commits
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Jerome Brunet authored
Add the hdmitx glue device linking the SoC audio interfaces to the embedded Synopsys hdmi controller. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Jerome Brunet authored
Add bluetooth vbat and vddio power supplies Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Rob Herring authored
Convert Amlogic SoC bindings to DT schema format using json-schema. Cc: Carlo Caione <carlo@caione.org> Cc: Kevin Hilman <khilman@baylibre.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: devicetree@vger.kernel.org Signed-off-by: Rob Herring <robh@kernel.org> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> [khilman: updated maninainers] Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Rob Herring authored
It is best practice to have 1 binding per file, so board level bindings should be separate for various misc SoC bindings. Cc: Mark Rutland <mark.rutland@arm.com> Cc: Carlo Caione <carlo@caione.org> Cc: Kevin Hilman <khilman@baylibre.com> Cc: devicetree@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-amlogic@lists.infradead.org Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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