1. 23 Jun, 2015 2 commits
  2. 22 Jun, 2015 29 commits
  3. 19 Jun, 2015 1 commit
  4. 18 Jun, 2015 2 commits
    • Mika Kuoppala's avatar
      drm/i915: Reset request handling for gen8+ · 7fd2d269
      Mika Kuoppala authored
      In order for gen8+ hardware to guarantee that no context switch
      takes place during engine reset and that current context is properly
      saved, the driver needs to notify and query hw before commencing
      with reset.
      
      There are gpu hangs where the engine gets so stuck that it never will
      report to be ready for reset. We could proceed with reset anyway, but
      with some hangs with skl, the forced gpu reset will result in a system
      hang. By inspecting the unreadiness for reset seems to correlate with
      the probable system hang.
      
      We will only proceed with reset if all engines report that they
      are ready for reset. If root cause for system hang is found and
      can be worked around with another means, we can reconsider if
      we can reinstate full reset for unreadiness case.
      
      v2: -EIO, Recovery, gen8 (Chris, Tomas, Daniel)
      v3: updated commit msg
      v4: timeout_ms, simpler error path (Chris)
      
      References: https://bugs.freedesktop.org/show_bug.cgi?id=89959
      References: https://bugs.freedesktop.org/show_bug.cgi?id=90854
      Testcase: igt/gem_concurrent_blit/prw-blt-overwrite-source-read-rcs-forked
      Testcase: igt/gem_concurrent_blit/gtt-blt-overwrite-source-read-rcs-forked
      Cc: Chris Wilson <chris@chris-wilson.co.uk>
      Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
      Cc: Tomas Elf <tomas.elf@intel.com>
      Reviewed-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
      Signed-off-by: default avatarMika Kuoppala <mika.kuoppala@intel.com>
      Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
      7fd2d269
    • Vandana Kannan's avatar
      drm/i915/bxt: eDP Panel Power sequencing · b0a08bec
      Vandana Kannan authored
      Changes for BXT - added a IS_BROXTON check to use the macro related to PPS
      registers for BXT.
      BXT does not have PP_DIV register. Making changes to handle this.
      Second set of PPS registers have been defined but will be used when VBT
      provides a selection between the 2 sets of registers.
      
      v2:
      [Jani] Added 2nd set of PPS registers and the macro
      Jani's review comments
      	- remove reference in i915_suspend.c
      	- Use BXT PP macro
      Squashing all PPS related patches into one.
      
      v3: Jani's review comments addressed
      	- Use pp_ctl instead of pp
      	- ironlake_get_pp_control() is not required for BXT
      	- correct the use of && in the print statement
      	- drop the shift in the print statement
      
      v4: Jani's comments
      	- modify ironlake_get_pp_control() - dont set unlock key for bxt
      
      v5: Sonika's comments addressed
      	- check alignment
      	- move pp_ctrl_reg write (after ironlake_get_pp_control())
      	to !IS_BROXTON case.
      	- check before subtracting 1 for t11_t12
      Signed-off-by: default avatarVandana Kannan <vandana.kannan@intel.com>
      Signed-off-by: default avatarA.Sunil Kamath <sunil.kamath@intel.com>
      Reviewed-by: default avatarSonika Jindal <sonika.jindal@intel.com>
      Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
      b0a08bec
  5. 17 Jun, 2015 1 commit
    • Matt Roper's avatar
      drm/i915: Use helper to set CRTC state's mode · ce52299c
      Matt Roper authored
      We need to call drm_atomic_set_mode_for_crtc() rather than copying the
      mode in manually.  As of commit
      
              commit 99cf4a29
              Author: Daniel Stone <daniels@collabora.com>
              Date:   Mon May 25 19:11:51 2015 +0100
      
                  drm/atomic: Add current-mode blob to CRTC state
      
      the helper now also takes care of setting up the mode property blob for
      us; if we don't use the helper and never setup the mode blob, this will
      also trigger a failure in drm_atomic_crtc_check() when we have the
      DRIVER_ATOMIC flag set (i.e., when using the nuclear pageflip support
      via i915.nuclear_pageflip kernel command line parameter).
      
      Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
      Signed-off-by: default avatarMatt Roper <matthew.d.roper@intel.com>
      Reviewed-by: default avatarMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
      Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
      ce52299c
  6. 15 Jun, 2015 5 commits