- 04 Apr, 2017 8 commits
-
-
Kevin Hilman authored
Amlogic clock headers and DT binding updates for v4.12 - add clocks for I2S and Mali # gpg: Signature made Tue Apr 4 16:07:50 2017 PDT using RSA key ID D3FBC665 # gpg: Good signature from "Kevin Hilman <khilman@kernel.org>" [ultimate] # gpg: aka "Kevin Hilman <khilman@deeprootsystems.com>" [ultimate] # gpg: aka "Kevin Hilman <khilman@gmail.com>" [ultimate] # gpg: aka "Kevin Hilman <khilman@baylibre.com>" [ultimate] * tag 'amlogic-clk-headers': dt-bindings: clock: gxbb-clkc: Add GXL compatible variant clk: meson-gxbb: Expose GP0 dt-bindings clock id clk: meson-gxbb: Add MALI clock IDS dt-bindings: clk: gxbb: expose i2s output clock gates
-
Neil Armstrong authored
Add HDMI output and connector nodes. Signed-off-by:
Neil Armstrong <narmstrong@baylibre.com> Signed-off-by:
Kevin Hilman <khilman@baylibre.com>
-
Neil Armstrong authored
The HDMI modes needs more CMA memory to be reserved at boot-time. Signed-off-by:
-
Heiner Kallweit authored
Now that 3adbf342 "iio: adc: add a driver for the SAR ADC found in Amlogic Meson SoCs" has added support for the ADC, let's enable it on Odroid C2. Signed-off-by:
Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by:
-
Neil Armstrong authored
Acked-by:
Rob Herring <robh@kernel.org> Signed-off-by:
Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/1490178747-14837-6-git-send-email-narmstrong@baylibre.com
-
Neil Armstrong authored
This patch exposes the GP0 PLL clock id in the dt bindings. Signed-off-by:
-
Neil Armstrong authored
Add missing MALI clock IDs and expose the muxes and gates in the dt-bindings. Signed-off-by:
-
Jerome Brunet authored
Signed-off-by:
Jerome Brunet <jbrunet@baylibre.com> Signed-off-by:
-
- 28 Mar, 2017 10 commits
-
-
jbrunet authored
Add EE and AO domains pins for the spdif output to the gxl device tree. Acked-by:
-
jbrunet authored
Add EE and AO domains pins for the i2s output clocks and data the gxl device tree Acked-by:
-
jbrunet authored
Add EE and AO domains pins for the spdif output to the gxbb device tree. Acked-by:
-
jbrunet authored
Add EE and AO domains pins for the i2s output clocks and data to the gxbb device tree. Acked-by:
-
Neil Armstrong authored
The ODroid-C2 on-board USB Hub needs to to have it's reset signal set to high level in order to be enumerated by the USB Host Controller. But this management must be part of the currently in-development Generic Power Sequence patch that will allow a USB Controller driver to start and stop a power sequence associated to the USB Bus. In the meantime, a simple USB Hog will work to enable the USB Hub. Signed-off-by:
Linus Walleij <linus.walleij@linaro.org> Signed-off-by:
-
Neil Armstrong authored
Signed-off-by:
-
Neil Armstrong authored
Signed-off-by:
-
Neil Armstrong authored
Signed-off-by:
-
Neil Armstrong authored
Signed-off-by:
-
Neil Armstrong authored
The same Mali-450 MP3 GPU is present in the GXBB and GXL SoCs. The node is simply added in the meson-gxbb.dtsi file. For GXL, since a lot is shared with the GXM that has a Mali-T820 IP, this patch adds a new meson-gxl-mali.dtsi and is included in the SoC specific dtsi files. Signed-off-by:
-
- 24 Mar, 2017 1 commit
-
-
Neil Armstrong authored
Add pinctrl pins nodes following the additions of missing pins in the pinctrl driver. Signed-off-by:
-
- 23 Mar, 2017 10 commits
-
-
Neil Armstrong authored
Prepend the compatible strings with a GX generic name in nodes compatible with the GXBB HW and keep the same scheme as other nodes. Signed-off-by:
-
Neil Armstrong authored
Signed-off-by:
-
Neil Armstrong authored
Since we know the GXBB and GXL/GXM share more hardware, we can safely move the remaining peripheral nodes present in the GXBB dtsi to the common GX dtsi. Signed-off-by:
-
Martin Blumenstingl authored
The Khadas VIM series consists of two boards which are almost identical: They are both using the same GXL S905X SoC, 100Mbit/s ethernet (through the SoC-internal PHY), 2GB DDR3 memory, a micro-SD card slot, onboard eMMC, Broadcom based SDIO WIFI, 2x USB A and 1x USB Type-C (the latter with OTG support). The red LED is driven by PWM_AO_B (which allows dimming), while the blue LED is managed by the firmware. The differences are: - the VIM Pro has a 16GB eMMC module, while the VIM only has 8GB - the VIM Pro uses an AP6255 a/b/g/n/ac WIFI module, while the VIM comes with an AP6212 b/g/n SDIO WIFI module (the Vim uses an 8GB eMMC module, while The boards are based on Amlogic's GXL S905X P212 reference design, which is why most of the functionality (all MMC controllers and power sequences, IR remote input, the main UART, ADC and ethernet) is simply inherited from meson-gxl-s905x-p212.dtsi. Signed-off-by:
Martin Blumenstingl <martin.blumenstingl@googlemail.com> Tested-by:
-
Martin Blumenstingl authored
Signed-off-by:
-
Martin Blumenstingl authored
Khadas is a new sub-brand of "Shenzhen Wesion Technology Co., Ltd.". They are developing Amlogic and Rockchip based "DIY boxes" (single board computers): http://khadas.com/ They are best know for their latest product: the Khadas VIM (an Amlogic GXL S905X based SBC). Signed-off-by:
-
Martin Blumenstingl authored
This adds the new DT nodes for the missing PWM pins in the EE and AO domain. Signed-off-by:
-
Neil Armstrong authored
The wrong GPIO line was provided here. Fixes: ef8d2ffe ("ARM64: dts: meson-gxbb: add MMC support") Signed-off-by:
-
Neil Armstrong authored
This patch describes the GPIO lines usage on the Odroid-C2 board. This is useful in the debugfs gpio file and using the cdev gpio API. Signed-off-by:
-
Neil Armstrong authored
This patch adds support for the P230 and Q200 ADC laddered button and GPIO button. Signed-off-by:
-
- 14 Mar, 2017 1 commit
-
-
Martin Blumenstingl authored
The Amlogic P212 reference design is used by other devices as well, such as (for example) the Khadas VIM boards. Thus this patch adds and moves all common entries from meson-gxl-s905x-p212.dts to a new, separate meson-gxl-s905x-p212.dtsi (which can be re-used on boards such as the Khadas VIM). Support for all boards based on the P212 reference design includes: - enabling IR support - enabling the SAR ADC (SARADC_CH1 is connected to a resistor which indicates the hardware revision, a similar design is found on the Khadas VIM boards) - all MMC controllers (which means that SDIO wifi, the SD card and the eMMC are now supported) - pwm_ef as dependency for the SDIO wifi modules - uart_A which is connected to the bluetooth module (the bluetooth module itself is not enabled yet due to missing devicetree bindings for the Broadcom serial bluetooth devices) - uart_AO is moved to the .dtsi (as all known devices use it as their boot-console) Specific to the P212 board: - this also enables the CVBS connector (which is not available on the Khadas VIM boards for example) - Realtek based SDIO wifi (instead of Broadcom which most other devices use) Signed-off-by:
-
- 10 Mar, 2017 2 commits
-
-
Carlo Caione authored
This patch adds support for the HwaCom AmazeTV set-top-box. The hardware configuration is really similar to the other GXL boards but for this hardware we need to limit the max-frequency of the eMMC to have it working. Acked-by:
Carlo Caione <carlo@endlessm.com> Signed-off-by:
-
Carlo Caione authored
Signed-off-by:
-
- 06 Mar, 2017 8 commits
-
-
Carlo Caione authored
Hwacom Systems Inc. is a broadband system integrator and supplier of mobile, fixed and IP networks related services as well as multimedia application. Website: http://www.hwacom.com/Signed-off-by:
-
Martin Blumenstingl authored
The ethmac node has to be configured for each board due to different pinctrl nodes for RGMII/RMII. Thus the phy-mode should be specified at the same place (= in the board .dts), making it easier to read the board .dts file (because the phy-mode is stated explicitly, without requiring developers to read all "parent" .dtsi as well). Signed-off-by:
-
Martin Blumenstingl authored
This adds the amlogic,tx-delay-ns property with the old (hardcoded) default value of 2ns to all boards which are using an RGMII ethernet PHY. Signed-off-by:
-
Martin Blumenstingl authored
Amlogic's own .dts specifies that the P201 board uses a RMII PHY (with the reset GPIO being GPIOZ_14). However our P201 board .dts simply inherits the phy-mode setting from from meson-gx.dtsi where it defaults to RGMII mode. Remove all ethernet settings from meson-gxbb-p20x.dtsi as it only specifies the RGMII pins which are only valid for the P200 board. Instead we add the ethmac node to the meson-gxbb-p201.dts and configure the pinctrl property and the phy-mode for an RMII PHY. An MDIO node (which would also specify the PHY) is not added since we don't know which PHY is being used (and thus which PHY address would have to be used). Signed-off-by:
-
Martin Blumenstingl authored
This resets the ethernet PHY during boot to get the PHY into a "clean" state. While here also specify the phy-handle of the ethmac node to make the PHY configuration similar to the one we have on GXL devices. This will allow us to specify OF-properties for the PHY itself. Signed-off-by:
-
Martin Blumenstingl authored
This resets the ethernet PHY during boot to get the PHY into a "clean" state. While here also specify the phy-handle of the ethmac node to make the PHY configuration similar to the one we have on GXL devices. This will allow us to specify OF-properties for the PHY itself. Signed-off-by:
-
Martin Blumenstingl authored
This resets the ethernet PHY during boot to get the PHY into a "clean" state. While here also specify the phy-handle of the ethmac node to make the PHY configuration similar to the one we have on GXL devices. This will allow us to specify OF-properties for the PHY itself. Signed-off-by:
-
Martin Blumenstingl authored
This resets the ethernet PHY during boot to get the PHY into a "clean" state. While here also specify the phy-handle of the ethmac node to make the PHY configuration similar to the one we have on GXL devices. This will allow us to specify OF-properties for the PHY itself. Signed-off-by:
-
