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- 04 Aug, 2010 1 commit
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Guennadi Liakhovetski authored
Add support for reparenting of div6 clocks on SuperH and SH-Mobile SoCs. Signed-off-by:
Guennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by:
Magnus Damm <damm@opensource.se> Signed-off-by:
Paul Mundt <lethal@linux-sh.org>
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- 13 May, 2010 3 commits
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Magnus Damm authored
Move the CPG helpers to drivers/sh/clk-cpg.c V2. This to allow SH-Mobile ARM to share the code with SH. All functions except the legacy CPG stuff is moved. Signed-off-by:
Magnus Damm <damm@opensource.se> Signed-off-by:
Paul Mundt <lethal@linux-sh.org>
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Magnus Damm authored
This patch converts the legacy clocks to register using clkdev. Also the clock name is removed. Signed-off-by:
Magnus Damm <damm@opensource.se> Signed-off-by:
Paul Mundt <lethal@linux-sh.org>
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Magnus Damm authored
Update the div4 set_parent() callback to use the flags instead of name to determine parent index. Signed-off-by:
Magnus Damm <damm@opensource.se> Signed-off-by:
Paul Mundt <lethal@linux-sh.org>
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- 29 Mar, 2010 1 commit
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Paul Mundt authored
For the CPUs that have not yet been converted off of legacy CPG we provide some pclk aliases in order to make driver migration easier. Signed-off-by:
Paul Mundt <lethal@linux-sh.org>
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- 22 Feb, 2010 3 commits
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Magnus Damm authored
This patch adds a ->kick() callback to clk_div4_table and ties it into sh_clk_div4_set_rate(). A sh7724 specific kick function is also added that updates the KICK bit whenever div4 clocks in FRQCRA and FRQCRB have been set. Allows us to set the VPU clock. Signed-off-by:
Magnus Damm <damm@opensource.se> Signed-off-by:
Paul Mundt <lethal@linux-sh.org>
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Magnus Damm authored
This patch introduces struct clk_div4_table. The structure will be used to keep div4 specific data, and is with this patch replacing the struct clk_div_mult_table pointer arg used by the sh_clk_div4_register() functions. Signed-off-by:
Magnus Damm <damm@opensource.se> Signed-off-by:
Paul Mundt <lethal@linux-sh.org>
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Magnus Damm authored
Make sure the div4 bitfield is shifted according to the enable_bit value in sh_clk_div4_set_rate(). Signed-off-by:
Magnus Damm <damm@opensource.se> Signed-off-by:
Paul Mundt <lethal@linux-sh.org>
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- 19 Jan, 2010 1 commit
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Guennadi Liakhovetski authored
Implement .set_rate() for all SH "div4 clocks," .enable(), .disable(), and .set_parent() for those, that support them. This allows, among other uses, reparenting of SIU clocks to the external source, and enabling and disabling of the IrDA clock on sh7722. Signed-off-by:
Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by:
Paul Mundt <lethal@linux-sh.org>
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- 17 Jun, 2009 1 commit
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Magnus Damm authored
Convert the shared clock cpg code from bootmem to slab. Without this patch the current bootmem code triggers WARN_ON() because the slab is available. Signed-off-by:
Magnus Damm <damm@igel.co.jp> Signed-off-by:
Paul Mundt <lethal@linux-sh.org>
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- 11 Jun, 2009 3 commits
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Magnus Damm authored
This patch updates the div6 clock helper code to add support for enable(), disable() and set_rate() callbacks. Needed by the camera clock enabling board code on Migo-R. Signed-off-by:
Magnus Damm <damm@igel.co.jp> Signed-off-by:
Paul Mundt <lethal@linux-sh.org>
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Magnus Damm authored
This patch adds div6 clock helper code. The div6 clocks are simply 6-bit divide-by-n modules where n is 1 to 64. Needed for vclk on sh7722, sh7723, sh7343 and sh7366. sh7724 needs this even more for vclk, fclka, fclkb, irdaclk and spuclk. Signed-off-by:
Magnus Damm <damm@igel.co.jp> Signed-off-by:
Paul Mundt <lethal@linux-sh.org>
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Magnus Damm authored
This patch fixes the per clock offset calculation in sh_clk_div4_register(). Without this patch the offset to the frequency table for each clock is incorrect. Signed-off-by:
Magnus Damm <damm@igel.co.jp> Signed-off-by:
Paul Mundt <lethal@linux-sh.org>
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- 01 Jun, 2009 2 commits
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Magnus Damm authored
Add shared code for 4-bit divisor clocks. Processor specific code can use SH_CLK_DIV4() to initialize div4 clocks, and then use sh_clk_div4_register() for registration. Signed-off-by:
Magnus Damm <damm@igel.co.jp> Signed-off-by:
Paul Mundt <lethal@linux-sh.org>
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Magnus Damm authored
Add shared 32-bit module stop bit clock support. Processor specific code can use SH_CLK_MSTP32() to initialize module stop bit clocks, and then use sh_clk_mstp32() for registration. Signed-off-by:
Magnus Damm <damm@igel.co.jp> Signed-off-by:
Paul Mundt <lethal@linux-sh.org>
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- 22 May, 2009 1 commit
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Paul Mundt authored
This adds a new SH_CLK_CPG for parts that have CPG support. SH_CLK_CPG_LEGACY is made to depend on this, and still needs to be set for platforms that want clock-cpg to register the legacy clocks. With this new config item in place, it is now possible to start layering more generic CPG code in place while other platforms transition off of the legacy clocks. Signed-off-by:
Paul Mundt <lethal@linux-sh.org>
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- 13 May, 2009 1 commit
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Paul Mundt authored
This moves out the old legacy CPG clocks to their own file, and converts over the existing users. With these clocks going away and each CPU dealing with them on their own, CPUs can gradually move over to the new interface. Signed-off-by:
Paul Mundt <lethal@linux-sh.org>
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