- 14 Jun, 2023 1 commit
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Suraj Kandpal authored
Allocate a multipage object that can be used for input and output for intel_hdcp_gsc_message so that corruption of output message can be avoided by the current overwriting method. Modify intel_gsc_send_sync() to take into account header_out and addr_out so as to use them to verify the message send status. Check link for comment and review history https://patchwork.freedesktop.org/series/118499/ --v2 -Change approach from allocating two objects to just one multipage object [Daniele] --v3 -Squash the two patches together [Daniele] -No need to allocate twice the size of intel_hdcp_gsc_message [Daniele] Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Cc: Alan Previn <alan.previn.teres.alexis@intel.com> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Signed-off-by:
Suraj Kandpal <suraj.kandpal@intel.com> Reviewed-by:
Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Signed-off-by:
Ankit Nautiyal <ankit.k.nautiyal@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230602105113.1791104-1-suraj.kandpal@intel.com
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- 13 Jun, 2023 13 commits
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Ville Syrjälä authored
No idea why the DSI code is feeling the need to assert that has_pch_encoder must not be set. PCH encoders aren't even a thing on any platform that has DSI. Reviewed-by:
Jani Nikula <jani.nikula@intel.com> Signed-off-by:
Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230608203057.23759-14-ville.syrjala@linux.intel.com
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Ville Syrjälä authored
The encoder hooks already get passed the crtc state so just grab the crtc from there instead of from the connector state. This is generally what everyone else does, so no reason for icl_dsi.c to be different. Reviewed-by:
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Ville Syrjälä authored
Follow what Windows does and do the DSI panel reset+power off after everything else. v2: s/intel_dsi_msleep/msleep/ Reviewed-by:
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Ville Syrjälä authored
icl+ DSI isn't respecting the panel power_off_delay. Remedy that. Reviewed-by:
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Ville Syrjälä authored
Do the scaler disable in the spot where bspec has specfied it for TGL+. And also move the DSC disable to match what intel_ddi.c does. Reviewed-by:
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Ville Syrjälä authored
encoder->disable() is supposed to happen before the pipe/transcoder gets disabled. The icl+ DSI code screwed that up and put most things (including the transcoder disable itself) into encoder->disable(). Follow the common rules and hoist most things into the encoder->post_disable() hook. Reviewed-by:
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Ville Syrjälä authored
Plug in the encoder->shutdown() hook for icl+ DSI so that we are guaranteed to respect the power cycle delay during reboots and whatnot. Reviewed-by:
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Ville Syrjälä authored
Handle the DSI panel power cycle delay on icl+. Reviewed-by:
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Ville Syrjälä authored
The clock gating step is in the wrong spot compared to the TGL+ bspec sequence. Move it the right place. Windows also seems to use the TGL+ order here always. Reviewed-by:
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Ville Syrjälä authored
The programming of the DPHY vs. DSI _TIMING registers are two separate steps in the TGL+ bspec sequence, with some other stuff in between. Implement the same split. Windows also seems follow the bspec TGL+ sequence, even on ICL/JSL. Reviewed-by:
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Ville Syrjälä authored
Help out debugging things by printing out how long the VBT delay sequence is supposed to wait. Reviewed-by:
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Ville Syrjälä authored
Doing the init OTP and display on DSI sequences back to back doesn't really make any sense (a single sequence would suffice then). Move the display on sequence to be done just before backlight on, which is also what Windows does. Reviewed-by:
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Ville Syrjälä authored
Looks like we're trying to talk to the DSI panel even before turning it on, on icl+. Bspec doesn't actually specify when these should be done, but certainly we need to turn the panel on at least before talking to it. So let's move the power on + reset deassert steps to be the first thing we do. This is also what Windows does. v2: s/intel_dsi_msleep/msleep/ Reviewed-by:
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- 12 Jun, 2023 1 commit
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Arnd Bergmann authored
When CONFIG_PNP is disabled, the mchbar_addr variable is only written but not read: drivers/gpu/drm/i915/soc/intel_gmch.c: In function 'intel_alloc_mchbar_resource': drivers/gpu/drm/i915/soc/intel_gmch.c:41:13: error: variable 'mchbar_addr' set but not used [-Werror=unused-but-set-variable] 41 | u64 mchbar_addr; | ^~~~~~~~~~~ No idea why this showed up now, but it's easy to fix by changing the #ifdef to an IS_ENABLED() check that the compiler can see through. Signed-off-by:Arnd Bergmann <arnd@arndb.de> Reviewed-by:
Andi Shyti <andi.shyti@linux.intel.com> Signed-off-by:
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- 10 Jun, 2023 4 commits
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Jani Nikula authored
Sync up with changes from drm-intel-gt-next. Signed-off-by: -
Luca Coelho authored
Instead of using a global workqueue for the SW fence selftest, allocate a separate one temporarily only while running the test. Cc: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp> Cc: Jani Nikula <jani.nikula@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by:
Tvrtko Ursulin <tvrtko.ursulin@intel.com> Signed-off-by:
Luca Coelho <luciano.coelho@intel.com> Signed-off-by:
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Luca Coelho authored
In order to avoid flush_scheduled_work() usage, add a dedicated workqueue in the drm_i915_private structure. In this way, we don't need to use the system queue anymore. This change is mostly mechanical and based on Tetsuo's original patch[1]. v6 by Jani: - Also create unordered_wq for mock device Link: https://patchwork.freedesktop.org/series/114608/ [1] Cc: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Cc: Jani Nikula <jani.nikula@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by:
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Luca Coelho authored
Currently a pointer to an intel_runtime_pm structure is stored in the wake reference structures so the runtime data can be accessed. We can save the entire device information (drm_i915_private) instead, since we'll need to reference the new workqueue we'll add in subsequent patches. Reviewed-by:
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- 09 Jun, 2023 5 commits
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Dave Airlie authored
Merge tag 'drm-intel-gt-next-2023-06-08' of git://anongit.freedesktop.org/drm/drm-intel into drm-next UAPI Changes: - I915_GEM_CREATE_EXT_SET_PAT for Mesa on Meteorlake. Driver Changes: Fixes/improvements/new stuff: - Use large rings for compute contexts (Chris Wilson) - Better logging/debug of unexpected GuC communication issues (Michal Wajdeczko) - Clear out entire reports after reading if not power of 2 size (Ashutosh Dixit) - Limit lmem allocation size to succeed on SmallBars (Andrzej Hajda) - perf/OA capture robustness improvements on DG2 (Umesh Nerlige Ramappa) - Fix error code in intel_gsc_uc_heci_cmd_submit_nonpriv() (Dan Carpenter) Future platform enablement: - Add workaround 14016712196 (Tejas Upadhyay) - HuC loading for MTL (Daniele Ceraolo Spurio) - Allow user to set cache at BO creation (Fei Yang) Miscellaneous: - Use system include style for drm headers (Jani Nikula) - Drop legacy CTB definitions (Michal Wajdeczko) - Turn off the timer to sample frequencies when GT is parked (Ashutosh Dixit) - Make PMU sample array two-dimensional (Ashutosh Dixit) - Use the correct error value when kernel_context() fails (Andi Shyti) - Fix second parameter type of pre-gen8 pte_encode callbacks (Nathan Chancellor) - Fix parameter in gmch_ggtt_insert_{entries, page}() (Nathan Chancellor) - Fix size_t format specifier in gsccs_send_message() (Nathan Chancellor) - Use the fdinfo helper (Tvrtko Ursulin) - Add some missing error propagation (Tvrtko Ursulin) - Reduce I915_MAX_GT to 2 (Matt Atwood) - Rename I915_PMU_MAX_GTS to I915_PMU_MAX_GT (Matt Atwood) - Remove some obsolete definitions (John Harrison) Merges: - Merge drm/drm-next into drm-intel-gt-next (Tvrtko Ursulin) Signed-off-by:
Dave Airlie <airlied@redhat.com> From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/ZIH09fqe5v5yArsu@tursulin-desk
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git://anongit.freedesktop.org/drm/drm-intelDave Airlie authored
drm/i915 features for v6.5: Features and functionality: - Meteorlake (MTL) display enabling (Mika, Radhakrishna, José, Ankit, Clint, Gustavo, Imre, Anusha, Juha-Pekka, Matt) - Allow VRR to be toggled during fastsets (Ville) - Allow arbitrary refresh rates with VRR eDP panels (Ville) - Support async flips on linear buffers on display ver 12+ (Arun) - New debugfs for display clock frequencies (Bhanuprakash) - Taint kernel when force probing unsupported devices (Jani) - Expose CRTC CTM property on ILK/SNB/VLV (Ville) DRM subsystem changes: - EDID changes to support further conversion to struct drm_edid (Jani) - Move i915 DSC parameter code to common DRM helpers (Dmitry Baryshkov) Refactoring and cleanups: - CSC color refactoring (Ville) - VRR cleanups (Ville) - Finish i915 conversion to struct drm_edid (Jani) - Start high level display driver file (Jani) - Hotplug refactoring (Ville) - Misc display refactoring and cleanups (Jani, Ville) - Use device based logging for state checker warnings (Jani) - Split out hotplug and display irq handling (Jani) - Move display device info and probe under display/ (Matt) - HDCP cleanups (Suraj) - Use localized warning ignores instead of per file (Jani) - Remove superfluous enum i915_drm_suspend_mode (Maarten) - PSR, pfit, scaler and chicken register definition cleanups (Ville) - Constify pointers to hwmon_channel_info (Krzysztof Kozlowski) - Replace all non-returning strlcpy with strscpy (Azeem Shaikh) - Refactor VBT aux channel and DDC pin mapping (Ville) - Include cleanups (Jani) Fixes: - Fix modeset locking issue in DP MST HDCP (Suraj) - Fix disconnected Type-C/DP-alt disable at probe (Imre) - Fix HDMI PCON DSC usage and color conversions (Ankit) - Fix g4x HDMI infoframe/audio transmission port usage (Ville) - Avoid use-after-free when DP connector init fails (Maarten) - Fix voltage level for 480 MHz CDCLK (Chaitanya) - Check HPD live state during eDP probe (Ville) - Fix active port PLL selection for secondary MST streams (Imre) - Check pipe source size when using SKL+ scalers (Ville) - Fix MIPI DSI sleep sequences (Hans de Goede) - Fix DPCD register write order to match 128b/132b requirement (Arun) - Increase AUX timeout for Type-C (Suraj) - Communicate display power demands to pcode (Stan) - Fix potential division by zero in DSC compute config (Nikita Zhandarovich) - Fix fast wake AUX sync length (Jouni) - Fix potential oops on intel_get_crtc_new_encoder() (Ville) Merges: - drm-next backmerges (Rodrigo, Jani) Signed-off-by:
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git://anongit.freedesktop.org/drm/drm-miscDave Airlie authored
drm-misc-next for v6.5: UAPI Changes: Cross-subsystem Changes: Core Changes: Driver Changes: * bridge * imx: Fix module linking * tc358762: Support reset GPIO * meson * Add support for MIPI DSI displays; plus fixes and DT bindings * panel * Add Support for Rocktech RK043FN48H; plus DT bindings * Add support for Starry himax83102-j02; plus DT bindings * Add support for Starry ili9882t; plus DT bindings * virtio * Support sync-object UAPI Signed-off-by:
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Dave Airlie authored
Merge tag 'drm-habanalabs-next-2023-06-08' of https://git.kernel.org/pub/scm/linux/kernel/git/ogabbay/linux into drm-next This tag contains additional habanalabs driver changes for v6.5: - uAPI changes: - Return 0 when user queries if there was a h/w or f/w error and no such error happened. Previously we returned an error in such case. - New features and improvements: - Add pci health check when we lose connection with the firmware. This can be used to distinguish between pci link down and firmware getting stuck. - Add more info to the error print when TPC interrupt occur. - Reduce amount of code under mutex in the command submission of signal event. - Firmware related fixes: - Fixes to the handshake protocol during f/w initialization. - Display information that the f/w sends us when encountering a DMA error. - Do soft-reset using a message sent to firmware instead of writing to MMIO. - Prepare generic code to extract f/w version numbers. - Bug fixes and code cleanups. Notable fixes are: - Unsecure certain TPC registers that the user should access. - Fix handling of QMAN errors - Fix memory leak when recording errors (to later pass them to the user) - Multiple fixes to razwi interrupt handling code Signed-off-by:
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Dave Airlie authored
Merge tag 'drm-next-20230529' of git://git.kernel.org/pub/scm/linux/kernel/git/pinchartl/linux into drm-next Renesas DRM/KMS drivers: - Group drivers in renesas subdirectory to prepare for new platform - Drop deprecated R-Car H3 ES1.x support Signed-off-by:
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- 08 Jun, 2023 16 commits
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Dani Liberman authored
Moved error info reset code to single function for future use from other places in the driver. Signed-off-by:
Dani Liberman <dliberman@habana.ai> Reviewed-by:
Oded Gabbay <ogabbay@kernel.org> Signed-off-by:
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Ofir Bitton authored
In order to increase reliability of the event queue interface, we apply to Gaudi2 the same mechanism we have in Gaudi1. The extra validation is basically checking that the received event index matches the expected index. Signed-off-by:
Ofir Bitton <obitton@habana.ai> Reviewed-by:
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Ofir Bitton authored
In order to utilize Engine Barrier padding, user must have access to this register set. Signed-off-by:
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Oded Gabbay authored
We don't want to allow users to spam the kernel log and sending ioctls with bad opcodes is a sure way to do it. Signed-off-by:
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Ofir Bitton authored
addr_dec info should always be fetched, regardless of cause value. Signed-off-by:
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Dani Liberman authored
Several info ioctls may return success although no data retrieved. Signed-off-by:
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Oded Gabbay authored
There were a few places where simulator only code got into the upstream. Remove those places that can confuse other developers. Fixes: 2a0a839b ("habanalabs: extend fatal messages to contain PCI info") Cc: Moti Haimovski <mhaimovski@habana.ai> Cc: Dan Carpenter <dan.carpenter@linaro.org> Signed-off-by:
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Dani Liberman authored
When receiving page fault from hmmu, the captured address is scrambled both by HW and by driver. The driver part is unscrambled but the HW part isn't getting unscrambled. To avoid declaring wrong address, the HW scrambled part will be masked. Signed-off-by:
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Koby Elbaz authored
Any FW component we load must be followed by a corresponding state update. However, it seems that so far we skipped doing so for the bootfit case, so fix that. Signed-off-by:
Koby Elbaz <kelbaz@habana.ai> Reviewed-by:
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Tomer Tayar authored
By default, the upper QMANs are not used, and instead engines ARCs access the lower QMANs directly. Errors for upper QMANs are therefore not expected, and the debug print of the PQ entries is not needed. Modify the QMAN debug data print on errors to include only information for the lower QMAN. Signed-off-by:
Tomer Tayar <ttayar@habana.ai> Reviewed-by:
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Tomer Tayar authored
The QMAN GLBL_ERR_STS_4 register has indications for errors also in the lower CQ and the ARC CQ, and not just for errors in the lower CP. Modify the relevant define/struct and the related print to use "lower QM" instead of "lower CP". Signed-off-by:
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Dani Liberman authored
When receiving sei interrupt from tpc or decoder, we need to check the binning mask because if the engine is binned, the razwi info won't be in the router of the binned engine, instead will be in the router of the substitute engine. Signed-off-by:
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Ofir Bitton authored
As mmu disable mode is only used for bring-up stages, let's remove this option and all code related to it. Signed-off-by:
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Koby Elbaz authored
Initially, the driver used to read the error cause data directly from the ASIC. However, the FW now clears it before the driver could read it. Therefore we should use the error cause data that is extracted by the FW. Signed-off-by:
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Oded Gabbay authored
If a workload got stuck, we print an error to the kernel log about it. Add to that print the configured max timeout value, as that value is not fixed between ASICs and in addition it can be configured using a kernel module parameter. Signed-off-by:
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Oded Gabbay authored
Update the firmware common interface files with the latest version. Signed-off-by:
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