- 03 Feb, 2022 23 commits
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David S. Miller authored
Miroslav Lichvar says: ==================== Virtual PTP clock improvements and fix v2: - dropped patch changing initial time of virtual clocks The first patch fixes an oops when unloading a driver with PTP clock and enabled virtual clocks. The other patches add missing features to make synchronization with virtual clocks work as well as with the physical clock. ==================== Signed-off-by:David S. Miller <davem@davemloft.net>
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Miroslav Lichvar authored
If the physical clock supports cross timestamping (it has the getcrosststamp() function), provide a wrapper in the virtual clock to enable cross timestamping. This adds support for the PTP_SYS_OFFSET_PRECISE ioctl. Signed-off-by:
Miroslav Lichvar <mlichvar@redhat.com> Acked-by:
Richard Cochran <richardcochran@gmail.com> Cc: Yangbo Lu <yangbo.lu@nxp.com> Signed-off-by:
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Miroslav Lichvar authored
If the physical clock has the gettimex64() function, provide a gettimex64() wrapper in the virtual clock to enable more accurate and stable synchronization. This adds support for the PTP_SYS_OFFSET_EXTENDED ioctl. Signed-off-by:
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Miroslav Lichvar authored
Increase the maximum frequency offset of virtual clocks to 50% to enable faster slewing corrections. This value cannot be represented as scaled ppm when long has 32 bits, but that is already the case for other drivers, even those that provide the adjfine() function, i.e. 32-bit applications are expected to check for the limit. Signed-off-by:
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Miroslav Lichvar authored
When unregistering a physical clock which has some virtual clocks, unregister the virtual clocks with it. This fixes the following oops, which can be triggered by unloading a driver providing a PTP clock when it has enabled virtual clocks: BUG: unable to handle page fault for address: ffffffffc04fc4d8 Oops: 0000 [#1] PREEMPT SMP NOPTI RIP: 0010:ptp_vclock_read+0x31/0xb0 Call Trace: timecounter_read+0xf/0x50 ptp_vclock_refresh+0x2c/0x50 ? ptp_clock_release+0x40/0x40 ptp_aux_kworker+0x17/0x30 kthread_worker_fn+0x9b/0x240 ? kthread_should_park+0x30/0x30 kthread+0xe2/0x110 ? kthread_complete_and_exit+0x20/0x20 ret_from_fork+0x22/0x30 Fixes: 73f37068 ("ptp: support ptp physical/virtual clocks conversion") Signed-off-by:
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Alexander Duyck authored
This change is meant to permit a driver to perform "fragmenting" of the page from within the driver instead of the current model which requires pre-partitioning the page. The main motivation behind this is to support use cases where the page will be split up by the driver after DMA instead of before. With this change it becomes possible to start using page pool to replace some of the existing use cases where multiple references were being used for a single page, but the number needed was unknown as the size could be dynamic. For example, with this code it would be possible to do something like the following to handle allocation: page = page_pool_alloc_pages(); if (!page) return NULL; page_pool_fragment_page(page, DRIVER_PAGECNT_BIAS_MAX); rx_buf->page = page; rx_buf->pagecnt_bias = DRIVER_PAGECNT_BIAS_MAX; Then we would process a received buffer by handling it with: rx_buf->pagecnt_bias--; Once the page has been fully consumed we could then flush the remaining instances with: if (page_pool_defrag_page(page, rx_buf->pagecnt_bias)) continue; page_pool_put_defragged_page(pool, page -1, !!budget); The general idea is that we want to have the ability to allocate a page with excess fragment count and then trim off the unneeded fragments. Signed-off-by:Alexander Duyck <alexanderduyck@fb.com> Reviewed-by:
Ilias Apalodimas <ilias.apalodimas@linaro.org> Signed-off-by:
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David S. Miller authored
Russell King says: ==================== Trivial DSA conversions to phylink_generic_validate() This series converts five DSA drivers to use phylink_generic_validate(). No feedback or testing reports were received from the CFT posting. ==================== Signed-off-by: -
Russell King (Oracle) authored
Populate the supported interfaces and MAC capabilities for the xrs700x family of DSA switches and remove the old validate implementation to allow DSA to use phylink_generic_validate() for this switch driver. According to commit ee00b24f ("net: dsa: add Arrow SpeedChips XRS700x driver") the switch supports one RMII port and up to three RGMII ports. This commit assumes that port 0 is the RMII port and the remainder are RGMII. This commit also results in the Autoneg bit being set in the ethtool link modes, which wasn't in the original; if this switch supports RGMII to a 10/100/1G PHY, then surely we want to allow Autoneg on the PHY. Signed-off-by:
Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Signed-off-by:
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Russell King (Oracle) authored
Populate the supported interfaces and MAC capabilities for the QCA8K DSA switch and remove the old validate implementation to allow DSA to use phylink_generic_validate() for this switch driver. In making this change, we bring consistency to the ethtool linkmodes that phylink's validate step produces, thereby following the expected behaviour as the phylink documentation has explained. Specifically, the ethtool 1000baseX_Full capability is now permitted for all interface modes, as it is a property of the PHY driver whether 1000baseX fiber connections can be supported. Signed-off-by:
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Russell King (Oracle) authored
Populate the supported interfaces and MAC capabilities for the Microchip KSZ8795 DSA switch and remove the old validate implementation to allow DSA to use phylink_generic_validate() for this switch driver. Signed-off-by:
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Russell King (Oracle) authored
Populate the supported interfaces and MAC capabilities for the bcm_sf2 DSA switch and remove the old validate implementation to allow DSA to use phylink_generic_validate() for this switch driver. The exclusion of Gigabit linkmodes for MII and Reverse MII links is handled within phylink_generic_validate() in phylink, so there is no need to make them conditional on the interface mode in the driver. Thanks to Florian Fainelli for suggesting how to populate the supported interfaces. Link: https://lore.kernel.org/r/3b3fed98-0c82-99e9-dc72-09fe01c2bcf3@gmail.comSigned-off-by:
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Russell King (Oracle) authored
Populate the supported interfaces and MAC capabilities for the AR9331 DSA switch and remove the old validate implementation to allow DSA to use phylink_generic_validate() for this switch driver. Signed-off-by:
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David S. Miller authored
Mat Martineau says: ==================== mptcp: Miscellaneous changes for 5.18 Patch 1 has some minor cleanup in mptcp_write_options(). Patch 2 moves a rarely-needed branch to optimize mptcp_write_options(). Patch 3 adds a comment explaining which combinations of MPTCP option headers are expected. Patch 4 adds a pr_debug() for the MPTCP_RST option. Patches 5-7 allow setting MPTCP_PM_ADDR_FLAG_FULLMESH with the "set flags" netlink command. This allows changing the behavior of existing path manager endpoints. The flag was previously only set at endpoint creation time. Associated selftests also updated. ==================== Signed-off-by: -
Geliang Tang authored
This patch added the fullmesh setting and clearing selftests in mptcp_join.sh. Now we can set both backup and fullmesh flags, so avoid using the words 'backup' and 'bkup'. Acked-by:
Paolo Abeni <pabeni@redhat.com> Signed-off-by:
Geliang Tang <geliang.tang@suse.com> Signed-off-by:
Mat Martineau <mathew.j.martineau@linux.intel.com> Signed-off-by:
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Geliang Tang authored
This patch added the fullmesh flag setting and clearing support in pm_nl_ctl: # pm_nl_ctl set ip flags fullmesh # pm_nl_ctl set ip flags nofullmesh Acked-by:
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Geliang Tang authored
This patch added the fullmesh flag setting support in pm_netlink. If the fullmesh flag of the address is changed, remove all the related subflows, update the fullmesh flag and create subflows again. Acked-by:
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Geliang Tang authored
This patch printed out the reset infos, reset_transient and reset_reason, of MP_RST in mptcp_parse_option() to show that MP_RST is received. Signed-off-by:
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Matthieu Baerts authored
RFC8684 doesn't seem to clearly specify which MPTCP options can be used together. Some options are mutually exclusive -- e.g. MP_CAPABLE and MP_JOIN --, some can be used together -- e.g. DSS + MP_PRIO --, some can but we prefer not to -- e.g. DSS + ADD_ADDR -- and some have to be used together at some points -- e.g. MP_FAIL and DSS. We need to clarify this as a base before allowing other modifications. For example, does it make sense to send a RM_ADDR with an MPC or MPJ? This remains open for possible future discussions. Signed-off-by:
Matthieu Baerts <matthieu.baerts@tessares.net> Signed-off-by:
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Matthieu Baerts authored
MP_FAIL should be use in very rare cases, either when the TCP RST flag is set -- with or without an MP_RST -- or with a DSS, see mptcp_established_options(). Here, we do the same in mptcp_write_options(). Co-developed-by:
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Geliang Tang authored
Move the declarations of ssk and subflow in MP_FAIL and MP_PRIO to the beginning of the function mptcp_write_options(). Signed-off-by:
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Jakub Kicinski authored
Alex Elder says: ==================== net: ipa: support variable RX buffer size Specify the size of receive buffers used for RX endpoints in the configuration data, rather than using 8192 bytes for all of them. Increase the size of the AP receive buffer for the modem to 32KB. ==================== Link: https://lore.kernel.org/r/20220201153737.601149-1-elder@linaro.orgSigned-off-by:
Jakub Kicinski <kuba@kernel.org>
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Alex Elder authored
Increase the receive buffer size used for data received from the modem to 32KB, to improve download performance by allowing much greater aggregation. Signed-off-by:
Alex Elder <elder@linaro.org> Signed-off-by:
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Alex Elder authored
Allow RX endpoints to have differing receive buffer sizes. Define the receive buffer size in the configuration data, and use that rather than IPA_RX_BUFFER_SIZE when configuring the endpoint. Add verification in ipa_endpoint_data_valid_one() that the receive buffer specified for AP RX endpoints is both big enough to handle at least one full packet, and not so big in an aggregating endpoint that its size can't be represented when programming the hardware. Move aggr_byte_limit_max() up in "ipa_endpoint.c" so it can be used earlier in the file without a forward-reference. Initially we'll just keep the 8KB receive buffer size already in use for all AP RX endpoints.. Signed-off-by:
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- 02 Feb, 2022 17 commits
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Rafael J. Wysocki authored
Replace acpi_bus_get_device() that is going to be dropped with acpi_fetch_acpi_dev(). No intentional functional impact. Reviewed-by:
Andrew Lunn <andrew@lunn.ch> Signed-off-by:
Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://lore.kernel.org/r/11918902.O9o76ZdvQC@kreacher Link: https://lore.kernel.org/r/11920660.O9o76ZdvQC@kreacherSigned-off-by:
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Akhmat Karakotov authored
When setting RTO through BPF program, some SYN ACK packets were unaffected and continued to use TCP_TIMEOUT_INIT constant. This patch adds timeout option to struct request_sock. Option is initialized with TCP_TIMEOUT_INIT and is reassigned through BPF using tcp_timeout_init call. SYN ACK retransmits now use newly added timeout option. Signed-off-by:
Akhmat Karakotov <hmukos@yandex-team.ru> Acked-by:
Martin KaFai Lau <kafai@fb.com> v2: - Add timeout option to struct request_sock. Do not call tcp_timeout_init on every syn ack retransmit. v3: - Use unsigned long for min. Bound tcp_timeout_init to TCP_RTO_MAX. v4: - Refactor duplicate code by adding reqsk_timeout function. Signed-off-by:
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David S. Miller authored
Ansuel Smith says: ==================== Add support for qca8k mdio rw in Ethernet packet The main reason for this is that we notice some routing problem in the switch and it seems assisted learning is needed. Considering mdio is quite slow due to the indirect write using this Ethernet alternative way seems to be quicker. The qca8k switch supports a special way to pass mdio read/write request using specially crafted Ethernet packet. This works by putting some defined data in the Ethernet header where the mac source and dst should be placed. The Ethernet type header is set to qca header and is set to a mdio read/write type. This is used to communicate to the switch that this is a special packet and should be parsed differently. Currently we use Ethernet packet for - MIB counter - mdio read/write configuration - phy read/write for each port Current implementation of this use completion API to wait for the packet to be processed by the tagger and has a timeout that fallback to the legacy mdio way and mutex to enforce one transaction at time. We now have connect()/disconnect() ops for the tagger. They are used to allocate priv data in the dsa priv. The header still has to be put in global include to make it usable by a dsa driver. They are called when the tag is connect to the dst and the data is freed using discconect on tagger change. (if someone wonder why the bind function is put at in the general setup function it's because tag is set in the cpu port where the notifier is still not available and we require the notifier to sen the tag_proto_connect() event. We now have a tag_proto_connect() for the dsa driver used to put additional data in the tagger priv (that is actually the dsa priv). This is called using a switch event DSA_NOTIFIER_TAG_PROTO_CONNECT. Current use for this is adding handler for the Ethernet packet to keep the tagger code as dumb as possible. The tagger priv implement only the handler for the special packet. All the other stuff is placed in the qca8k_priv and the tagger has to access it under lock. We use the new API from Vladimir to track if the master port is operational or not. We had to track many thing to reach a usable state. Checking if the port is UP is not enough and tracking a NETDEV_CHANGE is also not enough since it use also for other task. The correct way was both track for interface UP and if a qdisc was assigned to the interface. That tells us the port (and the tagger indirectly) is ready to accept and process packet. I tested this with multicpu port and with port6 set as the unique port and it's sad. It seems they implemented this feature in a bad way and this is only supported with cpu port0. When cpu port6 is the unique port, the switch doesn't send ack packet. With multicpu port, packet ack are not duplicated and only cpu port0 sends them. This is the same for the MIB counter. For this reason this feature is enabled only when cpu port0 is enabled and operational. v8: - Reworked to rolling counter for the seq_num - Reworked the hi/lo cache patch - Fix multiple missing skb free and mutex lock errors - Fix some spelling mistake - Add macro build check for mgmt packet size - Change some struct naming to make them more descriptive v7: - Rebase on net-next changes - Add bulk patches to speedup this even more v6: - Fix some error in ethtool handler caused by rebase/cleanup v5: - Adapt to new API fixes - Fix a wrong logic for noop - Add additional lock for master_state change - Limit mdio Ethernet to cpu port0 (switch limitation) - Add priority to these special packet - Move mdio cache to qca8k_priv v4: - Remove duplicate patch sent by mistake. v3: - Include MIB with Ethernet packet. - Include phy read/write with Ethernet packet. - Reorganize code with new API. - Introuce master tracking by Vladimir v2: - Address all suggestion from Vladimir. Try to generilize this with connect/disconnect function from the tagger and tag_proto_connect for the driver. ==================== Signed-off-by: -
Ansuel Smith authored
Introduce qca8k_bulk_read/write() function to use mgmt Ethernet way to read/write packet in bulk. Make use of this new function in the fdb function and while at it reduce the reg for fdb_read from 4 to 3 as the max bit for the ARL(fdb) table is 83 bits. Signed-off-by:
Ansuel Smith <ansuelsmth@gmail.com> Signed-off-by:
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Ansuel Smith authored
mgmt Ethernet packet can read/write up to 16byte at times. The len reg is limited to 15 (0xf). The switch actually sends and accepts data in 4 different steps of len values. Len steps: - 0: nothing - 1-4: first 4 byte - 5-6: first 12 byte - 7-15: all 16 byte In the alloc skb function we check if the len is 16 and we fix it to a len of 15. It the read/write function interest to extract the real asked data. The tagger handler will always copy the fully 16byte with a READ command. This is useful for some big regs like the fdb reg that are more than 4byte of data. This permits to introduce a bulk function that will send and request the entire entry in one go. Write function is changed and it does now require to pass the pointer to val to also handle array val. Signed-off-by:
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Ansuel Smith authored
From Documentation, we can cache lo and hi the same way we do with the page. This massively reduce the mdio write as 3/4 of the time as we only require to write the lo or hi part for a mdio write. Signed-off-by:
Florian Fainelli <f.fainelli@gmail.com> Signed-off-by:
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Ansuel Smith authored
There can be multiple qca8k switch on the same system. Move the static qca8k_current_page to qca8k_priv and make it specific for each switch. Signed-off-by:
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Ansuel Smith authored
Use mgmt Ethernet also for phy read/write if availabale. Use a different seq number to make sure we receive the correct packet. On any error, we fallback to the legacy mdio read/write. Signed-off-by:
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Ansuel Smith authored
The switch can autocast MIB counter using Ethernet packet. Add support for this and provide a handler for the tagger. The switch will send packet with MIB counter for each port, the switch will use completion API to wait for the correct packet to be received and will complete the task only when each packet is received. Although the handler will drop all the other packet, we still have to consume each MIB packet to complete the request. This is done to prevent mixed data with concurrent ethtool request. connect_tag_protocol() is used to add the handler to the tag_qca tagger, master_state_change() use the MIB lock to make sure no MIB Ethernet is in progress. Signed-off-by:
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Ansuel Smith authored
Add qca8k side support for mgmt read/write in Ethernet packet. qca8k supports some specially crafted Ethernet packet that can be used for mgmt read/write instead of the legacy method uart/internal mdio. This add support for the qca8k side to craft the packet and enqueue it. Each port and the qca8k_priv have a special struct to put data in it. The completion API is used to wait for the packet to be received back with the requested data. The various steps are: 1. Craft the special packet with the qca hdr set to mgmt read/write mode. 2. Set the lock in the dedicated mgmt struct. 3. Increment the seq number and set it in the mgmt pkt 4. Reinit the completion. 5. Enqueue the packet. 6. Wait the packet to be received. 7. Use the data set by the tagger to complete the mdio operation. If the completion timeouts or the ack value is not true, the legacy mdio way is used. It has to be considered that in the initial setup mdio is still used and mdio is still used until DSA is ready to accept and tag packet. tag_proto_connect() is used to fill the required handler for the tagger to correctly parse and elaborate the special Ethernet mdio packet. Locking is added to qca8k_master_change() to make sure no mgmt Ethernet are in progress. Signed-off-by:
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Ansuel Smith authored
MDIO/MIB Ethernet require the master port and the tagger availabale to correctly work. Use the new api master_state_change to track when master is operational or not and set a bool in qca8k_priv. We cache the first cached master available and we check if other cpu port are operational when the cached one goes down. This cached master will later be used by mdio read/write and mib request to correctly use the working function. qca8k implementation for MDIO/MIB Ethernet is bad. CPU port0 is the only one that answers with the ack packet or sends MIB Ethernet packets. For this reason the master_state_change ignore CPU port6 and only checks CPU port0 if it's operational and enables this mode. Signed-off-by:
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Ansuel Smith authored
Add connect/disconnect helper to assign private struct to the DSA switch. Add support for Ethernet mgmt and MIB if the DSA driver provide an handler to correctly parse and elaborate the data. Signed-off-by:
Vladimir Oltean <olteanv@gmail.com> Reviewed-by:
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Ansuel Smith authored
Add struct to correctly parse a mib Ethernet packet. Signed-off-by:
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Ansuel Smith authored
Add all the required define to prepare support for mgmt read/write in Ethernet packet. Any packet of this type has to be dropped as the only use of these special packet is receive ack for an mgmt write request or receive data for an mgmt read request. A struct is used that emulates the Ethernet header but is used for a different purpose. Signed-off-by:
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Ansuel Smith authored
Ethernet MDIO packets are non-standard and DSA master expects the first 6 octets to be the MAC DA. To address these kind of packet, enable promisc_on_master flag for the tagger. Signed-off-by:
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Ansuel Smith authored
Move tag_qca define to include dir linux/dsa as the qca8k require access to the tagger define to support in-band mdio read/write using ethernet packet. Signed-off-by:
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Ansuel Smith authored
Convert driver to FIELD macro to drop redundant define. Signed-off-by:
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