- 11 May, 2012 17 commits
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Richard Zhao authored
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Richard Zhao <richard.zhao@freescale.com> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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Richard Zhao authored
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Richard Zhao authored
It's used by audio drivers. Signed-off-by:
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Richard Zhao authored
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Richard Zhao authored
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Richard Zhao authored
Signed-off-by:
Richard Zhao <richard.zhao@linaro.org> Signed-off-by:
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Richard Zhao authored
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Dong Aisheng authored
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Dong Aisheng <dong.aisheng@linaro.org> Signed-off-by:
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Dirk Behme authored
To be able to enable early debugging on boards using the UART2 for the console, add the option for early debugging on UART2. Signed-off-by:
Dirk Behme <dirk.behme@de.bosch.com> Signed-off-by:
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Shawn Guo authored
It fixes the following compile error with network disabled in imx_v6_v7_defconfig. arch/arm/mach-imx/built-in.o: In function `ksz9021rn_phy_fixup': imx53-dt.c:(.text+0x5f70): undefined reference to `mdiobus_write' imx53-dt.c:(.text+0x5f84): undefined reference to `mdiobus_write' imx53-dt.c:(.text+0x5f98): undefined reference to `mdiobus_write' imx53-dt.c:(.text+0x5fac): undefined reference to `mdiobus_write' imx53-dt.c:(.text+0x5fc0): undefined reference to `mdiobus_write' arch/arm/mach-imx/built-in.o: In function `imx6q_init_machine': imx53-dt.c:(.init.text+0x387c): undefined reference to `phy_register_fixup_for_uid' make: *** [.tmp_vmlinux1] Error 1 Reported-by:
Artem Bityutskiy <dedekind1@gmail.com> Signed-off-by:
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Richard Zhao authored
It'll be easier to add other board specific code. Signed-off-by:
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Fabio Estevam authored
mx6qsabrelite has a sst25vf016b SPI NOR flash connected to eCSPI1. Add support for it. Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by:
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Fabio Estevam authored
Add basic support for imx6q-sabresd. Signed-off-by:
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Fabio Estevam authored
Do not hardcode the local mac address. Let bootloader retrieve it. Signed-off-by:
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Shawn Guo authored
It has been pointed out by device tree maintainer for several times that the generic names 'serial' and 'ethernet' should be used for those devices per ePAPR. Renames imx uart and fec device tree nodes to stop them being bad examples. Signed-off-by:
Sascha Hauer <s.hauer@pengutronix.de>
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Fabio Estevam authored
Remove bootargs field as this information is retrieved from the bootloader. Signed-off-by:
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Ying-Chun Liu (PaulLiu) authored
Add anatop regulators to imx6q.dtsi for all imx6q platforms. Signed-off-by:
Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org> Signed-off-by:
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- 09 May, 2012 4 commits
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Sascha Hauer authored
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Shawn Guo authored
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Philipp Zabel <p.zabel@pengutronix.de>
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Sascha Hauer authored
This patch also adds the SPDIF baud clock mux and dividers. Signed-off-by:
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Sascha Hauer authored
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- 02 May, 2012 11 commits
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Sascha Hauer authored
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Sascha Hauer authored
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Sascha Hauer authored
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Sascha Hauer authored
This also changes the DMA clkdev lookup to use the imx-dma driver name and "ahb" as connection ID to request the hclk dma clock. Signed-off-by:
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Sascha Hauer authored
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Shawn Guo authored
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Shawn Guo authored
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Sascha Hauer authored
This gate consists of two bits: 0b00: clk disabled 0b01: clk enabled in run mode and disabled in sleep mode 0b11: clk enabled Currently only disabled and enabled are supported. As it's unlikely that we find something like this in another SoC create a i.MX specific clk helper for this. Signed-off-by: -
Shawn Guo authored
This PLL is found on i.MX6 SoCs Signed-off-by: -
Sascha Hauer authored
This PLL is found on i.MX51 and i.MX53 Signed-off-by: -
Sascha Hauer authored
The pllv1 is found on i.MX1, i.M25, i.MX27, i.MX31 and i.MX35. Currently only reading the rate is supported. Signed-off-by:
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- 25 Apr, 2012 8 commits
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Sascha Hauer authored
- Add necessary #ifdefs for CONFIG_COMMON_CLOCK - Add a global spinlock to protect the CCM registers Signed-off-by: -
Sascha Hauer authored
Instead of having a cpu_is_* in each ccm register access it is more efficient to make it a variable. Signed-off-by: -
Sascha Hauer authored
We used to pass the timer clock directly to mxc_timer_init. We should instead request the correct clock. This is an intermediate step: For now we request the clock in the timer code when NULL is passed as clock. Also, the gpt on some i.MX have an additional ipg clock which can be gated. Request and enable this. Signed-off-by: -
Sascha Hauer authored
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Sascha Hauer authored
prepare the clock before enabling it. Signed-off-by: -
Sascha Hauer authored
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Sascha Hauer authored
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Sascha Hauer authored
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