- 29 Jun, 2016 12 commits
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Javier Martinez Canillas authored
This patch fixes the following DTC warnings for omap3-overo-gallop43.dtb, omap3-overo-chestnut43.dtb, omap3-overo-storm-chestnut43.dtb, omap3-overo-palo43.dtb, and omap3-overo-storm-palo43.dtb: "display@0 has a unit name, but no reg property" Signed-off-by:
Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by:
Tony Lindgren <tony@atomide.com>
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Javier Martinez Canillas authored
This patch fixes the following DTC warnings for omap3-ha-lcd.dtb: "display@0 has a unit name, but no reg property" Signed-off-by:
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Javier Martinez Canillas authored
This patch fixes the following DTC warnings for omap3-gta04a3.dtb, omap3-gta04a4.dtb and omap3-gta04a5.dtb: "dmtimer-pwm@11 has a unit name, but no reg property" "connector@1 has a unit name, but no reg property" "endpoint@0 has a unit name, but no reg property" Signed-off-by:
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Javier Martinez Canillas authored
This patch fixes the following DTC warnings for omap3-devkit8000-lcd43.dtb and omap3-devkit8000-lcd70.dtb: "display@0 has a unit name, but no reg property" Signed-off-by:
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Javier Martinez Canillas authored
This patch fixes the following DTC warnings for omap3-devkit8000.dtb, omap3-devkit8000-lcd43.dtb and omap3-devkit8000-lcd70.dtb: "encoder@0 has a unit name, but no reg property" "endpoint@0 has a unit name, but no reg property" "connector@0 has a unit name, but no reg property" "connector@1 has a unit name, but no reg property" Signed-off-by:
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Javier Martinez Canillas authored
This patch fixes the following DTC warnings for omap3-cm-t3517.dtb, omap3-cm-t3530.dtb and omap3-cm-t3730.dtb: "connector@1 has a unit name, but no reg property" Signed-off-by:
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Javier Martinez Canillas authored
This patch fixes the following DTC warnings for omap3-beagle-xm.dtb: "encoder@0 has a unit name, but no reg property" "encoder@0/ports/port@0/endpoint@0 has a unit name, but no reg property" "encoder@0/ports/port@1/endpoint@0 has a unit name, but no reg property" "connector@0 has a unit name, but no reg property" "connector@1 has a unit name, but no reg property" Signed-off-by:
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Javier Martinez Canillas authored
This patch fixes the following DTC warnings for omap3-beagle.dtb: "encoder@0 has a unit name, but no reg property" "encoder@0/ports/port@0/endpoint@0 has a unit name, but no reg property" "encoder@0/ports/port@1/endpoint@0 has a unit name, but no reg property" "connector@0 has a unit name, but no reg property" "connector@1 has a unit name, but no reg property" Signed-off-by:
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Javier Martinez Canillas authored
This patch fixes the following DTC warnings for omap3-n900.dtb: "dmtimer-pwm@9 has a unit name, but no reg property" Signed-off-by:
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Javier Martinez Canillas authored
This patch fixes the following DTC warnings: "dmtimer-pwm@10 has a unit name, but no reg property" "display@0 has a unit name, but no reg property" Signed-off-by:
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Javier Martinez Canillas authored
This patch fixes the following DTC warnings for am3517-craneboard.dtb: "fixedregulator@0 has a unit name, but no reg property" Signed-off-by:
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Javier Martinez Canillas authored
This patch fixes the following DTC warnings for omap2430-sdp.dtb: "func_96m_ck has a reg or ranges property, but no unit name" Signed-off-by:
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- 22 Jun, 2016 6 commits
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Lokesh Vutla authored
Adding DT node for hardware random number generator. Signed-off-by:
Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by:
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Lokesh Vutla authored
Add clk node for RNG module. Signed-off-by:
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Lokesh Vutla authored
Adding dt node for hardware random number generator IP. Signed-off-by:
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Lokesh Vutla authored
DRA7 SoC has the same SHA IP as OMAP5. Add DT entry for the same. Signed-off-by:
Tero Kristo <t-kristo@ti.com> Signed-off-by:
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Joel Fernandes authored
DRA7 SoC has the same AES IP as OMAP4. Add DT entries for both AES cores. Signed-off-by:
Joel Fernandes <joelf@ti.com> Signed-off-by:
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Joel Fernandes authored
DRA7xx SoCs have a DES3DES IP. Add DT data for the same. Signed-off-by:
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- 21 Jun, 2016 1 commit
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Enric Balletbo i Serra authored
This commit adds the stdout-path propety in /chosen for all Beaglebone boards. Signed-off-by:
Enric Balletbo i Serra <enric.balletbo@collabora.com> Signed-off-by:
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- 10 Jun, 2016 21 commits
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Kishon Vijay Abraham I authored
The unit address of the second PCIe instance is set to be same as that of the first instance (copy-paste error). Fix it. Signed-off-by:
Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by:
Sekhar Nori <nsekhar@ti.com> Signed-off-by:
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H. Nikolaus Schaller authored
Define RFID eeprom node which is present on gta04 device. Signed-off-by:
H. Nikolaus Schaller <hns@goldelico.com> Signed-off-by:
Marek Belisko <marek@goldelico.com> Signed-off-by:
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Peter Ujfalusi authored
The twl6040 codec is generating the pdmclk, which is used by the McPDM as functional clock. Signed-off-by:
Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by:
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Peter Ujfalusi authored
The twl6040 codec is generating the pdmclk, which is used by the McPDM as functional clock. Signed-off-by:
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Peter Ujfalusi authored
The twl6040 codec is generating the pdmclk, which is used by the McPDM as functional clock. Signed-off-by:
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Peter Ujfalusi authored
The twl6040 codec is generating the pdmclk, which is used by the McPDM as functional clock. Signed-off-by:
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Peter Ujfalusi authored
The twl6040 codec is generating the pdmclk, which is used by the McPDM as functional clock. Signed-off-by:
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Peter Ujfalusi authored
Add clock properties to the McBSP nodes. McBSP2 and 3 need to have ick also since the Sidetone block of these modules are operating using the McBSP interface clock. Signed-off-by:
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Andrew F. Davis authored
Currently am33xx.dtsi declares the MAC controller to have two slave ports, on these boards we only use one, so set the slave count to one. This eliminates a console error message when the non-existent PHY is not detected. Signed-off-by:
Andrew F. Davis <afd@ti.com> Reviewed-by:
Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by:
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Andrew F. Davis authored
Currently am4372.dtsi declares the MAC controller to have two slave ports, on this board we only use one, so set the slave count to one. This eliminates a console error message when the non-existent PHY is not detected. Signed-off-by:
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Robert P. J. Day authored
Correct misspelling, "emda3" -> "edma3". Reported-by:
Adam J Allison <adamj.allison@gmail.com> Signed-off-by:
Robert P. J. Day <rpjday@crashcourse.ca> Acked-by:
Rob Herring <robh@kernel.org> Acked-by:
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Misael Lopez Cruz authored
Rename the tag of the 3.3 V regulator used in the DRA72 EVM in order to have a consistent tag name with the DRA7 EVM. This is useful when the regulator needs to be referenced in common dtsi files (i.e. for common companion boards like JAMR3 [1]). [1] http://www.ti.com.cn/cn/lit/ug/sprui52/sprui52.pdfSigned-off-by:
Misael Lopez Cruz <misael.lopez@ti.com> Signed-off-by:
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Vignesh R authored
AM335x ICE board has a TI PCA9536 chip connected to I2C0 at address 0x41. Add DT entry for the same. Signed-off-by:
Vignesh R <vigneshr@ti.com> Acked-by:
Kristofer Martinez <Kristofer.S.Martinez@gmail.com> Acked-by:
Linus Walleij <linus.walleij@linaro.org> Signed-off-by:
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Dave Gerlach authored
Add an operating-points-v2 table with all OPPs available for all silicon revisions along with necessary data for use by ti-opp driver to selectively enable the appropriate OPPs at runtime and handle voltage transitions As we now need to define voltage ranges for each OPP, we define the minimum and maximum voltage to match the ranges possible for AVS class0 voltage as defined by the DRA7/AM57 Data Manual, with the exception of using a range for OPP_OD based on historical data to ensure that SoCs from older lots still continue to boot, even though more optimal voltages are now the standard. Once an AVS Class0 driver is in place it will be possible for these OPP voltages to be adjusted to any voltage within the provided range. Information from SPRS953, Revised December 2015. Signed-off-by:
Dave Gerlach <d-gerlach@ti.com> Acked-by:
Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by:
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Dave Gerlach authored
Nearly all of the information in the cpus node, especially for cpu0, is the same between dra74x and dra72x so move the common information to the parent dra7.dtsi to avoid duplication of data. Signed-off-by:
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Dave Gerlach authored
Create a system control module node for the control module portion that resides under l4_wkup. Signed-off-by:
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Dave Gerlach authored
Hook dcdc2 as the cpu0-supply. Signed-off-by:
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Dave Gerlach authored
Add an operating-points-v2 table with all OPPs available for all silicon revisions along with necessary data for use by ti-cpufreq to selectively enable the appropriate OPPs at runtime. Information from AM437x Data Manual, SPRS851B, Revised April 2015, Table 5-2. Signed-off-by:
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Dave Gerlach authored
Although all PG2.0 silicon may not support 1GHz OPP for the MPU, older Beaglebone Blacks may have PG2.0 silicon populated and these particular parts are guaranteed to support the OPP, so enable it for PG2.0 on am335x-boneblack only. Signed-off-by:
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Dave Gerlach authored
Drop the operating-points table present in am33xx.dtsi and add an operating-points-v2 table with all OPPs available for all silicon revisions along with necessary data for use by ti-cpufreq to selectively enable the appropriate OPPs at runtime. Also, drop the voltage-tolerance value and provide voltages for each OPP using the <target min max> format instead. Information from AM335x Data Manual, SPRS717i, Revised December 2015, Table 5-7. Signed-off-by:
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Dave Gerlach authored
Now that we are moving to OPPv2 bindings and able to add 1GHz OPP for MPU, let's update the max MPU voltage range to align with the maximum possible value allowed in the operating-points table, which is max target voltage of 132500 uV + 2%. Signed-off-by:
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