- 06 Feb, 2015 5 commits
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Sujith Manoharan authored
This patch addresses several issues with the ath9k_hw_wow_enable() routine: * The usage of set/clr variables is removed. Writing the required values to registers is cleaner. * The shift value of 28 for the contention window field in AR_WOW_PATTERN is incorrect, change it to 27. * Disabling Keep Alive needs to be done based on the LINK_CHANGE option. This is done unconditionally now, fix this. * The workaround for the D1/D3 issue is required only for AR9462. * The bitfield for enabling pattern matching for packets less than 256 bytes has expanded for new chips, handle this accordingly. * General cleanup. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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Sujith Manoharan authored
Since the number of user patterns is higher for newer chips, make sure that this is registered during initialization. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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Sujith Manoharan authored
Newer chips like WB222, WB335 support more than 8 user-configurable patterns. This patch adds support for it by setting up the correct HW registers. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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Larry Finger authored
This driver utilizes a FIFO buffer for RX descriptors. There are four places in the code where it calculates the number of free slots. Several of those locations do the calculation incorrectly. To fix these and to prevent future mistakes, a common inline routine is created. Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net> Cc: Stable <stable@vger.kernel.org> [V3.18] Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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Troy Tan authored
The hardware and firmware for the RTL8192EE utilize a FIFO list of descriptors. There were some problems with the initial implementation. The worst of these failed to detect that the FIFO was becoming full, which led to the device needing to be power cycled. As this condition is not relevant to most of the devices supported by rtlwifi, a callback routine was added to detect this situation. This patch implements the necessary changes in the pci handler, and the linkage into the appropriate rtl8192ee routine. Signed-off-by: Troy Tan <troy_tan@realsil.com.cn> Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net> Cc: Stable <stable@vger.kernel.org> [V3.18] Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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- 03 Feb, 2015 31 commits
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Hamad Kadmany authored
Current implementation depends on msm-bus driver which is not merged into mainline kernel therefore this code is removed Signed-off-by: Hamad Kadmany <qca_hkadmany@qca.qualcomm.com> Signed-off-by: Vladimir Kondratiev <qca_vkondrat@qca.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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Vladimir Kondratiev authored
Print (at debug level) all cipher and AKM suites Signed-off-by: Vladimir Kondratiev <qca_vkondrat@qca.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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Vladimir Kondratiev authored
Print Tx descriptors Print ring index for all Tx related messages Sort prefixes: Tx for transmit, TxC for completion, added "D" for descriptor related prints Signed-off-by: Vladimir Kondratiev <qca_vkondrat@qca.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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Vladimir Kondratiev authored
Use spinlock, this should not impact Tx as lock is always free except for de-allocation. Signed-off-by: Vladimir Kondratiev <qca_vkondrat@qca.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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Vladimir Kondratiev authored
Non-cacheable Tx descriptor for the last fragment of multi-fragment frame used to be written back twice. Refactor code to always write non-cacheable descriptor only once Signed-off-by: Vladimir Kondratiev <qca_vkondrat@qca.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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Vladimir Kondratiev authored
In the Tx, work around used to force destination index 0 to be used. This is no more necessary, as firmware supports multiple destinations Signed-off-by: Vladimir Kondratiev <qca_vkondrat@qca.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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Sujith Manoharan authored
Since the maximum number of configurable patterns is chip-specific, use the HW capability instead of a fixed value for checking if a free pattern slot is available. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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Sujith Manoharan authored
* Remove unnecessary comments. * Remove unused macros. * Indent the macros. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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Sujith Manoharan authored
These macros are applicable to pre-AR9003 chips and the addresses are different for the AR9003 family. Since they are unused anyway, remove them. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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Sujith Manoharan authored
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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Sujith Manoharan authored
Since the number of patterns that can be configured in the HW is higher for newer chips, store the chip-specific value in ath9k_hw_wow. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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Sujith Manoharan authored
This can be used to hold the WOW state in ath9k_hw. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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Sujith Manoharan authored
There is no need to allocate a new structure and free it for every user pattern, instead use local variables. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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Sujith Manoharan authored
This can be used to force WOW for cards that are not present in the supported PCI ID list. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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Sujith Manoharan authored
Printing the value of the wakeup status is sufficient. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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Sujith Manoharan authored
The various variables tracking bmiss interrupts are not really used anywhere except in a debug message. Remove them since they have no functional purpose. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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Sujith Manoharan authored
This patch makes sure that valid WOW triggers are present before trying to suspend the device. Also, introduce and use ATH_OP_WOW_ENABLED to bypass PCI suspend and clear it in resume(). Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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Sujith Manoharan authored
Registering the card as a wakeup source needs to be done once, during initialization. When the WOW configuration changes, the card's status as wakeup source needs to be changed too and this is done via the set_wakeup() callback. Also, make sure the device is removed properly using ath9k_deinit_wow(). Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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Sujith Manoharan authored
If CONFIG_ATH9K_CHANNEL_CONTEXT is enabled, check whether multiple contexts are active and if so, return 1 without enabling WOW since we don't support it in this case. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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Sujith Manoharan authored
If multiple interfaces are active or there is no associated station interface, bail out early and return 1 so that mac80211 can proceed with the normal suspend routine. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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Sujith Manoharan authored
WOW capability is registered with mac80211 only when the device has the ability to wakeup, so there is no need to check in the suspend() routine. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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Sujith Manoharan authored
Do not try to cancel work instances and ANI when the device is not present or WOW triggers are not configured. Bail out early and use ath_err() for such error conditions. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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Sujith Manoharan authored
Enabling WOW based on the chip is incorrect since it needs to be done for specific sub-devices which have proper platform support. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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Amitkumar Karwar authored
When AP is started, firmware exits power save mode. This means power save manager of AP takes priority over station. Firmware stop sending periodic AWAKE events to host. We may have UAPSD enabled on station which buffers data packets until AWAKE event from firmware. Data path is unnecessarily blocked in this case. This patch disables UAPSD mode to reenable transmit data path. Signed-off-by: Amitkumar Karwar <akarwar@marvell.com> Signed-off-by: Cathy Luo <cluo@marvell.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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Amitkumar Karwar authored
This patch makes sure that skb is freed after downloading NULL packet in error cases. Also, USB chipsets return -EINPROGRESS after downloading packets, they are freed in USB completion handler later. We will add missing change to set tx_lock_flag for USB which blocks further packets. Signed-off-by: Amitkumar Karwar <akarwar@marvell.com> Signed-off-by: Cathy Luo <cluo@marvell.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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Amitkumar Karwar authored
Memory is leaked after downloading already processed packet. This patch fixes the problem by freeing returned skb. Other transmit paths don't have this problem. Signed-off-by: Amitkumar Karwar <akarwar@marvell.com> Signed-off-by: Cathy Luo <cluo@marvell.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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Amitkumar Karwar authored
Wakeup timer is in sync with 'pm_wakeup_fw_try' flag. It has been started instead of cancelling at one place. This patch corrects it. Signed-off-by: Amitkumar Karwar <akarwar@marvell.com> Signed-off-by: Cathy Luo <cluo@marvell.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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Troy Tan authored
There are instances where the DMA engine stalls. The new code detects such stalls and restarts DMA without needing a power reset. Signed-off-by: Troy Tan <troy_tan@realsil.com.cn> Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net> Cc: Stable <stable@vger.kernel.org> [3.18] Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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Troy Tan authored
The firmware supplies two kinds of packets via the RX mechanism. Besides the normal data received over the air, these packets may contain bluetooth status and other information. The present code fails to detect which kind of information was received. Signed-off-by: Troy Tan <troy_tan@realsil.com.cn> Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net> Cc: Stable <stable@vger.kernel.org> [V3.18] Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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Troy Tan authored
Initially, the routine to update the write point in the FIFO buffer was coded to save CPU time by not doing the calculation every interrupt. This was an error and results in TX hangs. Signed-off-by: Troy Tan <troy_tan@realsil.com.cn> Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net> Cc: Stable <stable@vger.kernel.org> [V3.18] Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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Troy Tan authored
When the buffer descriptor index exceeds 2, then a TX HANG condition will result. Signed-off-by: Troy Tan <troy_tan@realsil.com.cn> Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net> Cc: Stable <stable@vger.kernel.org> [V3.18] Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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- 29 Jan, 2015 4 commits
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Rafał Miłecki authored
There are new (not anymore?) Broadcom 802.11ac wireless cards based on chipsets like BCM4352 and BCM4360. They use a new PHY type (called simply AC) that will require new specific code. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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Rafał Miłecki authored
AC-PHY hardware includes new control 0x3 bits that need to be set to the 0x1 by default. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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Rafał Miłecki authored
This is stil incomplete, so we don't add PCI IDs of new devices yet. Purpose of this patch is to allow testing & adjusting rest of the code. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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Rafał Miłecki authored
There are some PCIe core fixes that need to be applied before accessing SPROM, otherwise reading it may fail. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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