- 16 Mar, 2015 6 commits
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Alexandre Belloni authored
Use clocksource_of_init to initialize the system timer instead of relying on a custom function. Signed-off-by:
Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by:
Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by:
Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by:
Nicolas Ferre <nicolas.ferre@atmel.com>
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Alexandre Belloni authored
Now that a proper driver is available, remove at91rm9200_restart. Signed-off-by:
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Alexandre Belloni authored
Restarting the at91rm9200 is done through programming the watchdog and waiting for it to reset. Signed-off-by:
Guenter Roeck <linux@roeck-us.net> Signed-off-by:
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Alexandre Belloni authored
Use a syscon regmap to access the system timer registers. Also, rename the driver atmel_st_watchdog to stop conflicting with at91sam9_wdt.c Signed-off-by:
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Alexandre Belloni authored
AT91RM920 has a memory range reserved for timer and watchdog configuration. Expose those registers so that drivers can make use of the system timer syscon declared in at91 DTs. Signed-off-by:
Lee Jones <lee.jones@linaro.org> Signed-off-by:
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Alexandre Belloni authored
The system timer register range is used to handle three different functionalities: Periodic Interval Timer, Real Time Timer and watchdog. Declare it as a syscon to be able to get a regmap. Also declare it as a simple-mfd and its watchdog subnode. Finally, document the watchdog compatible string. Signed-off-by:
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- 13 Mar, 2015 22 commits
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Alexandre Belloni authored
The old setup is not used anymore, remove it Signed-off-by:
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Alexandre Belloni authored
All the peripheral remapped at io_map are taken care of by their respective drivers. Signed-off-by:
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Alexandre Belloni authored
Use the soc detection infrastructure for sama5 initialization. Signed-off-by:
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Alexandre Belloni authored
Use the soc detection infrastructure for at91sam9 initialization. Signed-off-by:
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Alexandre Belloni authored
Use the soc detection infrastructure for at91rm9200 initialization. Signed-off-by:
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Boris BREZILLON authored
Add new structures and functions to handle AT91 SoC detection. [alexandre.belloni@free-electrons.com: reworked DBGU detection] Signed-off-by:
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Alexandre Belloni authored
The DBGU is not a simple UART and we need to be able to distinguish it from the other UARTs, in particular to get its address and check the chip id. Signed-off-by:
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Alexandre Belloni authored
The matrix headers are not used anymore, remove them. Signed-off-by:
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Alexandre Belloni authored
at91_ioremap_matrix and the at91_matrix.h header are not used anymore, remove them. Signed-off-by:
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Arnd Bergmann authored
The mach/io.h header on at91 is used to support a nonstandard I/O space window for the cf card driver. This changes the driver to use pci_ioremap_io in order to have the standard location, and then removes the custom mach/io.h. [alexandre.belloni@free-electrons.com: Added PCI dependency] Signed-off-by:
Arnd Bergmann <arnd@arndb.de> Signed-off-by:
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Wenyou Yang authored
Flush data cache, and clean, invalidate and disable the L2 cache before going to suspend. Restore the L2 cache configuration and re-enable the L2 cache after waking up. Signed-off-by:
Wenyou Yang <wenyou.yang@atmel.com> Acked-by:
Sylvain Rochet <sylvain.rochet@finsecur.com> Signed-off-by:
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Wenyou Yang authored
Add the WFI instruction to make the cpu to the idle state. In the meanwhile, disable the processor's clock. Signed-off-by:
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Wenyou Yang authored
Because the standby mode use the same sram function as the suspend to memory mode, void (*at91_pm_standby)(void) doesn't need, remove it. Signed-off-by:
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Wenyou Yang authored
As the file name is renamed, rename the function name at91_slow_clock() --> at91_pm_suspend_sram_fn(), rename the function handler's name at the same time. Signed-off-by:
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Wenyou Yang authored
Because the sram function is used for both suspend to memory and the suspend to standby mode, renaming is more elegant. Signed-off-by:
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Wenyou Yang authored
To simply the PM code, the suspend to standby mode uses same sram function as the suspend to memory mode, running in the internal SRAM, instead of the respective code for each mode. For the suspend to standby mode, the master clock doesn't switch to the slow clock, and PLLA and the main oscillator doesn't turn off as well. Signed-off-by:
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Wenyou Yang authored
To decrease the suspend time, move copying the sram function to the sram initialization phase, instead of every time go to suspend. In the meanwhile, substitute fncpy() for memcpy(). If there is no sram allocated for PM, the PM is not supported. Signed-off-by:
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Wenyou Yang authored
To decrease the duplicated code, create the procedure to contain both activing and exiting the sdram self-refresh mode. Signed-off-by:
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Sylvain Rochet authored
Assume USB PLL and PLL B are already stopped before entering sleep mode. Removed PLL B from slow clock code, all drivers are supposed to properly unprepare clocks. Signed-off-by:
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Wenyou Yang authored
The slow clock always exists, selecting CONFIG_AT91_SLOW_CLOCK config is unnecessary for the suspend to memory mode. For this mode the master clock should always switch to the slow clock. Signed-off-by:
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Wenyou Yang authored
To simply the PM config the CONFIG_AT91_SLOW_CLOCK option will be removed, so move "select SRAM" from under AT91_SLOW_CLOCK, add "select SRAM if PM" under SOC_AT91SAM9 and SOC_SAMA5 Signed-off-by:
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Wenyou Yang authored
The SLOWDOWN_MASTER_CLOCK definition is not used, remove the redundant code. Signed-off-by:
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- 12 Mar, 2015 5 commits
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Wenyou Yang authored
Since at91_pm_set_standby() will not be used out of the pm.c file, change its attribute from extern to static, remove its declaration as well. Signed-off-by:
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Boris Brezillon authored
Commit 2b0ba96c ("net: phy: micrel: disable NAND-tree for KSZ8021, KSZ8031, KSZ8051, KSZ8081") automated the NAND-tree mode deactivation process, thus making this phy fixup useless. Remove it along with the associated headers inclusion. Signed-off-by:
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Nicolas Ferre authored
Third fixes batch for AT91 on 4.0: - clock fixes for USB - compatible string changes for handling USB IP differences (+ needed AHB matrix syscon) - fix of a compilation error in PM code
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Nicolas Ferre authored
Second fixes batch for AT91 on 4.0: - little fix for !MMU debug: may also help for randconfig - fix of 2 errors in LCD clock definitions - in PM code, not writing the key leads to not execute the action
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Nicolas Ferre authored
First fixes batch for AT91 on 4.0: - PM slowclock fixes for DDR and timeouts - fix some DT entries - little defconfig updates - the removal of a harmful watchdog option + its detailed documentation
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- 11 Mar, 2015 4 commits
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Wenyou Yang authored
When compiling the kernel in thumb2 (CONFIG_THUMB2_KERNEL option activated), we hit a compilation crash. The error message is listed below: ---8< ----- Error: cannot use register index with PC-relative addressing -- `str r0,.saved_lpr' --->8---- Add the .arm directive in the assembly files related to power management. Signed-off-by:
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Nicolas Ferre authored
The UTMI clock must be selected by any high-speed USB IP. The logic behind it needs this particular clock. So, correct the clock in the device tree files affected. Reported-by:
Bo Shen <voice.shen@atmel.com> Signed-off-by:
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Boris Brezillon authored
The at91rm9200, at91sam9260, at91sam9261 and at91sam9263 SoCs have slightly different UDC IPs. Those differences were previously handled with cpu_is_at91xx macro which are about to be dropped for multi-platform support, thus we need to change compatible strings. Signed-off-by:
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Boris Brezillon authored
There is no specific driver handling the AHB matrix, this is a simple syscon device. the matrix is needed by several other drivers including the USB on some SoCs (at91sam9261 for instance). Without this definition, the USB will not work on these SoCs. Signed-off-by:
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- 09 Mar, 2015 1 commit
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Boris Brezillon authored
Peripheral clock is named pclk and system clock is named hclk (those are the names expected by the at91_udc driver). Drop the deprecated usb_clk (formerly used to configure the usb clock rate which is now directly configurable through hclk). Signed-off-by:
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- 05 Mar, 2015 2 commits
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Patrice Vilchez authored
Because writing the MOR register requires the PASSWD(0x37), if missed, the write operation will be aborted. Signed-off-by:
Patrice Vilchez <patrice.vilchez@atmel.com> Acked-by:
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Boris BREZILLON authored
lcdck takes mck (not smd) as its parent. It is also assigned id 3 and not 4. Signed-off-by:
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