- 29 Jun, 2019 15 commits
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Dan Carpenter authored
These pointers are an offset into the "sta" struct. They're assigned like this: const struct ieee80211_sta_vht_cap *vht_cap = &sta->vht_cap; They're not the first member of the struct (->supp_rates[] is first) so they can't be NULL. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
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Gustavo A. R. Silva authored
Make use of the struct_size() helper instead of an open-coded version in order to avoid any potential type mistakes, in particular in the context in which this code is being used. So, change the following form: sizeof(*pattern_cmd) + wowlan->n_patterns * sizeof(struct iwlagn_wowlan_pattern) to : struct_size(pattern_cmd, patterns, wowlan->n_patterns) This code was detected with the help of Coccinelle. Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
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Gustavo A. R. Silva authored
Make use of the struct_size() helper instead of an open-coded version in order to avoid any potential type mistakes, in particular in the context in which this code is being used. So, change the following form: sizeof(*pattern_cmd) + wowlan->n_patterns * sizeof(struct iwlagn_wowlan_pattern) to : struct_size(pattern_cmd, patterns, wowlan->n_patterns) This code was detected with the help of Coccinelle. Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
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Shahar S Matityahu authored
Support adaptive dwell high band default number of APs new api. Signed-off-by: Shahar S Matityahu <shahar.s.matityahu@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
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Mordechay Goodstein authored
Now that we have per station control over amsdu size no need for multiple entries, especially that the old one is misleading due to not setting it for all protocols as a limit. Signed-off-by: Mordechay Goodstein <mordechay.goodstein@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
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Shahar S Matityahu authored
The info struct contains data about the FW, HW, RF and the debug configuration. Signed-off-by: Shahar S Matityahu <shahar.s.matityahu@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
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Mordechay Goodstein authored
The current debugfs entry only limits the max AMSDU for TCP. Add a new debugfs entry to allow setting a fixed AMSDU size for all TX packets, including UDP and ICMP Signed-off-by: Mordechay Goodstein <mordechay.goodstein@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
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Shahar S Matityahu authored
Add support to debug info TLV. The TLV contains human readable naming of the FW image and the debug configuration. Signed-off-by: Shahar S Matityahu <shahar.s.matityahu@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
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Shahar S Matityahu authored
Use a different barker for ini dump to allow differentiation from legacy dump. Also it allows to remove INI_BIT from dump TLVs. Signed-off-by: Shahar S Matityahu <shahar.s.matityahu@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
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Shahar S Matityahu authored
When a dump trigger is fired, the driver sets IWL_FWRT_STATUS_DUMPING and aborts any consecutive dump collection. To allow consecutive triggers firing, use 5 dump workers and allocate them upon incoming dump collection requests. This functionality is needed since in ini debug mode each trigger may have entirely different memory regions to collect unlike the legacy mode in which all the triggers dump the same memory regions. Signed-off-by: Shahar S Matityahu <shahar.s.matityahu@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
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Shahar S Matityahu authored
Allows to abort region collection in case the region size is 0. It is needed for future regions that their size might be 0. Signed-off-by: Shahar S Matityahu <shahar.s.matityahu@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
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Johannes Berg authored
Update the CSI API to the new version supported by the firmware. Signed-off-by: Johannes Berg <johannes.berg@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
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Shahar S Matityahu authored
Unite dump memory ranges under a single struct and add a specific header for each type of memory. Also, maintain a single version to all dump structures. This cleanup is also needed for the future addition of FW notification regions and others. Signed-off-by: Shahar S Matityahu <shahar.s.matityahu@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
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Shahar S Matityahu authored
Improve the robustness of the dump collection flow in case of an early error: 1. in iwl_trans_pcie_sync_nmi, disable and enable interrupts only if they were already enabled 2. attempt to initiate dump collection in iwl_fw_dbg_error_collect only if the device is enabled 3. check Tx command queue was already allocated before trying to collect it Signed-off-by: Shahar S Matityahu <shahar.s.matityahu@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
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Jiri Kosina authored
As iwl_mvm_tx_mpdu() is not disabling BH while obtaining iwl_mvm_sta->lock (which is being taken from BH context as well), it has to be always invoked with BH disabled. Make that clear in a comment. Signed-off-by: Jiri Kosina <jkosina@suse.cz> Signed-off-by: Johannes Berg <johannes.berg@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
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- 27 Jun, 2019 16 commits
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Zong-Zhe Yang authored
Add a structure for power parameters including base, offset, limit and a function to get tx power parameters. Then, refine flow to get tx power index through the function. Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com> Signed-off-by: Yan-Hsuan Chuang <yhchuang@realtek.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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Tzu-En Huang authored
Since this macro definition has different values in different chipset, the current defined macro value is for 8822b. This will cause the settings of 8822c be incorrect. Remove RTW_MAX_POWER_INDEX and use max_power_index in struct rtw_chip_info to make sure the value of different chipset is right. Signed-off-by: Tzu-En Huang <tehuang@realtek.com> Signed-off-by: Yan-Hsuan Chuang <yhchuang@realtek.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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Zong-Zhe Yang authored
Support more regulatory domains including IC, KCC, ACMA, CHILE, UKRAINE, and MEXICO. Corresponding tx power limits for these regulatory domains are added in tx power limit table. Besides, tx power limits in some case are also updated to follow RF v20 for better tx power indexes. Channel plan mapping table are upgraded to consider more 2G and 5G channel plans combination cases. It allow us to identify different situations more accuratly by channel plan IDs. In addition, mapping table for country code and channel plan ID and mapping table for country code and tx power limit are also updated to follow RF v20. It allow the new enrties in tx power limit table to be applied correctly. Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com> Signed-off-by: Yan-Hsuan Chuang <yhchuang@realtek.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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Zong-Zhe Yang authored
If phy rate is decreased, sub bandwidth may be chosen by RA. We consider possible power limits and apply the min one; otherwise, the tx power index may be larger than spec. And we cross-reference power limits of vht and ht with 20/40M bandwidth in 5G to avoid values are not assigned. Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com> Signed-off-by: Yan-Hsuan Chuang <yhchuang@realtek.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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Yan-Hsuan Chuang authored
When we are loading tx power limit from the power limit table, compare the world-wide limit with the current limit and choose the lowest power limit for the world-wide power settings. Signed-off-by: Yan-Hsuan Chuang <yhchuang@realtek.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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Yan-Hsuan Chuang authored
Tx power limit is stored separately by 2G and 5G. But driver did not get tx power limit from 5G and causes incorrect tx power. Check if the channel is beyond 2G and get the corresponding tx power limit. Signed-off-by: Yan-Hsuan Chuang <yhchuang@realtek.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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Yan-Hsuan Chuang authored
The orig variable is taken but not used, remove it Signed-off-by: Yan-Hsuan Chuang <yhchuang@realtek.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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Yan-Hsuan Chuang authored
Rename the function names to make them have the same prefix "rtw_phy" for the tx power setting routines. Only the function names and corresponding identation are modified. Signed-off-by: Yan-Hsuan Chuang <yhchuang@realtek.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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Yan-Hsuan Chuang authored
The type change from (void *) to (struct rtw_dev *) is redundant. Just pass the right type and compiler can check that for us. Signed-off-by: Yan-Hsuan Chuang <yhchuang@realtek.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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Yan-Hsuan Chuang authored
Some functions that should be static are unnecessarily exposed, remove their declaration in header file phy.h. After resolving their declaration order, they can be declared as static. So this commit changes nothing except the order and marking them static. Signed-off-by: Yan-Hsuan Chuang <yhchuang@realtek.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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Brian Norris authored
main_proc_lock and int_lock (in mwifiex_adapter) are the only spinlocks used in hardirq contexts. The rest are only in task or softirq contexts. Convert every other lock from *_irq{save,restore}() variants to _bh() variants. This is a mechanical transformation of all spinlock usage in mwifiex using the following: Step 1: I ran this nasty sed script: sed -i -E '/spin_lock_irqsave|spin_unlock_irqrestore/ { /main_proc_lock|int_lock/! { s:(spin_(un|)lock)_irq(save|restore):\1_bh: ; # Join broken lines. :a /;$/! { N; s/\s*\n\s*//; ba } /,.*\);$/ s:,.*\):\): } }' drivers/net/wireless/marvell/mwifiex/* Step 2: Manually delete the flags / ra_list_flags args from: mwifiex_send_single_packet() mwifiex_11n_aggregate_pkt() mwifiex_send_processed_packet() which are now unused. Step 3: Apply this semantic patch (coccinelle) to remove the unused 'flags' variables: // <smpl> @@ type T; identifier i; @@ ( extern T i; | - T i; ... when != i ) // </smpl> (Usage is something like this: make coccicheck COCCI=./patch.cocci MODE=patch M=drivers/net/wireless/marvell/mwifiex/ although this skips *.h files for some reasons, so I had to massage stuff.) Testing: I've played with a variety of stress tests, including download stress tests on the same APs which caught regressions with commit 5188d545 ("mwifiex: restructure rx_reorder_tbl_lock usage"). I've primarily tested on Marvell 8997 / PCIe, although I've given 8897 / SDIO a quick spin as well. Signed-off-by: Brian Norris <briannorris@chromium.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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Brian Norris authored
mwifiex_11n_scan_and_dispatch() and mwifiex_11n_dispatch_pkt_until_start_win() share similar patterns, where they perform a few different actions on the same table, using the same lock, but non-atomically. There have been other attempts to clean up this sort of behavior, but they have had problems (incomplete; introducing new deadlocks). We can improve these functions' atomicity by queueing up our RX packets in a list, to dispatch at the end of the function. This avoids problems of another operation modifying the table in between our dispatch and rotation operations. This was inspired by investigations around this: http://lkml.kernel.org/linux-wireless/20181130175957.167031-1-briannorris@chromium.org Subject: [4.20 PATCH] Revert "mwifiex: restructure rx_reorder_tbl_lock usage" While the original (now-reverted) patch had good intentions in restructuring some of the locking patterns in this driver, it missed an important detail: we cannot defer to softirq contexts while already in an atomic context. We can help avoid this sort of problem by separating the two steps of: (1) iterating / clearing the mwifiex reordering table (2) dispatching received packets to upper layers This makes it much harder to make lock recursion mistakes, as these two steps no longer need to hold the same locks. Testing: I've played with a variety of stress tests, including download stress tests on the same APs which caught regressions with commit 5188d545 ("mwifiex: restructure rx_reorder_tbl_lock usage"). I've primarily tested on Marvell 8997 / PCIe, although I've given 8897 / SDIO a quick spin as well. Signed-off-by: Brian Norris <briannorris@chromium.org> Acked-by: Ganapathi Bhat <gbhat@marvell.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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Christoph Hellwig authored
Return the engine type from the function looking at the registers, and just derive the DMA mask from that in the one place we care. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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Christoph Hellwig authored
These days drivers are not required to fallback to smaller DMA masks, but can just set the largest mask they support, removing the need for this trial and error logic. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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Christoph Hellwig authored
Return the engine type from the function looking at the registers, and just derive the DMA mask from that in the one place we care. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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Christoph Hellwig authored
These days drivers are not required to fallback to smaller DMA masks, but can just set the largest mask they support, removing the need for this trial and error logic. Signed-off-by: Christoph Hellwig <hch@lst.de> Tested-by: Larry Finger <Larry.Finger@lwfinger.net> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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- 26 Jun, 2019 9 commits
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David S. Miller authored
Palmer Dabbelt says: ==================== net: macb: Fix compilation on systems without COMMON_CLK, v2 Our patch to add support for the FU540-C000 broke compilation on at least powerpc allyesconfig, which was found as part of the linux-next build regression tests. This must have somehow slipped through the cracks, as the patch has been reverted in linux-next for a while now. This patch applies on top of the offending commit, which is the only one I've even tried it on as I'm not sure how this subsystem makes it to Linus. This patch set fixes the issue by adding a dependency of COMMON_CLK to the MACB Kconfig entry, which avoids the build failure by disabling MACB on systems where it wouldn't compile. All known users of MACB have COMMON_CLK, so this shouldn't cause any issues. This is a significantly simpler approach than disabling just the FU540-C000 support. I've also included a second patch to indicate this is a driver for a Cadence device that was originally written by an engineer at Atmel. The only relation is that I stumbled across it when writing the first patch. Changes since v1 <20190624061603.1704-1-palmer@sifive.com>: * Disable MACB on systems without COMMON_CLK, instead of just disabling the FU540-C000 support on these systems. * Update the commit message to reflect the driver was written by Atmel. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
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Palmer Dabbelt authored
The help text makes it look like NET_VENDOR_CADENCE enables support for Atmel devices, when in reality it's a driver written by Atmel that supports Cadence devices. This may confuse users that have this device on a non-Atmel SoC. The fix is just s/Atmel/Cadence/, but I did go and re-wrap the Kconfig help text as that change caused it to go over 80 characters. Signed-off-by: Palmer Dabbelt <palmer@sifive.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Palmer Dabbelt authored
commit c218ad55 ("macb: Add support for SiFive FU540-C000") added a dependency on the common clock framework to the macb driver, but didn't express that dependency in Kconfig. As a result macb now fails to compile on systems without COMMON_CLK, which specifically causes a build failure on powerpc allyesconfig. This patch adds the dependency, which results in the macb driver no longer being selectable on systems without the common clock framework. All known systems that have this device already support the common clock framework, so this should not cause trouble for any uses. Supporting both the FU540-C000 and systems without COMMON_CLK is quite ugly. I've build tested this on powerpc allyesconfig and RISC-V defconfig (which selects MACB), but I have not even booted the resulting kernels. Fixes: c218ad55 ("macb: Add support for SiFive FU540-C000") Signed-off-by: Palmer Dabbelt <palmer@sifive.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Dave Taht authored
The longstanding prohibition against using 0.0.0.0/8 dates back to two issues with the early internet. There was an interoperability problem with BSD 4.2 in 1984, fixed in BSD 4.3 in 1986. BSD 4.2 has long since been retired. Secondly, addresses of the form 0.x.y.z were initially defined only as a source address in an ICMP datagram, indicating "node number x.y.z on this IPv4 network", by nodes that know their address on their local network, but do not yet know their network prefix, in RFC0792 (page 19). This usage of 0.x.y.z was later repealed in RFC1122 (section 3.2.2.7), because the original ICMP-based mechanism for learning the network prefix was unworkable on many networks such as Ethernet (which have longer addresses that would not fit into the 24 "node number" bits). Modern networks use reverse ARP (RFC0903) or BOOTP (RFC0951) or DHCP (RFC2131) to find their full 32-bit address and CIDR netmask (and other parameters such as default gateways). 0.x.y.z has had 16,777,215 addresses in 0.0.0.0/8 space left unused and reserved for future use, since 1989. This patch allows for these 16m new IPv4 addresses to appear within a box or on the wire. Layer 2 switches don't care. 0.0.0.0/32 is still prohibited, of course. Signed-off-by: Dave Taht <dave.taht@gmail.com> Signed-off-by: John Gilmore <gnu@toad.com> Acked-by: Toke Høiland-Jørgensen <toke@redhat.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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David Ahern authored
dst_default_metrics has all of the metrics initialized to 0, so nothing will be added to the skb in rtnetlink_put_metrics. Avoid the loop if metrics is from dst_default_metrics. Signed-off-by: David Ahern <dsahern@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
Puranjay Mohan says: ==================== net: fddi: skfp: Use PCI generic definitions instead of private duplicates This patch series removes the private duplicates of PCI definitions in favour of generic definitions defined in pci_regs.h. This driver only uses some of the generic PCI definitons, which are included from pci_regs.h and thier private versions are removed from skfbi.h with all other private defines. The skfbi.h defines PCI_REV_ID and other private defines with different names, these are renamed to Generic PCI names to make them compatible with defines in pci_regs.h. All unused defines are removed from skfbi.h. Changes in v5: Removed unused PCI definitions which were left in v4 Changes in v4: Removed unused PCI definitions which were left in v3 Changes in v3: Renamed all local PCI definitions to Generic names. Corrected coding style mistakes. Changes in v2: Converted individual patches to a series. Made sure that individual patches build correctly ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
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Puranjay Mohan authored
Remove unused private PCI definitions from skfbi.h because generic PCI symbols are already included from pci_regs.h. Signed-off-by: Puranjay Mohan <puranjay12@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Puranjay Mohan authored
Include the uapi/linux/pci_regs.h header file which contains the generic PCI defines. Signed-off-by: Puranjay Mohan <puranjay12@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Puranjay Mohan authored
Rename the PCI_REV_ID and other local defines to Generic PCI define names in skfbi.h and drvfbi.c to make it compatible with the pci_regs.h. Signed-off-by: Puranjay Mohan <puranjay12@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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