- 02 Dec, 2014 38 commits
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Roy Spliet authored
Signed-off-by:
Roy Spliet <rspliet@eclipso.eu> Signed-off-by:
Ben Skeggs <bskeggs@redhat.com>
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Roy Spliet authored
V2: fix whitespace errors in memx.fuc Signed-off-by:
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Roy Spliet authored
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Roy Spliet authored
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Ben Skeggs authored
No code changes. Signed-off-by: -
Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
Probably missing something here, doesn't make a lot of sense to write or+link data into a register whose offset is calculated by the same or+link info.. This is the all I've witnessed the binary driver and vbios doing so far, so it'll do. Signed-off-by: -
Ben Skeggs authored
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Ben Skeggs authored
The binary driver has been doing this since GF119, and we've somehow gotten away with it. But, TMDS that hasn't been initialised already by the x86 vbios code is distorted without it on GM204. Signed-off-by: -
Ben Skeggs authored
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Ben Skeggs authored
Not entirely sure why this got bumped at all yet. Signed-off-by: -
Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
Left-over from before a rework a while back. Signed-off-by: -
Ben Skeggs authored
Logging at trace level, rather than as en error, as it seems conceivable that failure could be normal under certain circumstances (new bios, older sink that doesn't support a particular DPCD address) Signed-off-by: -
Ben Skeggs authored
Starting from GM204, certain registers are no longer accessible by the host (or unsigned PMU firmware). This commit implements devinit on PMU, using a signed microcode image, and devinit data, from the VBIOS. Signed-off-by: -
Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
The field at +0x2 is technically processor specific, though I don't know that it's ever mattered in practice (yet). Signed-off-by: -
Ben Skeggs authored
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Ben Skeggs authored
We're about to need to be able to fetch additional chunks of data beyond the primary bios image, which makes fetching a lot more complicated. This splits out the verious shadowing routines to be nothing more than very dumb "fetch this much data from this offset" routines, and leaves the logic of what and how much to fetch in common code. Signed-off-by: -
Ben Skeggs authored
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Ben Skeggs authored
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Vince Hsu authored
Some Tegra drivers might be compiled as kernel modules, and they need the fuse information for initialization. One example is the GK20A Nouveau driver. It needs the GPU speedo value to calculate frequency-voltage table. So export the tegra_sku_info. Signed-off-by:
Vince Hsu <vinceh@nvidia.com> Acked-by:
Alexandre Courbot <acourbot@nvidia.com> Acked-by:
Thierry Reding <treding@nvidia.com> Signed-off-by:
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- 01 Dec, 2014 2 commits
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Laurent Pinchart authored
Platform data support has been removed from the DU driver, drop DU support from the legacy Marzen board file. The multiplatform DT-based Marzen support should be used instead. Signed-off-by:
Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by:
Arnd Bergmann <arnd@arndb.de> Acked-by:
Simon Horman <horms+renesas@verge.net.au> Signed-off-by:
Dave Airlie <airlied@redhat.com>
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Laurent Pinchart authored
Platform data support has been removed from the DU driver, drop DU support from the legacy Lager board file. The multiplatform DT-based Lager support should be used instead. Signed-off-by:
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