- 21 Jun, 2014 40 commits
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Jiang Liu authored
Release IOAPIC pin associated with PCI device when the PCI device is disabled. Signed-off-by:
Jiang Liu <jiang.liu@linux.intel.com> Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Cc: Tony Luck <tony.luck@intel.com> Cc: Joerg Roedel <joro@8bytes.org> Cc: Paul Gortmaker <paul.gortmaker@windriver.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Grant Likely <grant.likely@linaro.org> Cc: Rafael J. Wysocki <rjw@rjwysocki.net> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Randy Dunlap <rdunlap@infradead.org> Cc: Yinghai Lu <yinghai@kernel.org> Link: http://lkml.kernel.org/r/1402302011-23642-40-git-send-email-jiang.liu@linux.intel.comSigned-off-by:
Thomas Gleixner <tglx@linutronix.de>
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Jiang Liu authored
Release IOAPIC pin associated with PCI device when the PCI device is disabled. Signed-off-by:
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Jiang Liu authored
Introduce function mp_unmap_irq() to release IOAPIC IRQ when IRQ is not used any more, which will typically called by pcibios_disabled_irq. And function mp_irqdomain_unmap() is a common implementation of irq_domain_ops.unmap for IOAPIC. Signed-off-by:
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Jiang Liu authored
On startup, setup_IO_APIC_irqs() will program all IOAPIC pins for ISA IRQs. Later when mp_map_pin_to_irq() is called, it just returns ISA IRQ number without programming corresponding IOAPIC pin. This patch consolidates the way to program IOAPIC pins for both ISA and non-ISA IRQs into mp_map_pin_to_irq() as below: 1) For ISA IRQs, mp_irqs array is used to map IOAPIC pin to IRQ and mp_irqdomain_map() is used to actually program the pin. 2) For non-ISA IRQs, irqdomain is used to map IOAPIC pin to IRQ, and mp_irqdomain_map() is also used to actually program the pin. Signed-off-by:
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Jiang Liu authored
Now we have converted all x86 platforms to use the common irqdomain map interface. There's no caller of io_apic_set_pci_routing(), setup_IO_APIC_irq_extra() and io_apic_setup_irq_pin_once() any more, so kill them. Signed-off-by:
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Jiang Liu authored
Refine devicetree to use common irqdomain map interface to program IOAPIC pins, so we can unify the callsite to progam IOAPIC pins. Signed-off-by:
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Jiang Liu authored
Refine SFI to use common irqdomain map interface to program IOAPIC pins, so we can unify the callsite to progam IOAPIC pins. Signed-off-by:
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Jiang Liu authored
Refine mpparse to use common irqdomain map interface to program IOAPIC pins, so we can unify the callsite to progam IOAPIC pins. Signed-off-by:
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Jiang Liu authored
Refine ACPI to use common irqdomain map interface to program IOAPIC pins, so we can unify the callsite to progam IOAPIC pins. Signed-off-by:
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Jiang Liu authored
Currently there are multiple entries to program IOAPIC pins, such as io_apic_setup_irq_pin_once(), io_apic_set_pci_routing() and setup_IO_APIC_irq_extra() etc. This patch introduces two functions to help consolidate the code to program IOAPIC pins. Function mp_set_pin_attr() is used to optionally set trigger, polarity and NUMA node property for an IOAPIC pin. If mp_set_pin_attr() is not invoked for a pin, the default configuration from BIOS will be used. Function mp_irqdomain_map() is an common implementation of irqdomain map() operation. It figures out attribures for pin and then actually programs the IOAPIC pin. We hope this will be the only entrance for programming IOAPIC pin. And the flow will: 1) caller such as xxx_pci_irq_enable figures out pin attributes. 2) Invoke mp_set_pin_attr() to set attributes for a pin. If the pin has already bin programmed, mp_set_pin_attr() will aslo detects attribute confictions. 3) Invoke mp_map_pin_to_irq() 3.1) If IRQ has already been assigned, return irq_find_mapping() 3.2) Else irq_create_mapping() ->irq_domain_associate() ->mp_irqdomain_map() ->io_apic_setup_irq_pin() So every pin will only programmed once by mp_irqdomain_map(), so we could kill io_apic_setup_irq_pin_once(), io_apic_set_pci_routing() and setup_IO_APIC_irq_extra() etc. Signed-off-by:
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Jiang Liu authored
Now the ioapic driver provides a common interface to create irqdomain, so replace the private implementation. Signed-off-by:
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Jiang Liu authored
Enhance SFI to provide basic support of irqdomain with identity mapping between GSIs and IRQs. Some Intel MID platforms assumes identity mapping between GSI and IRQ, so we can't dynamically allocate IRQ number on demand. Signed-off-by:
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Jiang Liu authored
Enhance mpparse to provide basic support of irqdomain. Signed-off-by:
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Jiang Liu authored
Enhance ACPI driver to provide basic irqdomain support for IOAPIC. We will build identity mapping for IOAPICs hosting legacy IRQs, otherwise dynamically allocate IRQ numbers for IOAPIC pins on demand. Signed-off-by:
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Jiang Liu authored
Enhance function mp_register_ioapic() to support irqdomain. When registering IOAPIC, caller may provide callbacks and parameters for creating irqdomain. The IOAPIC core will create irqdomain later if caller has passed in corresponding parameters. Signed-off-by:
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Jiang Liu authored
Currently x86 support identity mapping between GSI(IOAPIC pin) and IRQ number, so continous IRQs at low end are statically allocated to IOAPICs at boot time. This design causes trouble to support IOAPIC hotplug. This patch implements basic mechanism to dynamically allocate IRQ on demand for IOAPIC pins by using irqdomain framework. It first adds several fields into struct ioapic to support irqdomain. Then it implements an algorithm to dynamically allocate IRQ number for IOAPIC pins on demand. Currently it supports three types of irqdomain: 1) LEGACY: used to support IOAPIC hosting legacy IRQs and building identity mapping for legacy IRQs. A speical case, we dynamically allocate IRQ number for IOAPIC pin which has GSI number below nr_legacy_irqs() but isn't legacy IRQ. This is for backward compatibility and avoid regression. 2) STRICT: build identity mapping between GSI and IRQ nubmer. 3) DYNAMIC: dynamically allocate IRQ number for IOAPIC pin on demand. Legacy(ISA) IRQs is not managed by irqdomain because there may be multiple pins sharing the same IRQ number and current irqdomain only supports 1:1 mapping between pins and IRQ. Signed-off-by:
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Jiang Liu authored
Currently __acpi_register_gsi is defined to return GSI number and may be set to acpi_register_gsi_pic(), acpi_register_gsi_ioapic(), acpi_register_gsi_xen_hvm() and acpi_register_gsi_xen(). Among which, acpi_register_gsi_ioapic() returns GSI number, but acpi_register_gsi_xen_hvm() and acpi_register_gsi_xen() actually returns IRQ number instead of GSI. And for acpi_register_gsi_pic(), GSI number equals to IRQ number. So change acpi_register_gsi_ioapic() to return IRQ number, it also simplifies the code. Signed-off-by:
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Jiang Liu authored
Currently ACPI and ioapic both implement algorithms to map (ioapic, pin) to IRQ number. So consolidate the common part into one place, which is also preparing for irqdomain support. It introduces mp_map_gsi_to_irq(), which will be used to allocate IRQ number IOAPIC pins when irqdomain is enabled. Also rename gsi_to_irq() to map_gsi_to_irq(), later we will introduce unmap_gsi_to_irq() when enabling IOAPIC hotplug. Signed-off-by:
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Jiang Liu authored
Simplify function arch_early_irq_init() and kill static array irq_cfgx[]. Signed-off-by:
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Jiang Liu authored
Some platforms, such as Intel MID and mshypv, do not support legacy interrupt controllers. So count legacy IRQs by legacy_pic->nr_legacy_irqs instead of hard-coded NR_IRQS_LEGACY. Signed-off-by:
David Vrabel <david.vrabel@citrix.com> Link: http://lkml.kernel.org/r/1402302011-23642-20-git-send-email-jiang.liu@linux.intel.comSigned-off-by:
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Jiang Liu authored
Intel CE4100 platforms has i8259 legacy interrupt controllers, so don't set legacy_pic to null_legacy_pic in late booting stage because we need legacy_pic to mask i8259 pins when enabling IOAPIC pins for safety. Signed-off-by:
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Jiang Liu authored
Intel CE4100 platforms need IOAPIC support becasue some devices are always connected to the second IOAPIC, so make CONFIG_CE depends on CONFIG_X86_IO_APIC. Signed-off-by:
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Jiang Liu authored
It also fixes an off by one bug in if ((ioapic_idx > 0) && (irq > NR_IRQS_LEGACY)) It should be if ((ioapic_idx > 0) && (irq >= NR_IRQS_LEGACY)) Signed-off-by:
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Jiang Liu authored
Reorganize function IO_APIC_get_PCI_irq_vector() a bit to better support coming irqdomain. Signed-off-by:
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Jiang Liu authored
Use defined helper function irq_cfg() instead of irq_get_chip_data() for better readability. Signed-off-by:
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Jiang Liu authored
Introduce helper utilities for_each_ioapic(), for_each_ioapic_reverse(), for_each_pin() and for_each_ioapic_pin() to walk ioapics and pins. They will be rewritten e will rewrite later to support IOAPIC hotplug. Signed-off-by:
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Jiang Liu authored
Static variable nr_irqs_gsi is used to maintain the lowest dynamic allocatable IRQ number. It may cause trouble when enabling dynamic IRQ allocation for IOAPIC, so use arch_dynirq_lower_bound() to avoid directly accessing nr_irqs_gsi and kill nr_irqs_gsi. Signed-off-by:
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Jiang Liu authored
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Jiang Liu authored
1) Kill unused MAX_HARDIRQS_PER_CPU. 2) Improve function prototype declararions. 3) Simple typo fix, change "gsit" to "gsi". 4) Use macro VECTOR_UNDEFINED instead of hard-coded -1. 5) Kill redundant comments. Signed-off-by:
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Jiang Liu authored
A default identity mapping between GSI and IRQ is built for legacy IRQs. So when overriding the default identity mapping for legacy IRQs, we should also invalidate isa_irq_to_gsi[gsi] when setting isa_irq_to_gsi[irq] = gsi. Otherwise there may be two entries with the same GSI in the isa_irq_to_gsi array, and acpi_isa_irq_to_gsi() may give wrong result. Signed-off-by:
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Jiang Liu authored
Function mp_register_gsi() may return error code when failed to look up or program corresponding IOAPIC pin for GSI, so enhance acpi_register_gsi() to handle possible error cases. Signed-off-by:
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Jiang Liu authored
1) Remove out-of-date comment 2) Kill unused function acpi_set_irq_model_pic() 3) Use NR_IRQS_LEGACY instead of hard-coded 16 4) Trivial syntax improvements Signed-off-by:
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Jiang Liu authored
Static function irq_to_gsi() is only called by acpi_isa_irq_to_gsi(), so kill function irq_to_gsi() and simplify acpi_isa_irq_to_gsi(). Signed-off-by:
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Jiang Liu authored
Use kmalloc_node() instead of kmalloc() when possible to optimize for performance on NUMA platforms. Signed-off-by:
Bjorn Helgaas <bhelgaas@google.com> Acked-by:
David Rientjes <rientjes@google.com> Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Cc: Tony Luck <tony.luck@intel.com> Cc: Joerg Roedel <joro@8bytes.org> Cc: Paul Gortmaker <paul.gortmaker@windriver.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Grant Likely <grant.likely@linaro.org> Cc: Rafael J. Wysocki <rjw@rjwysocki.net> Cc: Randy Dunlap <rdunlap@infradead.org> Cc: Yinghai Lu <yinghai@kernel.org> Link: http://lkml.kernel.org/r/1402302011-23642-6-git-send-email-jiang.liu@linux.intel.comSigned-off-by:
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Jiang Liu authored
Reorganize code to avoid forward declaration in boot.c, no function changes. Signed-off-by:
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Jiang Liu authored
Simplify arch/x86/include/asm/mpspec.h by 1) Change max_physical_apicid to static as it's only used in apic.c. 2) Kill declaration of mpc_default_type, it's never defined. 3) Delete default_acpi_madt_oem_check(), it has already been declared in apic.h. 4) Make default_acpi_madt_oem_check() depends on CONFIG_X86_LOCAL_APIC instead of CONFIG_X86_64 to support i386. 5) Change mp_override_legacy_irq(), mp_config_acpi_legacy_irqs() and mp_register_gsi() as static because they are only used in acpi/boot.c. Signed-off-by:
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Jiang Liu authored
Use pr_lvl() helper utilities to replace printk(KERN_LVL) for readability, no function changes. Also use pr_cont() to avoid multiple newlines in one printk(). Signed-off-by:
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Jiang Liu authored
Export irq_domain_disassociate() to architecture interrupt drivers, so it could be used to handle legacy IRQ descriptors on x86. Signed-off-by:
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git://git.kernel.org/pub/scm/linux/kernel/git/tip/tipLinus Torvalds authored
Pull perf fixes from Ingo Molnar: "This is larger than usual: the main reason are the ARM symbol lookup speedups that came in late and were hard to resist. There's also a kprobes fix and various tooling fixes, plus the minimal re-enablement of the mmap2 support interface" * 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (36 commits) x86/kprobes: Fix build errors and blacklist context_track_user perf tests: Add test for closing dso objects on EMFILE error perf tests: Add test for caching dso file descriptors perf tests: Allow reuse of test_file function perf tests: Spawn child for each test perf tools: Add dso__data_* interface descriptons perf tools: Allow to close dso fd in case of open failure perf tools: Add file size check and factor dso__data_read_offset perf tools: Cache dso data file descriptor perf tools: Add global count of opened dso objects perf tools: Add global list of opened dso objects perf tools: Add data_fd into dso object perf tools: Separate dso data related variables perf tools: Cache register accesses for unwind processing perf record: Fix to honor user freq/interval properly perf timechart: Reflow documentation perf probe: Improve error messages in --line option perf probe: Improve an error message of perf probe --vars mode perf probe: Show error code and description in verbose mode perf probe: Improve error message for unknown member of data structure ...
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Linus Torvalds authored
Merge branch 'locking-urgent-for-linus.patch' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull rtmutex fixes from Thomas Gleixner: "Another three patches to make the rtmutex code more robust. That's the last urgent fallout from the big futex/rtmutex investigation" * 'locking-urgent-for-linus.patch' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: rtmutex: Plug slow unlock race rtmutex: Detect changes in the pi lock chain rtmutex: Handle deadlock detection smarter
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