- 22 Mar, 2021 4 commits
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Stanimir Varbanov authored
Use the standard display_delay and display_delay_enable controls, the legacy private MFC controls are kept for backward compatibility. Acked-by:
Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by:
Stanimir Varbanov <stanimir.varbanov@linaro.org> Signed-off-by:
Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
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Stanimir Varbanov authored
Add support for display delay and display delay enable std controls. With this we implement decoder decode output order (decode vs display). Once firmware implement few new features the controls will be used for other use-cases. Signed-off-by:
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Stanimir Varbanov authored
Make display delay and display delay enable MFC controls standard v4l controls. This will allow reuse of the controls for other decoder drivers. Also the new proposed controls are now codec agnostic because they could be used for any codec. Acked-by:
Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by:
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Mauro Carvalho Chehab authored
Document the basic policies of the media subsystem profile. Signed-off-by:
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- 12 Mar, 2021 1 commit
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Mauro Carvalho Chehab authored
In practice, IA_CSS_PIPE_ID_NUM should never be used when calling atomisp_q_video_buffers_to_css(), as the driver should discover the right pipe before calling it. Yet, if some pipe parsing issue happens, it could end using it. So, add a WARN_ON() to prevent such case. Reported-by:
Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by:
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- 11 Mar, 2021 35 commits
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Laurent Pinchart authored
Print the value of the ISP shadow registers in mipi_csis_dump_regs() as this can help debugging. Signed-off-by:
Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by:
Rui Miguel Silva <rmfrfs@gmail.com> Signed-off-by:
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Laurent Pinchart authored
Replace hardcoded register addresses in the MIPI_CSIS_DBG_CTRL() function with macros. While at it, update the printed name of the registers to match the datasheet, and short them by address. Signed-off-by:
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Laurent Pinchart authored
Rename several register macros to match the names from the documentation. Signed-off-by:
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Laurent Pinchart authored
Replace the per-channel ISP registers macros with a single one that take the channel as a parameter. Only channel 0 is supported for now, but this will make support for multiple channels easier. Signed-off-by:
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Laurent Pinchart authored
Define macros for the fields of the MIPI_CSIS_DPHY_BCTRL_L register, based on the i.MX8MM datasheet. The numerical value written to the register, taken from the i.MX7D code, is unchanged, and corresponds to a 20.0MHz Tx escape clock frequency according to the documentation of the register from the i.MX8MM. Whether the other fields are applicable to the i.MX7D is unknown. While at it, rename the DPHY[BS]CTRL register names to DPHY_[BS]CTRL to match the datasheet. Signed-off-by:
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Laurent Pinchart authored
When setting the CSIS parameters, write the MIPI_CSIS_DPHYCTRL register fully instead of modifying selected fields, as the register doesn't contain any reserved fields that need to be preserved. This simplifies initialization slightly, and ensures that the register value doesn't depend on its previous state (before a warm reboot for instance). Signed-off-by:
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Laurent Pinchart authored
Make it easier to instrument register access (for instance with printk-based logging) by turning the macros into inline functions. Signed-off-by:
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Laurent Pinchart authored
The Ths_settle timing parameter depends solely on the lane data rate of the source. Calculate it at runtime instead of requiring it to be specified in the device tree. Signed-off-by:
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Laurent Pinchart authored
Checking if the link setup operation is called for the sink or source pad doesn't require any locking. Move it out of the section protected by the mutex. Signed-off-by:
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Laurent Pinchart authored
The mipi_csis_set_hsync_settle() is small, called from a single place, and misnamed (HS stands for high speed, not horizontal sync). Inline it in its only caller, and refactor the HSSETTLE register field macros while at it. Signed-off-by:
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Laurent Pinchart authored
CSI-2 uses, as a convention, 1Xn media bus formats. Replace MEDIA_BUS_FMT_UYVY8_2X8 with MEDIA_BUS_FMT_UYVY8_1X16, and set the width value accordingly. Signed-off-by:
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Laurent Pinchart authored
The data type specified for 10-bit YUV is the same as 8-bit YUV. This is wrong, and has thus clearly not been tested. Instead of fixing data type without being able to test it, drop it. It can be added back later when someone will have access to a 10-bit YUV source to this it. Signed-off-by:
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Laurent Pinchart authored
The wrap clock is retrieved with the other clocks using devm_clk_bulk_get(), and retrieved independently with a specific devm_clk_get() call. The latter isn't needed, replace it with usage of the wrap clock from the bulk array. As the wrap clock is mandatory, simplify its usage further by removing conditionals. Signed-off-by:
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Laurent Pinchart authored
The .s_power() subdev operation is optional, don't error out when the source doesn't implement it. Signed-off-by:
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Laurent Pinchart authored
The alignments given to the v4l_bound_align_image() are expressed in bytes, while the function expects them to be expressed as a power of two. Fix it. Signed-off-by:
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Laurent Pinchart authored
The device has a single reset line, there's thus no need to name it explicitly when calling devm_reset_control_get_exclusive(). Drop the name in preparation for the removal of the reset-names property in the DT binding. Signed-off-by:
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Laurent Pinchart authored
The CSI subdev has a single source, the input video mux. There's thus a single link between the source and the CSI, which can be made immutable and enabled to simplify configuration. Signed-off-by:
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Laurent Pinchart authored
Add a flags argument to the v4l2_create_fwnode_links_to_pad() function to specify the link flags. This allows drivers to create immutable links for instance. Signed-off-by:
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Laurent Pinchart authored
The CSI driver only supports the BGGR Bayer patterns currently. The hardware supports all patterns (the only pattern-dependent hardware operation is statistics calculation, as de-bayering isn't supported), enable them in the driver too. Signed-off-by:
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Laurent Pinchart authored
The SOF and EOF interrupts are not used. Don't enable them. Signed-off-by:
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Laurent Pinchart authored
The DMA controller needs to be reflashed after being configured. There is however no need to do it twice, once in imx7_csi_configure() and once in imx7_csi_sw_reset(), called from imx7_csi_enable(). Remove the former. Signed-off-by:
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Laurent Pinchart authored
The RxFIFO is enabled by imx7_csi_dmareq_rff_enable() in both imx7_csi_init() and imx7_csi_enable(). Enabling it once is enough, remove the former. Signed-off-by:
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Laurent Pinchart authored
The CSI is enabled at the end of imx7_csi_sw_reset(), called from imx7_csi_enable(), as well as at the end of imx7_csi_enable(). The latter is enough, remove the former. Signed-off-by:
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Laurent Pinchart authored
There's no need to read the CSICR1 register before each write in imx7_csi_rx_fifo_clear(). Simplify the function. Signed-off-by:
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Laurent Pinchart authored
The RFF burst type is set in imx7_csi_dmareq_rff_enable(), which doesn't match the function name. Move it to imx7_csi_configure(). Signed-off-by:
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Laurent Pinchart authored
When configuring the CSI in imx7_csi_configure(), the CSICR18 is set through a read-modify-write cycle to avoid affecting fields whose usage isn't clear. The function then sets fields depending on whether the input is interlaced or progressive, and from the parallel input or the CSI-2 receiver. Those bits are only set and never cleared. For instance, when switching from a CSI-2 source to the parallel input, the BIT_DATA_FROM_MIPI will stay set. Fix this issue by first clearing all the fields we need to configure. Add BIT_CSI_HW_ENABLE to the set of fields being cleared, as the CSI needs to start in the disabled state. This allows dropping the call to imx7_csi_hw_disable() in imx7_csi_sw_reset(). Signed-off-by:
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Laurent Pinchart authored
Merge all the configuration steps (imx7_csi_buf_stride_set(), imx7_csi_deinterlace_enable(), imx7_csi_set_imagpara() and imx7_csi_init_default()) in the imx7_csi_configure() function. This simplifies the configuration procedure by removing most read-update-write cycles, and makes the code generally more readable. imx7_csi_init_default() is kept as it is also called from imx7_csi_deinit(). This will be addressed separately. Signed-off-by:
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Laurent Pinchart authored
There's no need to set the buffer stride to 0 when disabling the CSI. Remove the extraneous register write. Signed-off-by:
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Laurent Pinchart authored
The MIPI CSI-2 data type depends solely on the media bus code on the sink pad. Deriving it from the pixel format is confusing. Simplify the code. Signed-off-by:
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Laurent Pinchart authored
The imx7_csi_hw_reset() and imx7_csi_init_interface() functions are always called together. Merge them. This allows simplifying the code by avoiding duplicated register writes. As the imx7_csi_hw_reset() function didn't perform a hardware reset by initialized the registers to reset defaults (in addition to resetting the frame counter), name the resulting function imx7_csi_init_default() as it sets default values. Signed-off-by:
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Laurent Pinchart authored
The imx7_csi_streaming_start() function just wraps imx7_csi_enable(). Call the latter directly. Similarly, merge imx7_csi_streaming_stop() and imx7_csi_disable() as they're both called from a single location only. Signed-off-by:
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Laurent Pinchart authored
There's no reason to delay the CSI configuration and the DMA setup after starting the source. Move it before, simplifying error handling at stream start. Signed-off-by:
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Laurent Pinchart authored
The imx7_csi_dma_stop() function performs two operations, it waits for DMA to be complete, and then cleans up and frees buffers. Split the second part out to a new imx7_csi_dma_cleanup() function to match imx7_csi_dma_setup(), in preparation for a stream start refactoring. Signed-off-by:
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Laurent Pinchart authored
The imx7_csi_dma_start() doesn't start DMA. Rename it to imx7_csi_dma_setup() to avoid confusion. Signed-off-by:
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Laurent Pinchart authored
The is_csi2 field can't be accessed concurrently by imx7_csi_pad_link_validate() and imx7_csi_configure(), as the latter is called from imx7_csi_s_stream(), which is called after link validation. Drop the lock. Signed-off-by:
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