- 21 Mar, 2018 40 commits
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Evan Quan authored
Defines the smc message interface with the driver. Acked-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
Evan Quan <evan.quan@amd.com> Reviewed-by:
Alex Deucher <alexander.deucher@amd.com> Signed-off-by:
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Evan Quan authored
Add driver firmware interface header. v2: squash in interface updates. Acked-by:
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Evan Quan authored
Add new smu_info table. v2: update table format. Acked-by:
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Evan Quan authored
Used for the powerplay implementation. Acked-by:
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Hawking Zhang authored
Initialize the IP offsets for vega12. Acked-by:
Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by:
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Feifei Xu authored
Add external_rev_id for vega12. Acked-by:
Feifei Xu <Feifei.Xu@amd.com> Signed-off-by:
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Evan Quan authored
Add the appropriate clockgating flags for vega12 Acked-by:
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Alex Deucher authored
Add the IP blocks, clock and powergating flags, and common clockgating support. Acked-by:
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Hawking Zhang authored
Add gfx9_2_1 golden setting. v2: switch to soc15_program_register_sequence for golden setting programming v3: squash in additional golden updates Acked-by:
Ken Wang <ken.wang@amd.com> Signed-off-by:
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Alex Deucher authored
Same as vega10 and raven. Acked-by:
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Alex Deucher authored
Same as vega10 and raven. Acked-by:
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Alex Deucher authored
Just a place holder for now. Acked-by:
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Alex Deucher authored
Fill these in when we get them. Acked-by:
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Alex Deucher authored
Declare and fetch the appriopriate files. Acked-by:
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Feifei Xu authored
Update vega12 sdma golden setting. Acked-by:
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Hawking Zhang authored
Add sdma golden setting for vega12. v2: switch to soc15_program_register_sequence for golden register programming v3: squash in unused declaration fix Acked-by:
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Alex Deucher authored
Same as vega10 for now. Acked-by:
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Alex Deucher authored
Fill these in when we get them. Acked-by:
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Alex Deucher authored
Declare the firmware and fetch the proper file. Acked-by:
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Alex Deucher authored
Treat it the same as vega10 for now. Acked-by:
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Alex Deucher authored
Same as vega10. v2: squash in golden regs fix from Feifei Acked-by:
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Alex Deucher authored
DC is used for modesetting on vega12. Acked-by:
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Jerry (Fangzhi) Zuo authored
VG12 shows minor revision version of 2 which is not handled in bios_parser_get_firmware_info() routine. Acked-by:
Jerry (Fangzhi) Zuo <Jerry.Zuo@amd.com> Signed-off-by:
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Alex Deucher authored
Add support for vega12 to the display manager. Acked-by:
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Alex Deucher authored
Add virtual dce support for vega12. Acked-by:
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Alex Deucher authored
Declare firmware and add support for the file. Acked-by:
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Alex Deucher authored
Declare firmware and add support for the file. Acked-by:
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Feifei Xu authored
Same as vega10. Acked-by:
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Evan Quan authored
Acked-by:
Huang Rui <ray.huang@amd.com> Signed-off-by:
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Alex Deucher authored
Same as vega10 for now. Acked-by:
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Hawking Zhang authored
Add the cgs interface to query the smu firmware for vega12 and declare the firmware. Acked-by:
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Alex Deucher authored
soc15 just like vega10 and raven. Acked-by:
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Alex Deucher authored
Stores gpu configuration details. Acked-by:
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Feifei Xu authored
Add vega12 to amd_asic_type enum and amdgpu_asic_name[]. Acked-by:
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Feifei Xu authored
Add ip header files for IPs with a delta for vg12: GC, MMHUB, OSS Acked-by:
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Rex Zhu authored
when set pp table Reviewed-by:
Rex Zhu <Rex.Zhu@amd.com> Signed-off-by:
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Rex Zhu authored
caused by 'commit ca82cec868d1 ("drm/amd/pp: Simplified the avfs btc state on smu7")' Reviewed-by: -
Rex Zhu authored
caused by 'commit 83e3c4615872 ("drm/amdgpu: Remove wrapper layer of smu ip functions")' BUG: unable to handle kernel NULL pointer dereference at 00000000000005d8 [ 313.241459] IP: ci_dpm_read_sensor+0x37/0xf0 [amdgpu] Reviewed-by: -
Rex Zhu authored
Reviewed-by:
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Mikita Lipski authored
By moving amdgpu_irq_disable_all earlier in the sequence fixes an issue with disabling pflip interrupts: *ERROR* dal_irq_service_dummy_ack: called for non-implemented irq source Earlier patch fixed a memory corruption and revealed irq warnings.This way it seems to be there no obvious issues with unloading the module. Signed-off-by:
Mikita Lipski <mikita.lipski@amd.com> Reviewed-by:
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