- 24 Oct, 2021 40 commits
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Stephan Gerhold authored
SMEM can now be described directly in the reserved-memory. This is mainly meant for newer SoCs where there is only one SMEM region. However, even on older SoCs like MSM8916 there is clearly one main SMEM region (described by "memory-region") that holds the smem_header and one special extra region used only for data of the RPM ("qcom,rpm-msg-ram"). The definition in reserved-memory also looks cleaner for older SoCs, so make use of that in MSM8916 as well. Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211018110009.30837-2-stephan@gerhold.net
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Stephan Gerhold authored
According to the new DT schema for qcom,rpm-msg-ram the node name should be sram@. memory@ is reserved for definition of physical RAM (usable by Linux). This fixes the following dtbs_check error on various device trees: memory@60000: 'device_type' is a required property From schema: dtschema/schemas/memory.yaml Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211018110009.30837-1-stephan@gerhold.net
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J.R. Divya Antony authored
This device has MPU-6515 imu and Asahi Kasei AK09911 magnetometer, Add support for it. Signed-off-by: J.R. Divya Antony <d.antony.jr@gmail.com> Reviewed-by: Stephan Gerhold <stephan@gerhold.net> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211012112735.2765-3-d.antony.jr@gmail.com
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J.R. Divya Antony authored
Enable SDHCI (SD Card) Storage. Signed-off-by: J.R. Divya Antony <d.antony.jr@gmail.com> Reviewed-by: Stephan Gerhold <stephan@gerhold.net> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211012112735.2765-2-d.antony.jr@gmail.com
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J.R. Divya Antony authored
Add support for touchscreen in this device. Signed-off-by: J.R. Divya Antony <d.antony.jr@gmail.com> Reviewed-by: Stephan Gerhold <stephan@gerhold.net> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211012112735.2765-1-d.antony.jr@gmail.com
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David Heidelberg authored
This property doesn't exist in Linux kernel. Fixes: 288ef8a4 ("arm64: dts: sdm845: add oneplus6/6t devices") Reviewed-by: Caleb Connolly <caleb@connolly.tech> Signed-off-by: David Heidelberg <david@ixit.cz> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211011200138.115688-1-david@ixit.cz
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Vladimir Zapolskiy authored
The change corrects the described bus clock of the QCE. Fixes: 3e482859 ("dts: qcom: sdm845: Add dt entries to support crypto engine.") Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Reviewed-by: Thara Gopinath <thara.gopinath@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211011095534.1580406-1-vladimir.zapolskiy@linaro.org
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Vladimir Zapolskiy authored
The change adds description of Qualcomm crypto engine controller and BAM associated with it. The change is inspired by commit 3e482859 ("dts: qcom: sdm845: Add dt entries to support crypto engine.") While performance of cryptographic algorithms executed on QCE is lower than e.g. ones tinkered for ARM NEON, the offloaded execution would make sense: # cryptsetup benchmark | grep aes aes-cbc 128b 71.0 MiB/s 71.9 MiB/s aes-cbc 256b 62.4 MiB/s 62.4 MiB/s aes-xts 256b 70.7 MiB/s 70.8 MiB/s aes-xts 512b 62.0 MiB/s 63.3 MiB/s Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Cc: Thara Gopinath <thara.gopinath@linaro.org> Acked-by: Thara Gopinath <thara.gopinath@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211011094822.1580122-1-vladimir.zapolskiy@linaro.org
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Krzysztof Kozlowski authored
Although the early NXP NCI NFC bindings required the clock-frequency property, it was never used by the driver and it is actually a property of I2C bus, not I2C slave. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211011073143.32645-1-krzysztof.kozlowski@canonical.com
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J.R. Divya Antony authored
This device has MPU-6515 imu and Asahi Kasei AK09911 magnetometer. Add support for it. Signed-off-by: J.R. Divya Antony <d.antony.jr@gmail.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211010033750.15204-1-d.antony.jr@gmail.com
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AngeloGioacchino Del Regno authored
Add support for the Venus video decoder/encoder but leave it disabled by default; it is expected to eventually get enabled in each machine specific DT, where required. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211008102119.268869-3-angelogioacchino.delregno@collabora.com
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Marijn Suijten authored
This string- and electrical configuration depend on the board and panel, and should hence not be defined generically for every user of pm660l. SoMainline will pick this configuration again when enabling WLED on the Sony Nile platform. Fixes: 7b56a804 ("arm64: dts: qcom: pm660l: Add WLED support") Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-By: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211007213400.258371-14-marijn.suijten@somainline.org
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Marijn Suijten authored
The number of WLED strings used by a certain platform depend on the panel connected to that board and may not be the same for every user of pmi8994. Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-By: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211007213400.258371-13-marijn.suijten@somainline.org
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Marijn Suijten authored
The driver now sets an appropriate default for WLED4 (and WLED5) just like WLED3 making this linear array from 0-3 redundant. In addition the driver is now able to parse arrays of variable length solving the "all four strings *have to* be defined" comment. Besides the driver will now warn when both properties are specified to prevent ambiguity: the length of the array is enough to imply a set number of strings. Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-By: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211007213400.258371-12-marijn.suijten@somainline.org
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Marijn Suijten authored
The property is named "qcom,external-pfet", as found by dt_binding_check: 'qcom,eternal-pfet' does not match any of the regexes Fixes: 37aa540c ("arm64: dts: qcom: pmi8994: Add WLED node") Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-By: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211007213400.258371-11-marijn.suijten@somainline.org
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Matthias Kaehlcke authored
Herobrine is a Chrome OS board/platform based on the QCA SC7280. Add a .dtsi for the platform parts and a .dts for the board specific bits. Currently the .dtsi has everything except the compatible strings, things will likely get shuffled around in the future as we learn more about the differences between boards. Signed-off-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211007140854.1.I70615769f27bbaf7e480419d0f660f802b1fea43@changeid
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Prasad Malisetty authored
Enable PCIe controller and PHY for sc7280 IDP board. Add specific NVMe GPIO entries for SKU1 and SKU2 support. Signed-off-by: Prasad Malisetty <pmaliset@codeaurora.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1633628923-25047-4-git-send-email-pmaliset@codeaurora.org
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Prasad Malisetty authored
Add PCIe controller and PHY nodes for sc7280 SOC. Signed-off-by: Prasad Malisetty <pmaliset@codeaurora.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1633628923-25047-3-git-send-email-pmaliset@codeaurora.org
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Raffaele Tranquillini authored
This enables the JDI FHD_R63452 LCD panel used on Xiaomi Mi 5 Signed-off-by: Raffaele Tranquillini <raffaele.tranquillini@gmail.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210925113808.524749-1-raffaele.tranquillini@gmail.com
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Rob Herring authored
The 'interrupt-map' in several QCom SoCs is malformed. The '#address-cells' size of the parent interrupt controller (the GIC) is not accounted for. Cc: Andy Gross <agross@kernel.org> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: linux-arm-msm@vger.kernel.org Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210928192210.1842377-1-robh@kernel.org
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Shawn Guo authored
Per QMP PHY bindings schema, 'vdda-phy-supply' and 'vdda-phy-supply' are required for IPQ8074 QMP USB3 PHY. Since supplies are not added in DTS for this platform, add a dummy regulator as the supply to QMP USB3 PHY, so that dtbs_check stops complaining the missing supplies. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210929034253.24570-10-shawn.guo@linaro.org
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Shawn Guo authored
IPQ8074 PCIe PHY nodes are broken in the many ways: - '#address-cells', '#size-cells' and 'ranges' are missing. - Child phy/lane node is missing, and the child properties like '#phy-cells' and 'clocks' are mistakenly put into parent node. - The clocks properties for parent node are missing. Fix them to get the nodes comply with the bindings schema. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210929034253.24570-9-shawn.guo@linaro.org
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Shawn Guo authored
'vdda-phy-supply' and 'vdda-pll-supply' are required properties. Add them to fix the dtbs_check warnings below. phy@1da7000: 'vdda-phy-supply' is a required property arch/arm64/boot/dts/qcom/msm8998-asus-novago-tp370ql.dt.yaml arch/arm64/boot/dts/qcom/msm8998-hp-envy-x2.dt.yaml arch/arm64/boot/dts/qcom/msm8998-lenovo-miix-630.dt.yaml phy@1da7000: 'vdda-pll-supply' is a required property arch/arm64/boot/dts/qcom/msm8998-asus-novago-tp370ql.dt.yaml arch/arm64/boot/dts/qcom/msm8998-hp-envy-x2.dt.yaml arch/arm64/boot/dts/qcom/msm8998-lenovo-miix-630.dt.yaml Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210929034253.24570-8-shawn.guo@linaro.org
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Shawn Guo authored
The 'reg-names' is not a supported/used property. Drop it from QMP PHY nodes to fix dtbs_check warnings like below. phy-wrapper@88e9000: 'reg-names' does not match any of the regexes: '^phy@[0-9a-f]+$', 'pinctrl-[0-9]+' arch/arm64/boot/dts/qcom/sm8350-hdk.dt.yaml arch/arm64/boot/dts/qcom/sm8350-mtp.dt.yaml Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210929034253.24570-7-shawn.guo@linaro.org
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Shawn Guo authored
The following properties are not supported and causing dtbs_check warnings. - vdda-phy-max-microamp - vdda-pll-max-microamp - vddp-ref-clk-max-microamp - vddp-ref-clk-always-on Drop them from QMP PHY nodes. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210929034253.24570-6-shawn.guo@linaro.org
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Shawn Guo authored
Many child nodes of QMP PHY are named without following bindings schema and causing dtbs_check warnings like below. phy@1c06000: 'lane@1c06800' does not match any of the regexes: '^phy@[0-9a-f]+$' arch/arm64/boot/dts/qcom/msm8998-asus-novago-tp370ql.dt.yaml arch/arm64/boot/dts/qcom/msm8998-hp-envy-x2.dt.yaml arch/arm64/boot/dts/qcom/msm8998-lenovo-miix-630.dt.yaml arch/arm64/boot/dts/qcom/msm8998-mtp.dt.yaml arch/arm64/boot/dts/qcom/msm8998-oneplus-cheeseburger.dt.yaml arch/arm64/boot/dts/qcom/msm8998-oneplus-dumpling.dt.yaml Correct them to fix the warnings. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210929034253.24570-5-shawn.guo@linaro.org
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Shawn Guo authored
'#clock-cells' is a required property of QMP PHY child node, not itself. Move it to fix the dtbs_check warnings. There are only '#clock-cells' removal from SM8350 QMP PHY nodes, because child nodes already have the property. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210929034253.24570-4-shawn.guo@linaro.org
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Rajesh Patil authored
Add 200MHz OPP in qspi_opp_table Signed-off-by: Rajesh Patil <rajpat@codeaurora.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1632892123-11006-1-git-send-email-rajpat@codeaurora.org
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Douglas Anderson authored
The RTC on the pmk8350 is not useful on all boards. Some boards may not provide backup power to the PMIC but might have another RTC on the board that does have backup power. In this case it's better to not use the RTC on the PMIC. At the moment, the only boards that includes this PMIC are sc7280-idp and sc7280-idp2. On sc7280-idp I'm not aware of any other RTCs, but sc7280-idp2 has a Chrome OS EC on it and this is intended to provide the RTC for the AP. Let's do what we normally do for hardware that's not used by all boards and set it to a default status of "disabled" and then enable it on the boards that need it. NOTE: for sc7280-idp it's _possible_ we might also want to add `allow-set-time;`. That could be the subject of a future patch if it is indeed true. Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Satya Priya <skakit@codeaurora.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> [bjorn: Enable the RTC on the MTP as well] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210929153553.1.Ib44c2ac967833d7a3f51452d44d15b7b8d23c1f0@changeid
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Chukun Pan authored
Add node to support the QUP5 I2C controller inside of IPQ8074. It is exactly the same as QUP2 controllers. Some routers like ZTE MF269 use this bus. Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211001145421.18302-1-amadeus@jmu.edu.cn
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Amit Pundir authored
Add qcom,msm-id and qcom,board-id for Robotics Board RB5. This will help us boot the device with newer Android boot image header versions, which package dtb separately instead of the default Image.gz-dtb (appended dtb) format. Signed-off-by: Amit Pundir <amit.pundir@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210930185742.117928-2-amit.pundir@linaro.org
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Amit Pundir authored
Add qcom,msm-id and qcom,board-id for Dragonboard 845c. This will help us boot the device with newer Android boot image header versions, which package dtb separately instead of the default Image.gz-dtb (appended dtb) format. Signed-off-by: Amit Pundir <amit.pundir@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210930185742.117928-1-amit.pundir@linaro.org
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Konrad Dybcio authored
Almost any board that boots and has a way to interact with it (say for the rare cases of just-pstore or let's-rely-on-bootloader-setup) needs to set some GPIOs, so it makes no sense to include gpio.h separately each time. Hence move it to SoC DTSI. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211002001358.45920-6-konrad.dybcio@somainline.org
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Konrad Dybcio authored
Add the aforementioned properties in the SoC DTSI so that everybody doesn't have to copy that into their device DTs, effectively reducing code duplication. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211002001358.45920-5-konrad.dybcio@somainline.org
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Konrad Dybcio authored
DPU/MDSS is borderline useless without MDP, so disabling both of them makes little sense. With this change, enabling mdss will be enough. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211002001358.45920-4-konrad.dybcio@somainline.org
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Konrad Dybcio authored
Components that rely on proprietary (not to mention signed!) firmware should not be enabled by default, as lack of the aforementioned firmware could cause various issues, from random errors to straight-up failing to boot. Re-enable these remote processors on boards that didn't previously explicitly disable them. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Tested-By: Steev Klimaszewski <steev@kali.org> [bjorn: Added missing changes to db845c and lenovo-yoga-c630 to the patch] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211002001358.45920-3-konrad.dybcio@somainline.org
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Konrad Dybcio authored
Add the missing XO clock to the SDHCI controller. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211002001358.45920-2-konrad.dybcio@somainline.org
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Stephan Gerhold authored
After adding all necessary support for MSM8916 SMP/cpuidle without PSCI on ARM32, build the Samsung Galaxy S4 Mini VE device tree from the arm64 tree together with the ARM32 include to allow booting this device on ARM32. The approach to include device tree files from other architectures is inspired from e.g. the Raspberry Pi (bcm2711-rpi-4-b.dts) where this is used to build the device tree for both ARM32 and ARM64. Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211004204955.21077-15-stephan@gerhold.net
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Stephan Gerhold authored
Add a special device tree include for MSM8916 on ARM32 that sets up SMP and cpuidle without PSCI. This is meant for devices with signed firmware that does not support PSCI and only allows booting ARM32 kernels. Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211004204955.21077-14-stephan@gerhold.net
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Stephan Gerhold authored
Add the device tree nodes necessary for SMP bring-up and cpuidle without PSCI on ARM32. The hardware is typically controlled by the PSCI implementation in the TrustZone firmware and is therefore marked as status = "reserved" by default (from the device tree specification): "Indicates that the device is operational, but should not be used. Typically this is used for devices that are controlled by another software component, such as platform firmware." Since this is part of the MSM8916 SoC it should be added to msm8916.dtsi but in practice these nodes should only get enabled via an extra include on ARM32. This is necessary for some devices with signed firmware which is missing both ARM64 and PSCI support and can therefore only boot ARM32 kernels. Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211004204955.21077-13-stephan@gerhold.net
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