- 13 Dec, 2023 34 commits
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Shannon Nelson authored
If the driver or firmware is stuck in reset state, don't bother trying to use adminq commands. This speeds up shutdown and prevents unnecessary timeouts and error messages. This includes a bit of rework on ionic_adminq_post_wait() and ionic_adminq_post_wait_nomsg() to both use __ionic_adminq_post_wait() which can do the checks needed in both cases. Signed-off-by:
Shannon Nelson <shannon.nelson@amd.com> Reviewed-by:
Brett Creeley <brett.creeley@amd.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Shannon Nelson authored
Make sure we keep and replay the filters and RSS config across an FLR by using our FW_RESET flag. This gets checked on the way down and on the way back up to help determine how much LIF state to keep and restore across a reset action. Signed-off-by:
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Shannon Nelson authored
Don't rely on the PCI memory for the devcmd opcode because we read a 0xff value if the PCI bus is broken, which can cause us to report a bogus dev_cmd opcode later. Signed-off-by:
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Furong Xu authored
Complete all counters on XGMAC Core. These can be useful for debugging. Signed-off-by:
Furong Xu <0x1207@gmail.com> Signed-off-by:
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David S. Miller authored
Christian Marangi says: ==================== net: phy: at803x: cleanup The intention of this big series is to try to cleanup the big at803x PHY driver. It currently have 3 different family of PHY in it. at803x, qca83xx and qca808x. The current codebase required lots of cleanup and reworking to make the split possible as currently there is a greater use of adding special function matching the phy_id. This has been reworked to make the function actually generic and make the change only in more specific one. The result is the addition of micro additional function but that is for good as it massively simplify splitting the driver later. Consider that this is all in preparation for the addition of qca807x PHY driver that will also uso some of the functions of at803x. Subsequent series will come with the actual PHY split and other required cleanup. This is only to start the process with minor changes. Changes v4: - Improve at8031_probe function Changes v3: - Add Reviewed-by tag from Andrew - Split patch 10 (at8031 rename) to rename and move Changes v2: - Drop split part due to series too big - Split changes even more - Fix problem pointed out by Russell (flawed reworked function logic) - Add Reviewed-by tag from Andrew - Minor rework to prevent further code duplication for cdt ==================== Signed-off-by: -
Christian Marangi authored
Drop specific PHY ID check for cable test functions for at803x. This is done to make functions more generic. While at it better describe what the functions does by using more symbolic function names. PHYs that requires to set additional reg are moved to specific function calling the more generic one. cdt_start and cdt_wait_for_completion are changed to take an additional arg to pass specific values specific to the PHY. Signed-off-by:
Christian Marangi <ansuelsmth@gmail.com> Signed-off-by:
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Christian Marangi authored
Move at8035 specific DT parse for clock out frequency to dedicated probe to make at803x probe function more generic. This is to tidy code and no behaviour change are intended. Detection logic is changed, we check if the clk 25m mask is set and if it's not zero, we assume the qca,clk-out-frequency property is set. The property is checked in the generic at803x_parse_dt called by at803x_probe. Signed-off-by:
Andrew Lunn <andrew@lunn.ch> Signed-off-by:
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Christian Marangi authored
Move at8031 functions in dedicated section with dedicated at8031 parse_dt and probe. Signed-off-by:
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Christian Marangi authored
Rename at8031 related DT function name to a more specific name referencing they are only related to at8031 and not to the generic at803x PHY family. Signed-off-by:
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Christian Marangi authored
Move specific at8031 config_intr bits to dedicated function to make at803x_config_initr more generic. This is needed in preparation for PHY driver split as qca8081 share the same function to setup interrupts. Signed-off-by:
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Christian Marangi authored
Move specific at8031 WOL enable/disable to dedicated function to make at803x_set_wol more generic. This is needed in preparation for PHY driver split as qca8081 share the same function to toggle WOL settings. In this new implementation WOL module in at8031 is enabled after the generic interrupt is setup. This should not cause any problem as the WOL_INT has a separate implementation and only relay on MAC bits. Signed-off-by:
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Christian Marangi authored
Move specific at8031 config_init to dedicated function to make at803x_config_init more generic and tidy things up. Signed-off-by:
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Christian Marangi authored
Move specific at8031 probe mode check to dedicated probe to make at803x_probe more generic and keep code tidy. Signed-off-by:
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Christian Marangi authored
Move specific DT options for at8031 to specific probe to tidy things up and make at803x_parse_dt more generic. Signed-off-by:
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Christian Marangi authored
Rework qca83xx specific check to dedicated function to tidy things up and drop useless phy_id check. Also drop an useless link_change_notify for QCA8337 as it did nothing an returned early. Signed-off-by:
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Christian Marangi authored
The function and the struct related to hw_stats were specific to qca83xx PHY but were called following the convention in the driver of calling everything with at803x prefix. To better organize the code, rename these function a more specific name to better describe that they are specific to 83xx PHY family. Signed-off-by:
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Christian Marangi authored
Move the WOL disable call to specific at8031 probe to make at803x_probe more generic and drop extra check for PHY ID. Keep the same previous behaviour by first calling at803x_probe and then disabling WOL. Signed-off-by:
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Christian Marangi authored
Fix passing the wrong reference for config_initr on passing the function pointer, drop the wrong & from at803x_config_intr in the PHY struct. Signed-off-by:
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Jiri Pirko authored
Mode supported is currently reported to the user exactly the same, as the current mode. That's because mode changing is not implemented. Remove the leftover mode_supported() op and use mode_get() to fill up the supported mode exposed to user. One, if even, mode changing is going to be introduced, this could be very easily taken back. In the meantime, prevent drivers form implementing this in wrong way (as for example recent netdevsim implementation attempt intended to do). Signed-off-by:
Jiri Pirko <jiri@nvidia.com> Reviewed-by:
Simon Horman <horms@kernel.org> Signed-off-by:
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Jakub Kicinski authored
Michael Chan says: ==================== bnxt_en: Update for net-next The first 4 patches in the series fix issues in the net-next tree introduced in the last 4 weeks. The first 3 patches fix ring accounting and indexing logic. The 4th patch fix TX timeout when the TX ring is very small. The next 7 patches add new features on the P7 chips, including TX coalesced completions, VXLAN GPE and UDP GSO stateless offload, a new rx_filter_miss counters, and more QP backing store memory for RoCE. The last 2 patches are PTP improvements. ==================== Link: https://lore.kernel.org/r/20231212005122.2401-1-michael.chan@broadcom.comSigned-off-by:
Jakub Kicinski <kuba@kernel.org>
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Pavan Chebbi authored
In a busy network, especially with flow control enabled, we may experience timestamp query failures fairly regularly. After a while, dmesg may be flooded with timestamp query failure error messages. Silence the error message from the low level hwrm function that sends the firmware message. Change netdev_err() to netdev_WARN_ONCE() if this FW call ever fails. Signed-off-by:
Pavan Chebbi <pavan.chebbi@broadcom.com> Signed-off-by:
Michael Chan <michael.chan@broadcom.com> Link: https://lore.kernel.org/r/20231212005122.2401-14-michael.chan@broadcom.comSigned-off-by:
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Pavan Chebbi authored
We don't have to close and open the nic to make sure we have valid rx timestamps. Once we have the timestamp filter applied to the HW and the timestamp_fld_format bit is cleared in the rx completion and the timestamp is non-zero, we can be sure that rx timestamp is valid data. Skip close/open when we set any timestamp filter. Reviewed-by:
Andy Gospodarek <andrew.gospodarek@broadcom.com> Signed-off-by:
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Michael Chan authored
The new 5760X chips supports UDP GSO. Tested using udpgso_bench_tx. Reviewed-by:
Somnath Kotur <somnath.kotur@broadcom.com> Signed-off-by:
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Damodharam Ammepalli authored
rx_filter_miss counter is newly added to the rx_port_stats_ext stats structure for newer chips. Newer firmware will return the structure size that includes this counter. Add this entry to the bnxt_port_stats_ext_arr array and the ethtool -S code will pick up this counter if it is supported. Signed-off-by:
Damodharam Ammepalli <damodharam.ammepalli@broadcom.com> Signed-off-by:
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Michael Chan authored
On the new P7 chips, TPA for tunnel packets can be independently enabled for each VNIC. The default TPA configuration should not include UDP tunnels because the UDP ports for these tunnels are not known yet. The chip should not aggregate these UDP tunneled packets using default UDP ports until the ports are known. Add a new function bnxt_hwrm_vnic_update_tunl_tpa() to enable VXLAN and Geneve TPA if the corresponding UDP ports are known. Reviewed-by:
Ajit Khaparde <ajit.khaparde@broadcom.com> Signed-off-by:
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Michael Chan authored
Add a new bnxt_udp_tunnels_p7 struct to support the new P7 chips that can parse VXLAN GPE packets. Add VXLAN GPE tunnel type handling to the .set_port() and .unset_port() functions. .ndo_features_check() is also enhanced to support VXLAN GPE which may encapsulate inner IP packets instead of ethernet packets. Reviewed-by:
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Michael Chan authored
In bnxt_udp_tunnel_set_port(), use the proper ALLOC commands instead of the FREE commands for correctness. The ALLOC and FREE commands happen to be identical so this is just a cosmetic fix for correctness. Reviewed-by:
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Selvin Xavier authored
The Fast QP modify destroy RoCE feature requires additional QP entries in QP context backing store. FW reports the extra count to be allocated during backing store query. Use this value and allocate extra memory. Note that this works for both the V1 and V1 backing store FW APIs. Signed-off-by:
Selvin Xavier <selvin.xavier@broadcom.com> Signed-off-by:
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Michael Chan authored
TX coalesced completions are supported on newer chips to provide one TX completion record for multiple TX packets up to the sq_cons_idx in the completion record. This method saves PCIe bandwidth by reducing the number of TX completions. Only very minor changes are now required to support this mode with the new framework that handles TX completions based on the consumer indices. Signed-off-by:
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Michael Chan authored
If xmit_more condition is true, the driver may set the TX_BD_FLAGS_NO_CMPL flag. If after this packet, the TX ring can no longer hold a packet with maximum fragments, we will stop the TX queue. When this happens, we must clear the TX_BD_FLAGS_NO_CMPL flag on the last packet or there will be no completion and cause TX timeout. Fixes: c1056a59 ("bnxt_en: Optimize xmit_more TX path") Reviewed-by:
Hongguang Gao <hongguang.gao@broadcom.com> Signed-off-by:
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Michael Chan authored
Two spots were missed when modifying the TX ring indexing logic. The use of unmasked TX index in bnxt_tx_int() will cause unnecessary __bnxt_tx_int() calls. The same issue in bnxt_tx_int_xdp() can result in illegal array index. Fixes: 6d1add95 ("bnxt_en: Modify TX ring indexing logic.") Signed-off-by:
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Somnath Kotur authored
_bnxt_get_max_rings() that is invoked in bnxt_check_rings() already accounts for the AGG ring(s) and gives a max value based on that. Increasing for AGG rings before calling _bnxt_get_max_rings() will result in checking for twice the number of rings than required and it can fail. Fix it by adjusting for AGG rings after calling _bnxt_get_max_rings(). Fixes: f5b29c6a ("bnxt_en: Add helper to get the number of CP rings required for TX rings") Signed-off-by:
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Michael Chan authored
The recent commit to trim the RX and TX rings on P5 chips by assigning each with max CP rings divided by 2 is not correct. Max CP rings divided by 2 may be bigger than the original RX or TX and would lead to failure. In other words, we may be checking for increased RX/TX rings than required and it may fail. Fix it by calling __bnxt_trim_rings() instead that would properly trim RX and TX without the possibility of increasing their values. Fixes: f5b29c6a ("bnxt_en: Add helper to get the number of CP rings required for TX rings") Reviewed-by:
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Justin Stitt authored
strncpy() is deprecated for use on NUL-terminated destination strings [1] and as such we should prefer more robust and less ambiguous string interfaces. We expect new_bus->id to be NUL-terminated but not NUL-padded based on its prior assignment through snprintf: | snprintf(new_bus->id, MII_BUS_ID_SIZE, "gpio-%x", bus_id); Due to this, a suitable replacement is `strscpy` [2] due to the fact that it guarantees NUL-termination on the destination buffer without unnecessarily NUL-padding. We can also use sizeof() instead of a length macro as this more closely ties the maximum buffer size to the destination buffer. Do this for two instances. Link: https://www.kernel.org/doc/html/latest/process/deprecated.html#strncpy-on-nul-terminated-strings [1] Link: https://manpages.debian.org/testing/linux-manual-4.8/strscpy.9.en.html [2] Link: https://github.com/KSPP/linux/issues/90Signed-off-by:
Justin Stitt <justinstitt@google.com> Reviewed-by:
Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Reviewed-by:
Kees Cook <keescook@chromium.org> Link: https://lore.kernel.org/r/20231211-strncpy-drivers-net-mdio-mdio-gpio-c-v3-1-76dea53a1a52@google.comSigned-off-by:
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- 12 Dec, 2023 6 commits
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git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrlJakub Kicinski authored
Linus Walleij says: ==================== Immutable tag for the PEF2256 framer * tag 'pef2256-framer' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: MAINTAINERS: Add the Lantiq PEF2256 driver entry pinctrl: Add support for the Lantic PEF2256 pinmux net: wan: framer: Add support for the Lantiq PEF2256 framer dt-bindings: net: Add the Lantiq PEF2256 E1/T1/J1 framer net: wan: Add framer framework support ==================== Link: https://lore.kernel.org/all/CACRpkdYT1J7noFUhObFgfA60XQAfL4rb=knEmWS__TKKtCMh7Q@mail.gmail.com/Signed-off-by:
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Herve Codina authored
After contributing the driver, add myself as the maintainer for the Lantiq PEF2256 driver. Signed-off-by:
Herve Codina <herve.codina@bootlin.com> Reviewed-by:
Christophe Leroy <christophe.leroy@csgroup.eu> Link: https://lore.kernel.org/r/20231128132534.258459-6-herve.codina@bootlin.comSigned-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Herve Codina authored
The Lantiq PEF2256 is a framer and line interface component designed to fulfill all required interfacing between an analog E1/T1/J1 line and the digital PCM system highway/H.100 bus. This kind of component can be found in old telecommunication system. It was used to digital transmission of many simultaneous telephone calls by time-division multiplexing. Also using HDLC protocol, WAN networks can be reached through the framer. This pinmux support handles the pin muxing part (pins RP(A..D) and pins XP(A..D)) of the PEF2256. Signed-off-by:
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Herve Codina authored
The Lantiq PEF2256 is a framer and line interface component designed to fulfill all required interfacing between an analog E1/T1/J1 line and the digital PCM system highway/H.100 bus. Signed-off-by:
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Herve Codina authored
The Lantiq PEF2256 is a framer and line interface component designed to fulfill all required interfacing between an analog E1/T1/J1 line and the digital PCM system highway/H.100 bus. Signed-off-by:
Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20231128132534.258459-3-herve.codina@bootlin.comSigned-off-by:
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Herve Codina authored
A framer is a component in charge of an E1/T1 line interface. Connected usually to a TDM bus, it converts TDM frames to/from E1/T1 frames. It also provides information related to the E1/T1 line. The framer framework provides a set of APIs for the framer drivers (framer provider) to create/destroy a framer and APIs for the framer users (framer consumer) to obtain a reference to the framer, and use the framer. This basic implementation provides a framer abstraction for: - power on/off the framer - get the framer status (line state) - be notified on framer status changes - get/set the framer configuration Signed-off-by:
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