1. 29 May, 2012 1 commit
  2. 27 May, 2012 1 commit
    • Florian Tobias Schandinat's avatar
      Merge tag 'omapdss-for-3.5' of git://github.com/tomba/linux into fbdev-next · d85d135d
      Florian Tobias Schandinat authored
      Omapdss driver changes for 3.5 merge window.
      
      Lots of normal development commits, but perhaps most notable changes are:
      
      * HDMI rework to properly decouple the HDMI audio part from the HDMI video part.
      * Restructure omapdss core driver so that it's possible to implement device
        tree support. This included changing how platform data is passed to the
        drivers, changing display device registration and improving the panel driver's
        ability to configure the underlying video output interface.
      * Basic support for DSI packet interleaving
      d85d135d
  3. 22 May, 2012 9 commits
    • Ricardo Neri's avatar
      OMAPDSS: HDMI: OMAP4: Update IRQ flags for the HPD IRQ request · e92a5b28
      Ricardo Neri authored
      genirq requires that the IRQ requests that do not provided a handler to
      use the IRQF_ONESHOT flag. This is to prevent situations in which the irq line
      is reenabled while the interrupt is still asserted. While this situation may
      not happen in edge type interrupts, genirq still requires to use IRQF_ONESHOT.
      
      Also, remove the IRQF_DISABLED as the flag is now a NOOP and has been
      deprecated.
      Signed-off-by: default avatarRicardo Neri <ricardo.neri@ti.com>
      Signed-off-by: default avatarTomi Valkeinen <tomi.valkeinen@ti.com>
      e92a5b28
    • Archit Taneja's avatar
      OMAPDSS: Apply VENC timings even if panel is disabled · c808ab9c
      Archit Taneja authored
      The VENC interfaces uses it's venc_set_timing() function to take in a new set
      of timings. If the panel is disabled, it does not disable and re-enable the
      interface. Currently, the manager timings are applied in venc_power_on(), these
      are not called by set_timings if the panel is disabled. When checking overlay
      and manager data, the DSS driver uses the last applied manager timings, and not
      the timings held by omap_dss_device struct. Hence, there is a need to apply the
      new manager timings even if the panel is disabled.
      
      Apply the manager timings if the VENC panel is disabled.
      
      This is similar to the commit below which fixed the same issue for HDMI/DPI
      interfaces:
      
      fcc36619Signed-off-by: default avatarArchit Taneja <archit@ti.com>
      Signed-off-by: default avatarTomi Valkeinen <tomi.valkeinen@ti.com>
      c808ab9c
    • Archit Taneja's avatar
      OMAPDSS: VENC/DISPC: Delay dividing Y resolution for managers connected to VENC · 2aefad49
      Archit Taneja authored
      DSS2 driver uses the timings in manager's private data to check the validity of
      overlay and manager infos written by the user. For VENC interface, we divide the
      Y resolution by half when writing to the DISPC_DIGIT_SIZE register as the
      content is interlaced. However, the height of the manager/display with respect
      to the content shown through VENC still remains the same.
      
      The VENC driver divides the y_res parameter in omap_video_timings by half, and
      then applies the configuration. This leads to manager's private data storing
      the wrong Y resolution. Hence, overlay related checks fail.
      
      Ensure that manager's private data stores the original timings, and the Y
      resolution is halved only when we write to the DISPC register. This is a hack,
      the proper solution would be to pass some sort of interlace parameter which
      makes the call whether we should divide y_res or not.
      Signed-off-by: default avatarArchit Taneja <archit@ti.com>
      Signed-off-by: default avatarTomi Valkeinen <tomi.valkeinen@ti.com>
      2aefad49
    • Chandrabhanu Mahapatra's avatar
      OMAPDSS: DISPC: Support rotation through TILER · 65e006ff
      Chandrabhanu Mahapatra authored
      TILER is a block in OMAP4's DMM which lets DSS fetch frames in a rotated manner.
      Physical memory can be mapped to a portion of OMAP's system address space called
      TILER address space. The TILER address space is split into 8 views. Each view
      represents a rotated or mirrored form of the mapped physical memory. When a
      DISPC overlay's base address is programmed to one of these views, the TILER
      fetches the pixels according to the orientation of the view. A view is further
      split into 4 containers, each container holds elements of a particular size.
      Rotation can be achieved at the granularity of elements in the container. For
      more information on TILER, refer to the Memory Subsytem section in OMAP4 TRM.
      Rotation type TILER has been added which is used to exploit the capabilities of
      these 8 views for performing various rotations.
      
      When fetching from addresses mapped to TILER space, the DISPC DMA can fetch
      pixels in either 1D or 2D bursts. The fetch depends on which TILER container we
      are accessing. Accessing 8, 16 and 32 bit sized containers requires 2D bursts,
      and page mode sized containers require 1D bursts.
      
      The DSS2 user is expected to provide the Tiler address of the view that it is
      interested in. This is passed to the paddr and p_uv_addr parameters in
      omap_overlay_info. It is also expected to provide the stride value based on the
      view's orientation and container type, this should be passed to the screen_width
      parameter of omap_overlay_info. In calc_tiler_rotation_offset screen_width is
      used to calculate the required row_inc for DISPC. x_predecim and y_predecim are
      also used to calculate row_inc and pix_inc thereby adding predecimation support
      for TILER.
      Signed-off-by: default avatarChandrabhanu Mahapatra <cmahapatra@ti.com>
      Signed-off-by: default avatarTomi Valkeinen <tomi.valkeinen@ti.com>
      65e006ff
    • Tomi Valkeinen's avatar
      OMAPDSS: VRFB: remove compiler warnings when CONFIG_BUG=n · 3cb6a1b9
      Tomi Valkeinen authored
      If CONFIG_BUG is not enabled, BUG() does not stop the execution. Many
      places in code expect the execution to stop, and this causes compiler
      warnings about uninitialized variables and returning from a non-void
      function without a return value.
      
      This patch fixes the warnings by initializing the variables and
      returning properly after BUG() lines. However, the behaviour is still
      undefined after the BUG, but this is the choice the user makes when
      using CONFIG_BUG=n.
      Signed-off-by: default avatarTomi Valkeinen <tomi.valkeinen@ti.com>
      3cb6a1b9
    • Tomi Valkeinen's avatar
      OMAPFB: remove compiler warnings when CONFIG_BUG=n · 4a75cb85
      Tomi Valkeinen authored
      If CONFIG_BUG is not enabled, BUG() does not stop the execution. Many
      places in code expect the execution to stop, and this causes compiler
      warnings about uninitialized variables and returning from a non-void
      function without a return value.
      
      This patch fixes the warnings by initializing the variables and
      returning properly after BUG() lines. However, the behaviour is still
      undefined after the BUG, but this is the choice the user makes when
      using CONFIG_BUG=n.
      Signed-off-by: default avatarTomi Valkeinen <tomi.valkeinen@ti.com>
      4a75cb85
    • Tomi Valkeinen's avatar
      OMAPDSS: remove compiler warnings when CONFIG_BUG=n · c6eee968
      Tomi Valkeinen authored
      If CONFIG_BUG is not enabled, BUG() does not stop the execution. Many
      places in code expect the execution to stop, and this causes compiler
      warnings about uninitialized variables and returning from a non-void
      function without a return value.
      
      This patch fixes the warnings by initializing the variables and
      returning properly after BUG() lines. However, the behaviour is still
      undefined after the BUG, but this is the choice the user makes when
      using CONFIG_BUG=n.
      Signed-off-by: default avatarTomi Valkeinen <tomi.valkeinen@ti.com>
      c6eee968
    • Tomi Valkeinen's avatar
      OMAPDSS: DISPC: fix usage of dispc_ovl_set_accu_uv · 36377357
      Tomi Valkeinen authored
      Commit 05dd0f53 ("OMAPDSS: DISPC: Update
      Accumulator configuration for chroma plane") adds
      dispc_ovl_set_accu_uv() function that sets the accu, but the function
      only handles YUV and NV12 modes, and BUGs otherwise.
      
      The patch also adds a call to the function, but unfortunately the place
      of call was such that the mode could be other than YUV or NV12, thus
      crashing the driver.
      
      This patchs moves the call to a slightly later spot, at which point only
      YUV and NV12 modes are handled.
      Signed-off-by: default avatarTomi Valkeinen <tomi.valkeinen@ti.com>
      Cc: Chandrabhanu Mahapatra <cmahapatra@ti.com>
      36377357
    • Tomi Valkeinen's avatar
      OMAPDSS: use DSI_FIFO_BUG workaround only for manual update displays · 3568f2a4
      Tomi Valkeinen authored
      There is a problem related to DSS FIFO thresholds and power management
      on OMAP3. It seems that when the full PM hits in, we get underflows. The
      core reason is unknown, but after experiments it looks like only
      particular FIFO thresholds work correctly.
      
      This bug is related to an earlier patch, which added special FIFO
      threshold configuration for OMAP3, because DSI command mode output
      didn't work with the normal threshold configuration.
      
      However, as the above work-around worked fine for other output types
      also, we currently always configure thresholds in this special way on
      OMAP3. In theory there should be negligible difference with this special
      way and the standard way. The first paragraph explains what happens in
      practice.
      
      This patch changes the driver to use the special threshold configuration
      only when the output is a manual update display on OMAP3. This does
      include RFBI displays also, and although it hasn't been tested (no
      boards using RFBI) I suspect the similar behaviour is present there
      also, as the DISPC side should work similarly for DSI command mode and
      RFBI.
      Signed-off-by: default avatarTomi Valkeinen <tomi.valkeinen@ti.com>
      Cc: Joe Woodward <jw@terrafix.co.uk>
      3568f2a4
  4. 21 May, 2012 1 commit
    • Archit Taneja's avatar
      OMAPDSS: DSI: Support command mode interleaving during video mode blanking periods · 6f28c296
      Archit Taneja authored
      DSI supports interleaving of command mode packets during the HSA, HFP, HBP and
      BLLP blanking intervals in a video mode stream. This is useful as a user may
      want to read or change the configuration of a panel without stopping the video
      stream.
      
      On OMAP DSI, we can queue HS or LP command mode packets in the TX FIFO, and
      the DSI HW takes care of interleaving this data during the one of the blanking
      intervals. The DSI HW needs to be programmed with the maximum amount of data
      that can be interleaved in a particular blanking period. A blanking period
      cannot be used to send command mode data for it's complete duration, there is
      some amount of time required for the DSI data and clock lanes to transition
      to the desired LP or HS state.
      
      Based on the state of the lanes at the beginning and end of the blanking period,
      we have different scenarios, with each scenario having a different value of time
      required to transition to HS or LP. Refer to the section 'Interleaving Mode' in
      OMAP TRM for more info on the scenarios and the equations to calculate the time
      required for HS or LP transitions.
      
      We use the scenarios which takes the maximum time for HS or LP transition, this
      gives us the minimum amount of time that can be used to interleave command mode
      data. The amount of data that can be sent during this minimum time is calculated
      for command mode packets both in LP and HS. These are written to the registers
      DSI_VM_TIMING4 to DSI_VM_TIMING6.
      
      The calculations don't take into account the time required of transmitting BTA
      when doing a DSI read, or verifying if a DSI write went through correctly. Until
      these latencies aren't considered, the behaviour of DSI is unpredictable when
      a BTA is interleaved during a blanking period. Enhancement of these calculations
      is a TODO item.
      
      The calculations are derived from DSI parameter calculation tools written by
      Sebastien Fagard <s-fagard@ti.com>
      Signed-off-by: default avatarArchit Taneja <archit@ti.com>
      Signed-off-by: default avatarTomi Valkeinen <tomi.valkeinen@ti.com>
      6f28c296
  5. 15 May, 2012 1 commit
    • Chandrabhanu Mahapatra's avatar
      OMAPDSS: DISPC: Update Accumulator configuration for chroma plane · 05dd0f53
      Chandrabhanu Mahapatra authored
      DISPC has two accumulator registers DISPC_VIDp_ACCU_0 and DISPC_VIDp_ACCU_1 each
      with horizontal and vertical bit fields. The bit fields can take values in the
      range of -1024 to 1023. Based on bit field values DISPC decides on which one out
      of 8 phases the filtering starts. DISPC_VIDp_ACCU_0 is used for progressive
      output and for interlaced output both DISPC_VIDp_ACCU_0 and DISPC_VIDp_ACCU_1
      are used.
      
      The current accumulator values in DISPC scaling logic for chroma plane takes
      default values for all color modes and rotation types. So, the horizontal and
      vertical up and downsampling accumulator bit field values have been updated for
      better performance.
      Signed-off-by: default avatarChandrabhanu Mahapatra <cmahapatra@ti.com>
      Signed-off-by: default avatarTomi Valkeinen <tomi.valkeinen@ti.com>
      05dd0f53
  6. 13 May, 2012 13 commits
  7. 11 May, 2012 14 commits