- 17 Apr, 2016 26 commits
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Vivien Didelot authored
Add the number of databases to the info structure. Signed-off-by:
Vivien Didelot <vivien.didelot@savoirfairelinux.com> Reviewed-by:
Andrew Lunn <andrew@lunn.ch> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Vivien Didelot authored
Drop the ps->num_ports variable in favor of a new member of the info structure. This removes the need to assign it at setup time. Signed-off-by:
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Vivien Didelot authored
Add an mv88e6xxx_family enum to the info structure for better family indentification. Signed-off-by:
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Vivien Didelot authored
Add a new switch info structure which is meant to store switch models static information, such as product number, name, number of ports, number of databases, etc. Signed-off-by:
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Vivien Didelot authored
Read the switch ID only once, at probe time, to avoid multiple read accesses and MII bus checking. Signed-off-by:
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Vivien Didelot authored
There is no point in having a special case for the revision when probing a switch model. The code gets cluttered with unnecessary defines, and leads to errors when code such as mv88e6131_setup compares PORT_SWITCH_ID_6131_B2 to ps->id which masks the revision. Drop every revision definition, and lookup only the product number. Signed-off-by:
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Vivien Didelot authored
Every driver assigns ps->ds even though it gets assigned in the shared mv88e6xxx_setup_common function. Kill redundancy. Signed-off-by:
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Vivien Didelot authored
Change the dsa_switch_driver.probe function to return a const char *. Signed-off-by:
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David S. Miller authored
Jakub Kicinski says ==================== nfp: cleanups and improvements Main purpose of this set is to get rid of doing potentially long mdelay()s but it also contains some trivial changes I've accumulated. First two patches fix harmless copy-paste errors, next two clean up the documentation and remove unused defines. Patch 5 clarifies the interpretation of RX descriptor fields. Patch 6, by far the biggest, adds ability to perform FW reconfig asynchronously thanks to which we can stop using mdelay(). ==================== Signed-off-by: -
Jakub Kicinski authored
Some callers of nfp_net_reconfig() are in atomic context so we used to busy wait for commands to complete. In worst case scenario that means locking up a core for up to 5 seconds when a command times out. Lets add a timer-based mechanism of asynchronously checking whether reconfiguration completed successfully for atomic callers to use. Non-atomic callers can now just sleep. The approach taken is quite simple because (1) synchronous reconfigurations always happen under RTNL (or before device is registered); (2) we can coalesce pending reconfigs. There is no need for request queues, timer which eventually takes a look at reconfiguration result to report errors is good enough. Signed-off-by:
Jakub Kicinski <jakub.kicinski@netronome.com> Signed-off-by:
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Jakub Kicinski authored
Meaning of data_len and meta_len RX WB descriptor fields is slightly confusing. Add a comment with a diagram clarifying the layout. Also remove the buffer length validation: (a) it's imprecise for static rx-offsets; (b) if firmware is buggy enough to DMA past the end of the buffer WARN_ON_ONCE() doesn't seem like a strong enough response. skb_put() will do the checking for us anyway. Signed-off-by:
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Jakub Kicinski authored
NFP_NET_RXR_MASK sounds like a mask which could be used on NFP_NET_CFG_RXRS_ENABLE register but its value is quite strange. In fact there are no users of this define so let's just remove it. Same for TX rings. Signed-off-by:
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Jakub Kicinski authored
Documentation in comments lacks CFG in some names. Signed-off-by:
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Jakub Kicinski authored
There is no reason for those local variables to be static. Signed-off-by:
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Jakub Kicinski authored
Correct checking error condition on wrong pointer - copy/paste mistake most likely. Signed-off-by:
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David S. Miller authored
Phil Sutter says: ==================== Minor IFF_NO_QUEUE conversion follow-up The following series converts two further drivers away from setting 'tx_queue_len = 0' to adding IFF_NO_QUEUE to priv_flags instead. The first one, rtl8188eu in staging didn't exist back when all drivers were converted. The second one, openvswitch seems to have slipped through my grep'ing back then, no idea why. ==================== Signed-off-by: -
Phil Sutter authored
Cc: Pravin Shelar <pshelar@nicira.com> Signed-off-by:
Phil Sutter <phil@nwl.cc> Signed-off-by:
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Phil Sutter authored
Cc: Jakub Sitnicki <jsitnicki@gmail.com> Signed-off-by:
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David S. Miller authored
Taku Izumi says: ==================== FUJITSU Extended Socket driver version 1.1 This patchsets update FUJITSU Extended Socket network driver into version 1.1. This mainly includes some improvements and minor bugfix. v1->v2: - Remove ioctl and debugfs facility according to David comment ==================== Signed-off-by: -
Taku Izumi authored
Signed-off-by:
Taku Izumi <izumi.taku@jp.fujitsu.com> Signed-off-by:
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Taku Izumi authored
This patch introduces spinlock of rx_status for proper excusive control. Signed-off-by:
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Taku Izumi authored
This patch enhances the fjes_change_mtu() method by introducing new flag named FJES_RX_MTU_CHANGING_DONE in rx_status. At the same time, default MTU value is changed into 65510 bytes. Signed-off-by:
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Taku Izumi authored
In fjes_raise_intr_rxdata_task(), there's a bug of bitwise check because of missing "& FJES_RX_POLL_WORK". This patch fixes this bug. Signed-off-by:
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Taku Izumi authored
There are bugs of acounting statistics in fjes_xmit_frame(). Accounting self stats is wrong. accounting stats of other EPs to be transmitted is right. This patch fixes this bug. Signed-off-by:
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Taku Izumi authored
This patch optimizes the following timeout value. - FJES_DEVICE_RESET_TIMEOUT - FJES_COMMAND_REQ_TIMEOUT - FJES_COMMAND_REQ_BUFF_TIMEOUT Signed-off-by:
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Dinh Nguyen authored
In the socfpga_dwmac_probe function, we have a call to socfpga_dwmac_setup, which is already called from socfpga_dwmac_init later in the probe function. Remove this extra call to socfpga_dwmac_setup. Also we should not be calling socfpga_dwmac_setup() directly without wrapping it around the proper reset assert/deasserts. That is because the socfpga_dwmac_setup() is setting up PHY modes in the system manager, and it is requires the EMAC's to be in reset during the PHY setup. Reported-by:
Matthew Gerlach <mgerlach@opensource.altera.com> Signed-off-by:
Dinh Nguyen <dinguyen@opensource.altera.com> Signed-off-by:
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- 16 Apr, 2016 14 commits
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Andrew Lunn authored
These macros hide a ds variable and a return statement on error, which can lead to locking issues. Kill them off. Signed-off-by:
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Alexander Duyck authored
I realized that when I added NETIF_F_TSO_MANGLEID as a TSO type I forgot to add it to NETIF_F_ALL_TSO. This patch corrects that so the flag will be included correctly. The result should be minor as it was only used by a few drivers and in a few specific cases such as when NETIF_F_SG was not supported on a device so the TSO flags were cleared. Signed-off-by:
Alexander Duyck <aduyck@mirantis.com> Signed-off-by:
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David S. Miller authored
Alexander Duyck says: ==================== Add support for offloads with IPv6 GRE tunnels This patch series enables the use of segmentation and checksum offloads with IPv6 based GRE tunnels. In order to enable this series I had to make a change to iptunnel_handle_offloads so that it would no longer free the skb. This was necessary as there were multiple paths in the IPv6 GRE code that required the skb to still be present so it could be freed. As it turned out I believe this actually fixes a bug that was present in FOU/GUE based tunnels anyway. Below is a quick breakdown of the performance gains seen with a simple netperf test passing traffic through a ip6gretap tunnel and then an i40e interface: Throughput Throughput Local Local Result Units CPU Service Tag Util Demand % 3544.93 10^6bits/s 6.30 4.656 "before" 13081.75 10^6bits/s 3.75 0.752 "after" ==================== Signed-off-by: -
Alexander Duyck authored
This patch adds code borrowed from bits and pieces of other protocols to the IPv6 GRE path so that we can support GSO over IPv6 based GRE tunnels. By adding this support we are able to significantly improve the throughput for GRE tunnels as we are able to make use of GSO. Signed-off-by:
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Alexander Duyck authored
Since GRE doesn't really care about L3 protocol we can support IPv4 and IPv6 using the same offloads. With that being the case we can add a call to register the offloads for IPv6 as a part of our GRE offload initialization. Signed-off-by:
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Alexander Duyck authored
This patch adds support for the basic offloads we support on most devices. Specifically with this patch set we can support checksum offload, basic scatter-gather, and highdma. Signed-off-by:
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Alexander Duyck authored
When we were creating an ip6gretap interface the MTU was about 6 bytes short of what was needed. It turns out we were not taking the Ethernet header into account and as a result we were eating into the 8 bytes reserved for the encap limit. Signed-off-by:
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Alexander Duyck authored
This patch updates the IP tunnel core function iptunnel_handle_offloads so that we return an int and do not free the skb inside the function. This actually allows us to clean up several paths in several tunnels so that we can free the skb at one point in the path without having to have a secondary path if we are supporting tunnel offloads. In addition it should resolve some double-free issues I have found in the tunnels paths as I believe it is possible for us to end up triggering such an event in the case of fou or gue. Signed-off-by:
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David S. Miller authored
Akinobu Mita says: ==================== net: w5100: add support W5100/W5200 for SPI interface This series add support for Wiznet W5100 and W5200 for SPI interface. We can easily find the ethernet modules and shield for Arduino with these chips for purchase. I've tested them with BeagleBone. Wiznet W5100 for mmio access has already supported by w5100 driver. In order to share the code between mmio mode and SPI mode, this series firstly adds ability to support another register access interface to the existing w5100 driver. This ground work also requires to introduce workqueue and threaded irq because SPI transfers are callable only from contexts that can sleep unlike mmio access. The latter part of this series adds w5100-spi driver which actually support W5100 and W5200 for SPI interface. Supporting W5100 is straight forward because it only required to add a register access interface by the SPI transfer. W5100 and W5200 have similar memory map which justifies adding W5200 support to w5100 driver. * Changes from v2 to v3 - Add comment for reg_lock - Add ability to allocate ops specific data structure - Allocate w5200 ops specific data structure to put DMA-safe buffer - Add missing chip_id assignment for w5100_*_ops * Changes from v1 to v2 - Use a plain single pointer instead of SKB queue, spotted by David S. Miller - Correct timeout period in w5100_command - Use spi_write_then_read instead of spi_write which needs DMA-safe buffer - Support W5200 ==================== Signed-off-by: -
Akinobu Mita authored
This adds support for W5200 chip. W5100 and W5200 have similar memory map although some of their offsets are different. The register access sequences between them are different but w5100 driver has abstraction layer for difference bus interface modes so it is easy to add W5200 support to w5100 and w5100-spi drivers. Signed-off-by:
Akinobu Mita <akinobu.mita@gmail.com> Cc: Mike Sinkovsky <msink@permonline.ru> Cc: David S. Miller <davem@davemloft.net> Signed-off-by:
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Akinobu Mita authored
This adds new w5100-spi driver which shares the bus interface independent code with existing w5100 driver. Signed-off-by:
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Akinobu Mita authored
SPI transfer routines are callable only from contexts that can sleep. This adds ability to tell the core driver that the interface mode cannot access w5100 register on atomic contexts. In this case, workqueue and threaded irq are required. This also corrects timeout period waiting for command register to be automatically cleared because the latency of the register access with SPI transfer can be interfered by other contexts. Signed-off-by:
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Akinobu Mita authored
The w5100 driver currently only supports direct and indirect bus interface mode which use MMIO space for accessing w5100 registers. In order to support SPI interface mode which is supported by W5100 chip, this makes the bus interface abstraction layer more generic so that separated w5100-spi driver can use w5100 driver as core module. Signed-off-by:
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Akinobu Mita authored
Instead of sprinkle mmiowb over the driver code, move it into primary register write callbacks. (w5100_write, w5100_write16, w5100_writebuf) This is a preparation for supporting SPI interface which doesn't use MMIO for accessing w5100 registers. Signed-off-by:
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