- 23 Oct, 2017 1 commit
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Jani Nikula authored
Signed-off-by:Jani Nikula <jani.nikula@intel.com>
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- 20 Oct, 2017 4 commits
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Rodrigo Vivi authored
Starting on CNL we now need to map VBT DDC Pin to BSPec DDC Pin values. Not a direct translation anymore. According to VBT Block 2 (General Bytes Definition) DDC Bus +----------+-----------+--------------------+ | DDI Type | VBT Value | Bspec Mapped Value | +----------+-----------+--------------------+ | DDI-B | 0x1 | 0x1 | | DDI-C | 0x2 | 0x2 | | DDI-D | 0x3 | 0x4 | | DDI-F | 0x4 | 0x3 | +----------+-----------+--------------------+ v2: Move defines to a better place. This is actually CNL_PCH not CNL only. v3: Accepting Ville's suggestions: enums and array to to make this future proof. v4: Protect the array access as Ville suggested. Also accepting all Jani's suggestions: - use already defined gmbus pin definitions. - use map_ddc_pin for disambiguation. - Add /* sic */ comment on inverted values so people can easily see it it nos a mistake we have the map 3 -> 4 and 4 -> 3 :/ Cc: Jani Nikula <jani.nikula@intel.com> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> Cc: Anusha Srivatsa <anusha.srivatsa@intel.com> Cc: Clinton Taylor <clinton.a.taylor@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by:Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by:
Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20171020172641.16029-1-rodrigo.vivi@intel.com
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Rodrigo Vivi authored
No functional change expected. Just let's use this enum when possible and also same standard pll_id name so we can rework gen9+ port clock later. Cc: Mika Kahola <mika.kahola@intel.com> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by:
Mika Kahola <mika.kahola@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20171018195407.8618-1-rodrigo.vivi@intel.com
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Madhav Chauhan authored
This patch re-use already parsed DSI backlight/cabc ports info for saving it inside struct intel_dsi rather than parsing it at the time of DSI initialization. V2: Remove backlight and cabc variable initialization (Jani N). Reviewed-by:
Madhav Chauhan <madhav.chauhan@intel.com> Signed-off-by:
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Madhav Chauhan authored
This patch parse DSI backlight/cabc ports info from VBT and save them inside local structure. This saved info can be directly used while initializing DSI for different platforms instead of parsing for each platform. V2: Changes: - Typo fix in commit message. - Move up newly added port variables (Jani N) - Remove redundant initialization (Jani N) - Don't parse CABC ports if not supported (Jani N) V3: Patch restructure (Suggested by Jani N) Credits-to: Jani Nikula <jani.nikula@intel.com> Signed-off-by:
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- 19 Oct, 2017 13 commits
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Chris Wilson authored
If the device is in runtime suspend, resuming takes time and reduces our powersaving. If this was for a small write into an object, that resume will take longer than any savings in using the indirect GGTT access to avoid the cpu cache. Signed-off-by:
Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by:
Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20171019063733.31620-1-chris@chris-wilson.co.uk
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Jani Nikula authored
Only the DDI hook has some actual content. Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by:
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Jani Nikula authored
They're unused and unsupported. Leave the reduced_clock pointers in place still, should they prove useful later on. v2: go from nuking DDI lowfreq_avail to nuking it entirely (Ville) Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Suggested-by:
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Ville Syrjälä authored
A bunch of functions are now exclusively used for HDMI, so naming the variables with hdmi prefix/suffix is redundant. Also use int rather than u32 for the translation level consistently. v2: Rebase due to hdmi_level=-1 avoidance Cc: James Ausmus <james.ausmus@intel.com> Signed-off-by:
James Ausmus <james.ausmus@intel.com>
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Ville Syrjälä authored
Handle missing buf trans tables, or out of bounds buf trans levels the same way everywhere. These should never be hit under normal conditions, but let's play it safe for now. v2: Avoid the hdmi_level=-1 case (James) Cc: James Ausmus <james.ausmus@intel.com> Signed-off-by:
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Ville Syrjälä authored
SKL DDI B/C/D only have 9 usable buf trans registers for DP/eDP. That matches the normal DP buf trans tables, but the low vswing eDP tables have 10 entries. Thus the eDP tables can only be used safely with DDI A and E. We try to catch cases where DDI B/C/D gets used with the wrong number of entires in some parts of the code, but not everywhere. Let's move the code to deal with that deeper into intel_ddi_get_buf_trans_edp(). And for sake of symmetry do the same in intel_ddi_get_buf_trans_dp(). That would also avoid explosions in the rather unlikely case that the DP tables would get revised to 10 entries as well. Signed-off-by:
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Ville Syrjälä authored
default_index contained in the BXT buf_trans tables is actually useless. For DP we should always have a valid level selected (otherwise the link training logic would be buggy), and for HDMI we can just do what the other platforms do and pick the correct entry in intel_ddi_hdmi_level(). Signed-off-by:
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Ville Syrjälä authored
encoder->type is unreliable for DP/HDMI, so pass it in explicity into cnl_ddi_vswing_sequence(). This matches what we do for BXT. v2: Pass intel_encoder down to cnl_ddi_vswing_program(), and clean up the argument types while at it Signed-off-by: -
Ville Syrjälä authored
Make BXT less special by following the CNL approach and handling it in intel_ddi_dp_voltage_max() alognside every other DDI platform. v2: Clean up the argument types to bxt_ddi_vswing_sequence() while at it Signed-off-by:
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Ville Syrjälä authored
The caller of intel_prepare_hdmi_ddi_buffers() alreday figured out the level, so let's just pass it in instead if figuring it out again. Signed-off-by:
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Ville Syrjälä authored
encoder->type isn't reliable for DP/HDMI encoders, so pass the type explicity to skl_set_iboost(). Also take the opportunity to streamline the code. v2: Clean up the argument types to skl_ddi_set_iboost() while at it Signed-off-by:
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Ville Syrjälä authored
Introduce intel_ddi_get_buf_trans_hdmi() and start using it where we can. Signed-off-by:
Manasi Navare <manasi.d.navare@intel.com>
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Ville Syrjälä authored
We'll want to use the intel_ddi_get_buf_trans_*() functions a bit earlier in the file, so move them up. While at it start using them in the iboost setup to get rid of the platform checks there. v2: Rebase due to BDW FDI buf trans fix Signed-off-by:
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- 18 Oct, 2017 10 commits
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Chris Wilson authored
After being requested to idle the GPU, flush the idle worker to drop the residual active state, and any internal object caches. v2: By popular demand, introduce DROP_IDLE for fine-grained control from userspace, though it should be used as part of a DROP_ACTIVE | DROP_RETIRE | DROP_IDLE | DROP_FREED sequence. v3: Convert to BIT() to sell it to Joonas. References: https://bugs.freedesktop.org/show_bug.cgi?id=102655Signed-off-by:
Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
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Juha-Pekka Heikkila authored
This is to use clipped y coordinate here. I left get_crtc_fence_y_offset() function itself in place as oneliner to maintain comment above it why this is done. Signed-off-by:
Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com> Signed-off-by:
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Juha-Pekka Heikkila authored
Don't handle skylake primary plane separately as it is similar plane as the others. Signed-off-by:
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Juha-Pekka Heikkila authored
Don't handle skylake primary plane separately as it is similar plane as the others. Signed-off-by:
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Juha-Pekka Heikkila authored
Move u32 dspaddr_offset from struct intel_crtc member into local variable in i9xx_update_primary_plane() Signed-off-by:
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Juha-Pekka Heikkila authored
Move adjusted_x/y from crtc to fbc cache. Signed-off-by:
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Kees Cook authored
In preparation for unconditionally passing the struct timer_list pointer to all timer callbacks, switch to using the new timer_setup() and from_timer() to pass the timer pointer explicitly. Cc: Daniel Vetter <daniel.vetter@intel.com> Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: David Airlie <airlied@linux.ie> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Cc: Oscar Mateo <oscar.mateo@intel.com> Cc: intel-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Signed-off-by:
Kees Cook <keescook@chromium.org> Reviewed-by:
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Harsha Sharma authored
Replace instances of drm_framebuffer_reference/unreference() with *_get/put() suffixes and drm_dev_unref with *_put() suffix because get/put is shorter and consistent with the kernel use of *_get/put suffixes. Done with following coccinelle semantic patch @@ expression ex; @@ ( -drm_framebuffer_unreference(ex); +drm_framebuffer_put(ex); | -drm_dev_unref(ex); +drm_dev_put(ex); | -drm_framebuffer_reference(ex); +drm_framebuffer_get(ex); ) Signed-off-by:
Harsha Sharma <harshasharmaiitr@gmail.com> Signed-off-by:
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Jani Nikula authored
Needed for timer_setup() and drm_dev_{get,put}() conversions in i915. Signed-off-by: -
Tvrtko Ursulin authored
Avoid dereferencing the error pointer and also avoid returning NULL from i915_mmu_notifier_find since the callers do not expect that. Signed-off-by:
Tvrtko Ursulin <tvrtko.ursulin@intel.com> Reported-by:
Dan Carpenter <dan.carpenter@oracle.com> Fixes: 7741b547 ("drm/i915: Preallocate our mmu notifier workequeu to unbreak cpu hotplug deadlock") Cc: Dan Carpenter <dan.carpenter@oracle.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Reviewed-by:
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- 17 Oct, 2017 10 commits
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Oscar Mateo authored
Otherwise we are blasting other bits in GEN8_L3SQCREG1 that might be important (although we probably aren't at the moment because 0 seems to be the default for all the other bits). v2: Extra parentheses (Michel) Fixes: 050fc465 ("drm/i915:bxt: implement WaProgramL3SqcReg1DefaultForPerf") Fixes: 450174fe ("drm/i915/chv: Tune L3 SQC credits based on actual latencies") Signed-off-by:
Oscar Mateo <oscar.mateo@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Imre Deak <imre.deak@intel.com> Reviewed-by:
Michel Thierry <michel.thierry@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/1508271945-14961-1-git-send-email-oscar.mateo@intel.comSigned-off-by:
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Oscar Mateo authored
Now that we write RING_FORCE_TO_NONPRIV registers directly to hardware, [commit 32ced39c ("drm/i915: Transform whitelisting WAs into a simple reg write")] there is no need to save space for them in the list of context workarounds. v2: Refer to previous commit in commit message (Michel) Signed-off-by:
Mika Kuoppala <mika.kuoppala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/1508272071-15125-1-git-send-email-oscar.mateo@intel.comSigned-off-by:
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Michal Wajdeczko authored
Debugfs for GuC and HuC load info have similar common part. Move and update dump of uc_fw to separate helper for reuse. Signed-off-by:
Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20171017094449.22584-1-michal.wajdeczko@intel.comReviewed-by:
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James Ausmus authored
Make intel_dp_add_mst_connector handle error returns from the drm_ calls. Add intel_connector_free to support cleanup on the error path. v2: Rename new function to avoid confusion, and simplify error paths (Ville) v3: Indentation fixup, style fixes (Ville) v4: Clarify usage of intel_connector_free, and fix usage of intel_connector_free v5: Rebase Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by:
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Chris Wilson authored
It should be impossible for these tests not to run due to an empty ppgtt, but if it should happen, let's report ENODEV (our typical internal error for impossible events). In file included from drivers/gpu/drm/i915/i915_gem.c:5415: drivers/gpu/drm/i915/selftests/huge_pages.c: In function 'igt_mock_ppgtt_huge_fill': >> drivers/gpu/drm/i915/selftests/huge_pages.c:612: error: 'err' may be used uninitialized in this function drivers/gpu/drm/i915/selftests/huge_pages.c: In function 'igt_ppgtt_exhaust_huge': drivers/gpu/drm/i915/selftests/huge_pages.c:1159: error: 'err' may be used uninitialized in this function Reported-by: kbuild-all@01.org Signed-off-by:
Matthew Auld <matthew.auld@intel.com>
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Chris Wilson authored
When pwriting into shmemfs, the fast path pagecache_write does not notice when it is writing to beyond the end of the truncated shmemfs inode. Report -EFAULT directly when we try to use pwrite into the !I915_MADV_WILLNEED object. Fixes: 7c55e2c5 ("drm/i915: Use pagecache write to prepopulate shmemfs from pwrite-ioctl") Testcase: igt/gem_madvise/dontneed-before-pwrite Signed-off-by:
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Ville Syrjälä authored
Now that the infoframe hooks are part of the intel_dig_port, we can use the normal .write_infoframe() hook to update the VSC SDP. We do need to deal with the size difference between the VSC DIP and the others though. Another minor snag is that the compiler will complain to use if we keep using enum hdmi_infoframe_type type and passing in the DP define instead, so et's just change to unsigned int all over for the inforframe type. v2: Rebase due to other PSR changes Reviewed-by:
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Dave Airlie authored
In order to implement plane leasing we need to count things, just make the code consistent with the counting code currently used for counting crtcs/encoders/connectors and drop the need for num_overlay_planes. v2: don't forget to assign plane_ptr. (keithp) v3: use correct bounds check, found by igt. Reviewed-by:
Sean Paul <seanpaul@chromium.org> Signed-off-by:
Dave Airlie <airlied@redhat.com>
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https://github.com/jsarha/linuxDave Airlie authored
tilcdc changes for v4.15 * tag 'tilcdc-4.15' of https://github.com/jsarha/linux: drm/tilcdc: Remove redundant OF_DETACHED flag setting drm/tilcdc: Precalculate total frametime in tilcdc_crtc_set_mode() drm/tilcdc: Use tilcdc_crtc_shutdown() in tilcdc_crtc_destroy() drm/tilcdc: Remove WARN_ON(!drm_modeset_is_locked(&crtc->mutex)) checks drm/tilcdc: Turn raster off in crtc reset, if it was on in the HW drm/tilcdc: switch to drm_*{get,put} helpers drm/tilcdc: tilcdc_tfp410: make of_device_ids const. drm/tilcdc: tilcdc_panel: make of_device_ids const.
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git://anongit.freedesktop.org/drm/drm-miscDave Airlie authored
Quick 4.15 misc pull for the build fix: Cross-subsystem Changes: - piles an piles of misc/trivial patches all over, some more from outreachy applicants Core Changes: - build fix for the bridge/of cleanup (Maarten) - fix vblank count in arm_vblank_event (Ville) - some kerneldoc typo fixes from Thierry Driver Changes: - vc4: Fix T-format tiling scanout, cleanup clock divider w/a (Anholt) - sun4i: small cleanups and improved code comments all over (Chen-Yu Tsai) * tag 'drm-misc-next-2017-10-16' of git://anongit.freedesktop.org/drm/drm-misc: (21 commits) drm/via: use ARRAY_SIZE drm/gma500: use ARRAY_SIZE drm/sun4i: hdmi: Move PAD_CTRL1 setting to mode_set function drm/sun4i: hdmi: Document PAD_CTRL1 output invert bits drm/sun4i: backend: Add comment explaining why registers are cleared drm/sun4i: backend: Use drm_fb_cma_get_gem_addr() to get display memory drm/sun4i: backend: Create regmap after access is possible drm/sun4i: don't add components that are already in the queue drm/vc4: Fix pitch setup for T-format scanout. drm/vc4: Move the DSI clock divider workaround closer to the clock call. drm: Replace kzalloc with kcalloc drm/tinydrm: Remove explicit .best_encoder assignment drm/tinydrm: Replace dev_error with DRM_DEV_ERROR drm/drm_of: Move drm_of_panel_bridge_remove_function into header. drm/atomic-helper: Fix reference to drm_crtc_send_vblank_event() drm/atomic-helper: Fix typo drm: Add missing __user annotation to drm_syncobj_array_find() drm/rockchip: add PINCTRL dependency for LVDS drm/kirin: Checking for IS_ERR() instead of NULL driver:gpu: return -ENOMEM on allocation failure. ...
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- 16 Oct, 2017 2 commits
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Rodrigo Vivi authored
HDMI Mode selection on CNL is on CFGCR0 for that PLL, not on in a global CTRL1 as it was on SKL. The original patch addressed this difference, but leaving behind this single entry here. So we were checking the wrong bits during the PLL initialization and consequently avoiding the CFGCR1 setup during HDMI initialization. Luckly when only HDMI was in use BIOS had already setup this for us. But the dual display with hot plug were messed up. Fixes: a927c927 ("drm/i915/cnl: Initialize PLLs") Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> Cc: Manasi Navare <manasi.d.navare@intel.com> Cc: Kahola, Mika <mika.kahola@intel.com> Signed-off-by:
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Rodrigo Vivi authored
On PLL Enable sequence we need to "Configure DPCLKA_CFGCR0 to turn on the clock for the DDI and map the DPLL to the DDI" So we first do the map and then we unset DDI_CLK_OFF to turn the clock on. We do this in 2 separated steps. However, on this second step where we should only unset the off bit we are also unmapping the ddi from the pll. So we end up using the pll 0 for almost everything. Consequently breaking cases with more than one display. Fixes: 555e38d2 ("drm/i915/cnl: DDI - PLL mapping") Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> Cc: Manasi Navare <manasi.d.navare@intel.com> Cc: Kahola, Mika <mika.kahola@intel.com> Signed-off-by:
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