- 09 Jul, 2014 16 commits
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Ben Dooks authored
Change the initial print to show chip version and the bus rate it is working at instead of the driver version. This is more useful information as we already know which driver version from the kernel it is in. Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Markus Pargmann authored
Remove those unused ret variables to make it obvious that these function will not return any errors in the current implementation. Signed-off-by: Markus Pargmann <mpa@pengutronix.de> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Tim Kryger authored
Switch the common SDHCI code over to use mmc_host's regulator pointers and remove the ones in the sdhci_host structure. Additionally, use the common mmc_regulator_get_supply function to get the regulators and set the ocr_avail mask. This change sets the ocr_avail directly based upon the voltage ranges supported which ensures ocr_avail is set correctly while allowing the use of regulators that can't provide exactly 1.8v, 3.0v, or 3.3v. Signed-off-by: Tim Kryger <tim.kryger@gmail.com> Signed-off-by: Markus Mayer <markus.mayer@linaro.org> Reviewed-by: Matt Porter <mporter@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Ulf Hansson authored
The runtime PM core handles a runtime_idle callback set to NULL as one returning 0. So, let's just set it to NULL instead. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
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Srinivas Kandagatla authored
This patch adds a fake Qualcomm ID 0x00051180 to the amba_ids, as Qualcomm SDCC controller is pl180, but amba id registers read 0x0's. The plan is to remove SDCC driver totally and use mmci as the main SD controller driver for Qualcomm SOCs. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Srinivas Kandagatla authored
MCIFIFOCNT register behaviour on Qcom chips is very different than the other pl180 integrations. MCIFIFOCNT register contains the number of words that are still waiting to be transferred through the FIFO. It keeps decrementing once the host CPU reads the MCIFIFO. With the existing logic and the MCIFIFOCNT behaviour, mmci_pio_read will loop forever, as the FIFOCNT register will always return transfer size before reading the FIFO. Also the data sheet states that "This register is only useful for debug purposes and should not be used for normal operation since it does not reflect data which may or may not be in the pipeline". This patch implements a qcom specific get_rx_fifocnt function which is implemented based on status register flags. Based on qcom_fifo flag in variant data structure, the corresponding get_rx_fifocnt function is selected. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Srinivas Kandagatla authored
On Controllers like Qcom SD card controller where cclk is mclk and mclk should be directly controlled by the driver. This patch adds support to control mclk directly in the driver, and also adds explicit_mclk_control flag in variant structure giving more flexibility to the driver. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> [Ulf Hansson] Fixed checkpatch warning Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Srinivas Kandagatla authored
Some of the controller have maximum supported frequency, This patch adds support in variant data structure to specify such restrictions. This gives more flexibility in calculating the f_max before passing it to mmc-core. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Srinivas Kandagatla authored
On some SOCs like Qcom there are explicit bits in the command register to specify if its a data transfer command or not. So this patch adds support to such bits in variant data, giving more flexibility to the driver. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Srinivas Kandagatla authored
This patch adds edge support for data and command out to variant structure giving more flexibility to the driver to support more SOCs which have different clock register layout. Without this patch other new SOCs like Qcom will have to add more code to special case them Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> [Ulf Hansson] Resolved conflict Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Srinivas Kandagatla authored
This patch adds 8bit bus enable to variant structure giving more flexibility to the driver to support more SOCs which have different clock register layout. Without this patch other new SOCs like Qcom will have to add more code to special case them. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> [Ulf Hansson] Resolved conflict Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Srinivas Kandagatla authored
This patch adds ddrmode mask to variant structure giving more flexibility to the driver to support more SOCs which have different datactrl register layout. Without this patch datactrl register is updated with incorrect ddrmode mask, resulting in failures on Qualcomm SD Card Controller. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> [Ulf Hansson] Resolved conflict Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Srinivas Kandagatla authored
Instance of this IP on Qualcomm's SOCs has bit different layout for datactrl register. Bit position datactrl[16:4] hold the true block size instead of power of 2. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Srinivas Kandagatla authored
On Qcom SD Card controller POWER, CLKCTRL, DATACTRL and COMMAND registers should be updated in MCLK domain, and writes to these registers must be separated by three MCLK cycles. This resitriction is not applicable for other registers. Any subsequent writes to these register will be ignored until 3 MCLK have passed. One usec delay between two CMD register writes is not sufficient in the card identification phase where the CCLK is very low. This patch replaces a static 1 usec delay to use mmci_reg_delay function which can provide correct delay depending on the cclk frequency. Without this patch the card is not detected. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Srinivas Kandagatla authored
This patch adds a Qualcomm SD Card controller specific register variations to header file. Qualcomm SDCC controller is pl180, with slight changes in the register layout from standard pl180 register set. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Srinivas Kandagatla authored
This patch replaces a constant used in calculating timeout with a proper macro. This is make code more readable. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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- 06 Jul, 2014 4 commits
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Linus Torvalds authored
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git://git.secretlab.ca/git/linuxLinus Torvalds authored
Pull devicetree bugfix from Grant Likely: "Important bug fix for parsing 64-bit addresses on 32-bit platforms. Without this patch the kernel will try to use memory ranges that cannot be reached" * tag 'dt-for-linus' of git://git.secretlab.ca/git/linux: of: Check for phys_addr_t overflows in early_init_dt_add_memory_arch
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git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsiLinus Torvalds authored
Pull SCSI fixes from James Bottomley: "This is a set of 13 fixes, a MAINTAINERS update and a sparse update. The fixes are mostly correct value initialisations, avoiding NULL derefs and some uninitialised pointer avoidance. All the patches have been incubated in -next for a few days. The final patch (use the scsi data buffer length to extract transfer size) has been rebased to add a cc to stable, but only the commit message has changed" * tag 'scsi-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi: [SCSI] use the scsi data buffer length to extract transfer size virtio-scsi: fix various bad behavior on aborted requests virtio-scsi: avoid cancelling uninitialized work items ibmvscsi: Add memory barriers for send / receive ibmvscsi: Abort init sequence during error recovery qla2xxx: Fix sparse warning in qla_target.c. bnx2fc: Improve stats update mechanism bnx2fc: do not scan uninitialized lists in case of error. fc: ensure scan_work isn't active when freeing fc_rport pm8001: Fix potential null pointer dereference and memory leak. MAINTAINERS: Update LSILOGIC MPT FUSION DRIVERS (FC/SAS/SPI) maintainers Email IDs be2iscsi: remove potential junk pointer free be2iscsi: add an missing goto in error path scsi_error: set DID_TIME_OUT correctly scsi_error: fix invalid setting of host byte
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git://people.freedesktop.org/~airlied/linuxLinus Torvalds authored
Pull drm fixes from Dave Airlie: "i915, tda998x and vmwgfx fixes, The main one is i915 fix for missing VGA connectors, along with some fixes for the tda998x from Russell fixing some modesetting problems. (still on holidays, but got a spare moment to find these)" * 'drm-fixes' of git://people.freedesktop.org/~airlied/linux: drm/vmwgfx: Fix incorrect write to read-only register v2: drm/i915: Drop early VLV WA to fix Voltage not getting dropped to Vmin drm/i915: only apply crt_present check on VLV drm/i915: Wait for vblank after enabling the primary plane on BDW drm/i2c: tda998x: add some basic mode validation drm/i2c: tda998x: faster polling for edid drm/i2c: tda998x: move drm_i2c_encoder_destroy call
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- 05 Jul, 2014 12 commits
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git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-socLinus Torvalds authored
Pull ARM SoC fixes from Olof Johansson: "This week's arm-soc fixes: - A set of of OMAP patches that we had missed Tony's pull request of: * Reset fix for am43xx * Proper OPP table for omap5 * Fix for SoC detection of one of the DRA7 SoCs * hwmod updates to get SATA and OCP to work on omap5 (drivers merged in 3.16) * ... plus a handful of smaller fixes - sunxi needed to re-add machine specific restart code that was removed in anticipation of a watchdog driver being merged for 3.16, and it didn't make it in. - Marvell fixes for PCIe on SMP and a big-endian fix. - A trivial defconfig update to make my capri test board boot with bcm_defconfig again. ... and a couple of MAINTAINERS updates, one to claim new Keystone drivers that have been merged, and one to merge MXS and i.MX (both Freescale platforms). The largest diffs come from the hwmod code for omap5 and the re-add of the restart code on sunxi. The hwmod stuff is quite late at this point but it slipped through cracks repeatedly while coming up the maintainer chain and only affects the one SoC so risk is low" * tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: MAINTAINERS: Add few more Keystone drivers MAINTAINERS: merge MXS entry into IMX one ARM: sunxi: Reintroduce the restart code for A10/A20 SoCs ARM: mvebu: fix cpuidle implementation to work on big-endian systems ARM: mvebu: update L2/PCIe deadlock workaround after L2CC cleanup ARM: mvebu: move Armada 375 external abort logic as a quirk ARM: bcm: Fix bcm and multi_v7 defconfigs ARM: dts: dra7-evm: remove interrupt binding ARM: OMAP2+: Fix parser-bug in platform muxing code ARM: DTS: dra7/dra7xx-clocks: ATL related changes ARM: OMAP2+: drop unused function ARM: dts: am43x-epos-evm: Add Missing cpsw-phy-sel for am43x-epos-evm ARM: dts: omap5: Update CPU OPP table as per final production Manual ARM: DRA722: add detection of SoC information ARM: dts: Enable twl4030 off-idle configuration for selected omaps ARM: OMAP5: hwmod: Add ocp2scp3 and sata hwmods ARM: OMAP2+: hwmod: Change hardreset soc_ops for AM43XX
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git://git.kernel.org/pub/scm/linux/kernel/git/tip/tipLinus Torvalds authored
Pull irq fixes from Thomas Gleixner: "A few minor fixlets in ARM SoC irq drivers and a fix for a memory leak which I introduced in the last round of cleanups :(" * 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: genirq: Fix memory leak when calling irq_free_hwirqs() irqchip: spear_shirq: Fix interrupt offset irqchip: brcmstb-l2: Level-2 interrupts are edge sensitive irqchip: armada-370-xp: Mask all interrupts during initialization.
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git://anongit.freedesktop.org/drm-intelDave Airlie authored
Fixes for 3.16-rc3; most importantly Jesse brings back VGA he took away on a bunch of machines. Also a vblank fix for BDW and a power workaround fix for VLV. * tag 'drm-intel-fixes-2014-07-03' of git://anongit.freedesktop.org/drm-intel: drm/i915: Drop early VLV WA to fix Voltage not getting dropped to Vmin drm/i915: only apply crt_present check on VLV drm/i915: Wait for vblank after enabling the primary plane on BDW
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git://people.freedesktop.org/~thomash/linuxDave Airlie authored
fix to a 3.15 commit. * 'vmwgfx-fixes-3.16' of git://people.freedesktop.org/~thomash/linux: drm/vmwgfx: Fix incorrect write to read-only register v2:
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git://ftp.arm.linux.org.uk/~rmk/linux-cuboxDave Airlie authored
mode fixes for tda998x. * 'tda998x-fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-cubox: drm/i2c: tda998x: add some basic mode validation drm/i2c: tda998x: faster polling for edid drm/i2c: tda998x: move drm_i2c_encoder_destroy call
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Keith Busch authored
irq_free_hwirqs() always calls irq_free_descs() with a cnt == 0 which makes it a no-op since the interrupt count to free is decremented in itself. Fixes: 7b6ef126Signed-off-by: Keith Busch <keith.busch@intel.com> Acked-by: David Rientjes <rientjes@google.com> Link: http://lkml.kernel.org/r/1404167084-8070-1-git-send-email-keith.busch@intel.comSigned-off-by: Thomas Gleixner <tglx@linutronix.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linuxLinus Torvalds authored
Pull ARM64 fixes from Catalin Marinas: - Exception level check at boot time (for completeness, not triggering any bug before) - I/D-cache synchronisation logic for huge pages - Config symbol typo * tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: arm64: fix el2_setup check of CurrentEL arm64: mm: Make icache synchronisation logic huge page aware arm64: mm: Fix horrendous config typo
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Santosh Shilimkar authored
Update MAINTAINERS file for recently added reset controller, AEMIF and clocksource driver for Keystone SOCs. The EMIF memory controller driver is also added along with AEMIF. Cc: Arnd Bergmann <arnd@arndb.de> Cc: Olof Johansson <olof@lixom.net> Cc: Kevin Hilman <khilman@linaro.org> Cc: Mike Turquette <mturquette@linaro.org> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Olof Johansson <olof@lixom.net>
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Shawn Guo authored
The mach-mxs platform is actually co-maintained by myself and pengutronix folks. Also it's hosted in the same kernel tree as IMX. So let's merge the entry into IMX one. Signed-off-by: Shawn Guo <shawn.guo@freescale.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Olof Johansson <olof@lixom.net>
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git://git.infradead.org/linux-mvebuOlof Johansson authored
mvebu fixes for v3.16 (round #2) - mvebu - Fix PCIe deadlock now that SMP is enabled - Fix cpuidle for big-endian systems * tag 'mvebu-fixes-3.16-2' of git://git.infradead.org/linux-mvebu: ARM: mvebu: fix cpuidle implementation to work on big-endian systems ARM: mvebu: update L2/PCIe deadlock workaround after L2CC cleanup ARM: mvebu: move Armada 375 external abort logic as a quirk Signed-off-by: Olof Johansson <olof@lixom.net>
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Maxime Ripard authored
This partly reverts commits 55360050 (ARM: sunxi: Remove reset code from the platform) and 5e669ec5 (ARM: sunxi: Remove init_machine callback) for the sun4i, sun5i and sun7i families. This is needed because the watchdog counterpart of these commits was dropped, and didn't make it into 3.16. In order to still be able to reboot the board, we need to reintroduce that code. Of course, the long term view is still to get rid of that code in mach-sunxi. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Olof Johansson <olof@lixom.net>
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Olof Johansson authored
Merge tag 'omap-for-v3.16/fixes-against-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes Merge OMAP fixes from Tony Lindgren: Fixes for omaps for issues discovered during the merge window and enabling of a few features that had to wait for the driver dependencies to clear. The fixes included are: - Fix am43xx hard reset flags - Fix SoC detection for DRA722 - Fix CPU OPP table for omap5 - Fix legacy mux parser bug if requested muxname is a prefix of multiple mux entries - Fix qspi interrupt binding that relies on the irq crossbar that has not yet been enabled - Add missing phy_sel for am43x-epos-evm - Drop unused gic_init_irq() that is no longer needed And the enabling of features that had driver dependencies are: - Change dra7 to use Audio Tracking Logic clock instead of a fixed clock now that the clock driver for it has been merged - Enable off idle configuration for selected omaps as all the kernel dependencies for device tree based booting are finally merged as this is needed to get the automated PM tests working finally with device tree based booting - Add hwmod entry for ocp2scp3 for omap5 to get sata working as all the driver dependencies are now in the kernel and this patch fell through the cracks during the merge window * tag 'omap-for-v3.16/fixes-against-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: dts: dra7-evm: remove interrupt binding ARM: OMAP2+: Fix parser-bug in platform muxing code ARM: DTS: dra7/dra7xx-clocks: ATL related changes ARM: OMAP2+: drop unused function ARM: dts: am43x-epos-evm: Add Missing cpsw-phy-sel for am43x-epos-evm ARM: dts: omap5: Update CPU OPP table as per final production Manual ARM: DRA722: add detection of SoC information ARM: dts: Enable twl4030 off-idle configuration for selected omaps ARM: OMAP5: hwmod: Add ocp2scp3 and sata hwmods ARM: OMAP2+: hwmod: Change hardreset soc_ops for AM43XX
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- 04 Jul, 2014 8 commits
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git://neil.brown.name/mdLinus Torvalds authored
Pull md bugfixes from Neil Brown: "Two minor bugfixes for md in 3.16" * tag 'md/3.16-fixes' of git://neil.brown.name/md: md: flush writes before starting a recovery. md: make sure GET_ARRAY_INFO ioctl reports correct "clean" status
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git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/soundLinus Torvalds authored
Pull sound fixes from Takashi Iwai: "This contains a few fixes for HD-audio: yet another Dell headset pin quirk, a fixup for Thinkpad T540P, and an improved fix for Haswell/Broadwell HDMI clock setup" * tag 'sound-3.16-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: ALSA: hda - restore BCLK M/N value as per CDCLK for HSW/BDW display HDA controller drm/i915: provide interface for audio driver to query cdclk ALSA: hda - Add a fixup for Thinkpad T540p ALSA: hda - Add another headset pin quirk for some Dell machines
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git://git.kernel.org/pub/scm/linux/kernel/git/mason/linux-btrfsLinus Torvalds authored
Pull btrfs fixes from Chris Mason: "We've queued up a few fixes in my for-linus branch" * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mason/linux-btrfs: Btrfs: fix crash when starting transaction Btrfs: fix btrfs_print_leaf for skinny metadata Btrfs: fix race of using total_bytes_pinned btrfs: use E2BIG instead of EIO if compression does not help btrfs: remove stale comment from btrfs_flush_all_pending_stuffs Btrfs: fix use-after-free when cloning a trailing file hole btrfs: fix null pointer dereference in btrfs_show_devname when name is null btrfs: fix null pointer dereference in clone_fs_devices when name is null btrfs: fix nossd and ssd_spread mount option regression Btrfs: fix race between balance recovery and root deletion Btrfs: atomically set inode->i_flags in btrfs_update_iflags btrfs: only unlock block in verify_parent_transid if we locked it Btrfs: assert send doesn't attempt to start transactions btrfs compression: reuse recently used workspace Btrfs: fix crash when mounting raid5 btrfs with missing disks btrfs: create sprout should rename fsid on the sysfs as well btrfs: dev replace should replace the sysfs entry btrfs: dev add should add its sysfs entry btrfs: dev delete should remove sysfs entry btrfs: rename add_device_membership to btrfs_kobj_add_device
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Marc Zyngier authored
The CurrentEL system register reports the Current Exception Level of the CPU. It doesn't say anything about the stack handling, and yet we compare it to PSR_MODE_EL2t and PSR_MODE_EL2h. It works by chance because PSR_MODE_EL2t happens to match the right bits, but that's otherwise a very bad idea. Just check for the EL value instead. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> [catalin.marinas@arm.com: fixed arch/arm64/kernel/efi-entry.S] Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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Steve Capper authored
The __sync_icache_dcache routine will only flush the dcache for the first page of a compound page, potentially leading to stale icache data residing further on in a hugetlb page. This patch addresses this issue by taking into consideration the order of the page when flushing the dcache. Reported-by: Mark Brown <broonie@linaro.org> Tested-by: Mark Brown <broonie@linaro.org> Signed-off-by: Steve Capper <steve.capper@linaro.org> Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Cc: <stable@vger.kernel.org> # v3.11+
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Steve Capper authored
The define ARM64_64K_PAGES is tested for rather than CONFIG_ARM64_64K_PAGES. Correct that typo here. Signed-off-by: Steve Capper <steve.capper@linaro.org> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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Mengdong Lin authored
For HSW/BDW display HD-A controller, hda_set_bclk() is defined to set BCLK by programming the M/N values as per the core display clock (CDCLK) queried from i915 display driver. And the audio driver will also set BCLK in azx_first_init() since the display driver can turn off the shared power in boot phase if only eDP is connected and M/N values will be lost and must be reprogrammed. Signed-off-by: Mengdong Lin <mengdong.lin@intel.com> Cc: <stable@vger.kernel.org> Signed-off-by: Takashi Iwai <tiwai@suse.de>
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Jani Nikula authored
For Haswell and Broadwell, if the display power well has been disabled, the display audio controller divider values EM4 M VALUE and EM5 N VALUE will have been lost. The CDCLK frequency is required for reprogramming them to generate 24MHz HD-A link BCLK. So provide a private interface for the audio driver to query CDCLK. This is a stopgap solution until a more generic interface between audio and display drivers has been implemented. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Mengdong Lin <mengdong.lin@intel.com> Cc: <stable@vger.kernel.org> Signed-off-by: Takashi Iwai <tiwai@suse.de>
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