- 20 Jun, 2016 40 commits
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Roger Quadros authored
Don't make any decisions regarding VBUS session based on ID status. That is best left to the OTG core. Pass ID and VBUS events independent of each other so that OTG core knows exactly what to do. This makes dual-role with extcon work with OTG irq on OMAP platforms. Signed-off-by:
Roger Quadros <rogerq@ti.com> Signed-off-by:
Felipe Balbi <felipe.balbi@linux.intel.com>
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Roger Quadros authored
TRM [1] recommends that POWERPRESENT bit must not be set and left at it's default value of 0. [1] OMAP542x TRM - http://www.ti.com/lit/pdf/swpu249 Section 23.11.4.5.1 Mailbox VBUS/ID Management "Because PIPE powerpresent has a different meaning in host and in device mode, and because of the redundancy with the UTMI signals, the controller ORes together the appropriate PIPE and UTMI inputs to create its internal VBUS status. For that reason, it is recommended to leave field USBOTGSS_UTMI_OTG_STATUS[9] POWERPRESENT at its default value (=0), and only to fill in the USB2 VBUS status fields in the same register." Signed-off-by:
Roger Quadros <rogerq@ti.com> Signed-off-by:
Felipe Balbi <felipe.balbi@linux.intel.com>
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Roger Quadros authored
On OMAPs, OTG events come on the same IRQ so we need to share this IRQ with the OTG device driver. Signed-off-by:
Roger Quadros <rogerq@ti.com> Signed-off-by:
Felipe Balbi <felipe.balbi@linux.intel.com>
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Roger Quadros authored
We intend to share this interrupt with the OTG driver an to ensure that irqflags match for the shared interrupt handlers we use request_threaded_irq() If we don't use request_treaded_irq() then forced threaded irq will set IRQF_ONESHOT and this won't match with the OTG IRQ handler's IRQ flags. NOTE: OTG IRQ handler is yet to be added. This is a preparatory step. Signed-off-by:
Roger Quadros <rogerq@ti.com> Signed-off-by:
Felipe Balbi <felipe.balbi@linux.intel.com>
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William Wu authored
GUCTL1 reg has some useful functions which can be written by user. For rockchip platform, we set GUCTL1.DEV_FORCE_20_CLK_FOR_30_CLK (bit26, applicable for the core is programmed to operate in 2.0 device only) to 1 in bootrom, and after start the kernel, we want to check whether this bit can be reset to default 0 after the core reset. Dump GUCTL1 reg from debugfs is more convenient for us. Signed-off-by:
William Wu <william.wu@rock-chips.com> Signed-off-by:
Felipe Balbi <felipe.balbi@linux.intel.com>
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John Youn authored
The DWC3_USB31_REVISION_110A macro uses an invalid constant name in its definition. This is currently not used. Signed-off-by:
John Youn <johnyoun@synopsys.com> Signed-off-by:
Felipe Balbi <felipe.balbi@linux.intel.com>
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John Youn authored
Correct the use of the DWC3_DSTS_XXX_SPEED and DWC3_DCFG_XXX_SPEED macros. The wrong set of macros were being used in a few places. This is only a cosmetic change as the values for both sets are identical. Signed-off-by:
John Youn <johnyoun@synopsys.com> Signed-off-by:
Felipe Balbi <felipe.balbi@linux.intel.com>
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John Youn authored
From sparse: warning: cast truncates bits from constant value (100 becomes 0) The DWC3_TRB_NUM constant is too big for u8. Do the calculation a slightly different way that should still be optimized out for the case where DWC3_TRB_NUM == 256. Signed-off-by:
John Youn <johnyoun@synopsys.com> Signed-off-by:
Felipe Balbi <felipe.balbi@linux.intel.com>
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John Youn authored
If the trb->enqueue == trb->dequeue, then it could be full or empty. This could also happen at TRB index 0, so modify the check to handle that condition. At index 0, the previous TRB is the one just before the link TRB. Signed-off-by:
John Youn <johnyoun@synopsys.com> Signed-off-by:
Felipe Balbi <felipe.balbi@linux.intel.com>
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John Youn authored
The TRBs left calculation didn't account for the link TRB taking up one spot. If the trb_dequeue < trb_enqueue, then the result includes the link TRB slot so it must be adjusted. Signed-off-by:
John Youn <johnyoun@synopsys.com> Signed-off-by:
Felipe Balbi <felipe.balbi@linux.intel.com>
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John Youn authored
The current calculation takes dep->trb_dequeue - dep->trb_enqueue to find the TRB space left. If you enqueue 1, that results in: (u8) 0 - (u8) 1 = 0xff = 255 TRBs left. This is correct if DWC3_TRB_NUM == 256. If DWC3_TRB_NUM is less than 256 (but still a power of 2) you need to mod the result by DWC3_TRB_NUM. For example the same calculation with DWC3_TRB_NUM = 8, results in: 255 % 6 = 7 TRBs left. Signed-off-by:
John Youn <johnyoun@synopsys.com> Signed-off-by:
Felipe Balbi <felipe.balbi@linux.intel.com>
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John Youn authored
If trbs_left == 0, we don't have any space left in the TRB ring so don't prepare anything. Signed-off-by:
John Youn <johnyoun@synopsys.com> Signed-off-by:
Felipe Balbi <felipe.balbi@linux.intel.com>
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John Youn authored
Clears out all the TRBs in the ring to clean up any stale data that might be in them from the previous time the endpoint was enabled. Also removed the existing clear of the LINK trb since the entire ring is cleard just before. Signed-off-by:
John Youn <johnyoun@synopsys.com> Signed-off-by:
Felipe Balbi <felipe.balbi@linux.intel.com>
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John Youn authored
Make the skipping of the link TRBS built-in to the increment operation. This simplifies the code wherever we increment the trb index and ensures that we never end up pointing to a link trb. Signed-off-by:
John Youn <johnyoun@synopsys.com> Signed-off-by:
Felipe Balbi <felipe.balbi@linux.intel.com>
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John Youn authored
Sparse complains even though it looks ok. Probably it cannot detect that the wValue, wIndex, and wLength are declared __le16 due to the macro magic. Redeclare them as CPU endianness and make the conversion on assignment. Signed-off-by:
John Youn <johnyoun@synopsys.com> Signed-off-by:
Felipe Balbi <felipe.balbi@linux.intel.com>
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John Youn authored
Cleans up the sparse warning: warning: dubious: x | !y Since we do want a bitwise OR here, don't use a logical (true/false) value. Probably is not a real issue but it cleans up the warning. Signed-off-by:
John Youn <johnyoun@synopsys.com> Signed-off-by:
Felipe Balbi <felipe.balbi@linux.intel.com>
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John Youn authored
u2sel and u2pel should be __le16. Doesn't fix any issue. Found with sparse. Signed-off-by:
John Youn <johnyoun@synopsys.com> Signed-off-by:
Felipe Balbi <felipe.balbi@linux.intel.com>
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John Youn authored
The wIndex passed in here is CPU endianness, but the function expects little endian. Found with sparse. Signed-off-by:
John Youn <johnyoun@synopsys.com> Signed-off-by:
Felipe Balbi <felipe.balbi@linux.intel.com>
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Felipe Balbi authored
Just like we did for endpoint commands, let's have a single trace output for the command and its status. This will improve trace readability Signed-off-by:
Felipe Balbi <felipe.balbi@linux.intel.com>
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Felipe Balbi authored
We want commands to finish ASAP, so let's remove that udelay() call. Signed-off-by:
Felipe Balbi <felipe.balbi@linux.intel.com>
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Felipe Balbi authored
Just like we did for endpoint commands, let's use a single return point for generic commands as well. This aids readability. Signed-off-by:
Felipe Balbi <felipe.balbi@linux.intel.com>
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Felipe Balbi authored
Instead of printing command's status with a separate trace printout, let's print it within a single call. Signed-off-by:
Felipe Balbi <felipe.balbi@linux.intel.com>
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Felipe Balbi authored
instead of having infinite loop and always checking timeout value as a break condition, we can just decrement timeout inside while's condition. Signed-off-by:
Felipe Balbi <felipe.balbi@linux.intel.com>
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Felipe Balbi authored
We don't need the extra %s when command fails. Let's remove it Signed-off-by:
Felipe Balbi <felipe.balbi@linux.intel.com>
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Felipe Balbi authored
This will make it more human-friendly to read trace output from dwc3. Signed-off-by:
Felipe Balbi <felipe.balbi@linux.intel.com>
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Felipe Balbi authored
I really thought this would be useful, but as it turns out, it creates more problems than fixes. The amount of times we had to fix this because some other commit shuffled things around and ended up regressing this tiny little string manupulation... Might as well remove it, since it has a negligible added benefit. Signed-off-by:
Felipe Balbi <felipe.balbi@linux.intel.com>
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Janusz Dziedzic authored
Improve trb tracing by showing trb flags, interrupts trb type. trb flags: - h - hardware owner of descriptor - l - last TRB - c - chain buffers - s - continue on short packet interrupt flags: - s - interrupt on short packet - c - interrupt on complete Capital letter means that bit is set, while lowercase letter means bit is cleared. Signed-off-by:
Janusz Dziedzic <januszx.dziedzic@linux.intel.com> Signed-off-by:
Felipe Balbi <felipe.balbi@linux.intel.com>
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Felipe Balbi authored
This will allow us to process several endpoints at a time by making sure that we lock only shared resources. Signed-off-by:
Felipe Balbi <felipe.balbi@linux.intel.com>
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Felipe Balbi authored
Allow for dwc3-pci to reach D3 and enable pm_runtime by providing dummy PM hooks. Without them, PCI subsystem won't put device to D3. Signed-off-by:
Felipe Balbi <felipe.balbi@linux.intel.com>
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Felipe Balbi authored
this patch implements the most basic pm_runtime support for dwc3. Whenever USB cable is dettached, then we will allow core to runtime_suspend. Runtime suspending will involve completely tearing down event buffers and require a full soft-reset of the IP. Note that a further optimization could be implemented once we decide to support hibernation, which is to allow runtime_suspend with cable connected when bus is in U3. That's subject to a separate patch, however. Tested-by:
Baolin Wang <baolin.wang@linaro.org> Signed-off-by:
Felipe Balbi <felipe.balbi@linux.intel.com>
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Felipe Balbi authored
when we call dwc3_gadget_giveback(), we end up releasing our controller's lock. Another thread could get scheduled and disable the endpoint, subsequently setting dep->endpoint.desc to NULL. In that case, we would end up dereferencing a NULL pointer which would result in a Kernel Oops. Let's avoid the problem by simply returning early if we have a NULL descriptor. Signed-off-by:
Felipe Balbi <felipe.balbi@linux.intel.com>
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Konrad Leszczynski authored
commit f3af3651 ("usb: dwc3: gadget: always enable IOC on bulk/interrupt transfers") ended up regressing Isochronous endpoints by clearing DWC3_EP_BUSY flag too early, which resulted in choppy audio playback over USB. Fix that by partially reverting original commit and making sure that we check for isochronous endpoints. Fixes: f3af3651 ("usb: dwc3: gadget: always enable IOC on bulk/interrupt transfers") Cc: <stable@vger.kernel.org> Signed-off-by:
Konrad Leszczynski <konrad.leszczynski@intel.com> Signed-off-by:
Rafal Redzimski <rafal.f.redzimski@intel.com> Signed-off-by:
Felipe Balbi <felipe.balbi@linux.intel.com>
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Felipe Balbi authored
As a micro-power optimization, let's only resume the USB2 PHY if we're working on <=HIGHSPEED. If we're gonna work on SUPERSPEED or SUPERSPEED+, there's no point in resuming the USB2 PHY. Fixes: 2b0f11df ("usb: dwc3: gadget: clear SUSPHY bit before ep cmds") Signed-off-by:
Felipe Balbi <felipe.balbi@linux.intel.com>
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Felipe Balbi authored
by holding gadget's IRQ number in dwc->irq_gadget, it'll be simpler to free_irq() and disable the IRQ in case an IRQ fires while we are runtime suspended. Signed-off-by:
Felipe Balbi <felipe.balbi@linux.intel.com>
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Felipe Balbi authored
now that we have re-factored dwc3_core_init() and dwc3_core_exit() we can use them for suspend/resume operations. This will help us avoid some common mistakes when patching code when we have duplicated pieces of code doing the same thing. Signed-off-by:
Felipe Balbi <felipe.balbi@linux.intel.com>
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Felipe Balbi authored
The idea of this patch is for dwc3_core_init() to abstract all the details about how to initialize dwc3 and dwc3_core_exit() to do the same for teardown. With this, we can simplify suspend/resume operations by a large margin and always know that we're going to start dwc3 from a known starting point. Signed-off-by:
Felipe Balbi <felipe.balbi@linux.intel.com>
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Felipe Balbi authored
this patch is in preparation for some further re-factoring in dwc3 initialization. No functional changes. Signed-off-by:
Felipe Balbi <felipe.balbi@linux.intel.com>
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Felipe Balbi authored
By adding a pointer to endpoint registers' base address, we can avoid using our controller-wide struct dwc3 pointer for everything. At some point this will allow us to have per-endpoint locks which will, in turn, let us queue requests to separate endpoints in parallel. Because of this change our debugfs interface and io accessors need to be changed accordingly. Signed-off-by:
Felipe Balbi <felipe.balbi@linux.intel.com>
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Felipe Balbi authored
In all call sites of dwc3_send_gadget_ep_cmd() we already had a valid dep pointer, so instead of passing dwc and dep->number, which would be used to fetch the same pointer we already had, just pass dep directly. In other words, we're changing: struct dwc3_ep *dep = dwc[dep->number]; to just passing struct dwc3_ep *dep as argument. Signed-off-by:
Felipe Balbi <felipe.balbi@linux.intel.com>
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Felipe Balbi authored
Instead of using burst size to configure NUMP, we should be using RxFIFO Size instead. DWC3 is smart enough to know that it shouldn't burst in case burst size is 0. Reported-by:
John Youn <johnyoun@synopsys.com> Signed-off-by:
Felipe Balbi <felipe.balbi@linux.intel.com>
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