- 11 Apr, 2018 40 commits
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Rex Zhu authored
In order to remove the cgs wrapper function cgs_get_pci_resource Reviewed-by:
Alex Deucher <alexander.deucher@amd.com> Acked-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
Rex Zhu <Rex.Zhu@amd.com> Signed-off-by:
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Rex Zhu authored
In order to remove cgs interfaces: cgs_enter_safe_mode cgs_lock_grbm_idx Reviewed-by:
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Colin Ian King authored
Trivial fix to spelling mistake in pr_warn warning message text Reviewed-by:
Colin Ian King <colin.king@canonical.com> Signed-off-by:
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Rex Zhu authored
driver will set dpm_enabled to true only when module parameter amdgpu_dpm not equal to 0 and smu hw initialize successfully. Reviewed-by:
Evan Quan <evan.quan@amd.com> Reviewed-by:
Huang Rui <ray.huang@amd.com> Signed-off-by:
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Rex Zhu authored
Use kernel api directly so we can deprecate the cgs interface. Reviewed-by:
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Rex Zhu authored
Store vf state in pp_context so we can deprecate the cgs interface. Reviewed-by:
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Rex Zhu authored
unlock mutex until set pp table completely to avoid conflict if other pp functions were called simultaneously. use hwmgr_handle_task instand of pp_dpm_dispatch_tasks. It is not make sense that call pp_functions in ip_functions. Reviewed-by:
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Rex Zhu authored
Clean up pp ip functions Reviewed-by:
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Rex Zhu authored
Acked-by:
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Harry Wentland authored
Signed-off-by:
Harry Wentland <harry.wentland@amd.com> Reviewed-by:
Tony Cheng <Tony.Cheng@amd.com> Acked-by:
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Anthony Koo authored
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Xingyue Tao authored
- Added double buffer mechanism to output CSC so that there's no tearing when adjusting brightness from Radeon settings Signed-off-by:
Xingyue Tao <xingyue.tao@amd.com> Reviewed-by:
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SivapiriyanKumarasamy authored
Signed-off-by:
SivapiriyanKumarasamy <sivapiriyan.kumarasamy@amd.com> Reviewed-by:
Anthony Koo <Anthony.Koo@amd.com> Acked-by:
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Anthony Koo authored
Move this out of the HW includes to dc_types.h Signed-off-by:
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Anthony Koo authored
Signed-off-by:
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Xingyue Tao authored
- Video playback shows tearing when adjusting brightness through radeon custom settings. - Now added double buffer mechanism to switch input CSC from register buffer ICSC and COMA - Improved tab alignment Signed-off-by:
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Eric Bernstein authored
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Eric Bernstein <eric.bernstein@amd.com> Reviewed-by:
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Bhawanpreet Lakha authored
Correct the types used for printing in logs. This is needed for adding dynamic printing (LINUX), otherwise we get warnings. Signed-off-by:
Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by:
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Vitaly Prosyak authored
Signed-off-by:
Vitaly Prosyak <vitaly.prosyak@amd.com> Reviewed-by:
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Dmytro Laktyushkin authored
Signed-off-by:
Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by:
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Eric Yang authored
The current mpcc insert/remove logic does not support updating only a single mpcc. So when pixel alpha changed but no full update we can mistakenly shuffle the mpcc layering order. With this change we will only insert/remove mpcc if there is full update. Signed-off-by:
Eric Yang <Eric.Yang2@amd.com> Reviewed-by:
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Mikita Lipski authored
Override the memory input functions for dce120 not to program new registers on dce112. This will fix warnings thrown on Polaris asics. Signed-off-by:
Mikita Lipski <mikita.lipski@amd.com> Reviewed-by:
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Roman Li authored
Adding assert to prevent possible null deref warning. Only can happen under abnormal circumstances. Signed-off-by:
Roman Li <Roman.Li@amd.com> Reviewed-by:
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Dmytro Laktyushkin authored
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Tony Cheng authored
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Mikita Lipski authored
Registers are added and defined. Programmed to default values. Stutter level watermark register is being set to calculated value. Urgent level registers are programmed to the same as urgency. The programming of the registers is not expected to have any functional difference in performance. Signed-off-by:
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Julian Parkin authored
Block FP16 scaling in validate_resources codepath. Signed-off-by:
Julian Parkin <jparkin@amd.com> Reviewed-by:
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Eric Bernstein authored
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Mikita Lipski authored
Adding the stutter_entry_wm object to dce_bw_output struct and populating it with bw calculations data Signed-off-by:
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Mikita Lipski authored
amdgpu_dm_display_resume was merged into dm_resume. No need to call these functions separately. Signed-off-by:
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Bhawanpreet Lakha authored
Using the three functions we can print the dceip, vbios and data struct for bandwidth calculations. This is useful for debugging bandwidth calculation issues without a debugger Signed-off-by:
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Dmytro Laktyushkin authored
Signed-off-by:
Wesley Chalmers <Wesley.Chalmers@amd.com> Acked-by:
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Harry Wentland authored
We shouldn't attempt to read EDID in atomic_check. We really shouldn't even be modifying the connector object, or any other non-state object, but this is a start at least. Moving EDID cleanup to dm_dp_mst_connector_destroy from dm_dp_destroy_mst_connector to ensure the EDID is still available for headless mode. Signed-off-by:
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Nikola Cornij authored
Signed-off-by:
Nikola Cornij <nikola.cornij@amd.com> Reviewed-by:
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Dmytro Laktyushkin authored
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Nikola Cornij authored
Also separate register address initialization between ASICs for the registers that were removed in scaled-down variation of the ASIC. Signed-off-by:
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Yongqiang Sun authored
Some DP panel not detected intermittently due to read dpcd caps failed when doing hot plug. [root cause] DC_HPD_CONNECT_INT_DELAY is set to 0, not delay after HPD toggle and read dpcd data, while some panel need 4ms defer to read. [solution] Add a retry when read failed. Signed-off-by:
Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by:
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Tony Cheng authored
Signed-off-by:
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Martin Tsai authored
Signed-off-by:
Martin Tsai <martin.tsai@amd.com> Reviewed-by:
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Harry Wentland authored
We'd like to use them for reading DCN debug status. Signed-off-by:
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