- 31 Aug, 2017 6 commits
-
-
Rodrigo Vivi authored
Let's decouple bxt, glk and cnl dp signal levels from other DDIs to avoid confusion. No functional change. Only a reorg to avoid messing with currently working DP signal levels when moving voltage swing sequences around to match spec. v2: ddi_signal_levels is also called from other ddi platforms, so don't remove IS_GEN9_BC check from skl_ddi_set_iboos. (Ville). Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by:Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by:
Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20170829232230.23051-2-rodrigo.vivi@intel.com
-
Rodrigo Vivi authored
No functional changes. This only moves the DP level selection to a separated function that will be later used to organize better the vswing sequences. Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by:
-
Rodrigo Vivi authored
Driver’s CPU access to GTT is via the GTTMMADR BAR. The current HW implementation of that BAR is to only support <= DW (and maybe QW) writes—not 16/32/64B writes that could occur with WC and/or SSE/AVX moves. GTTMMADR must be marked uncacheable (UC). Accesses to GTTMMADR(GTT), must be 64 bits or less (ie. 1 GTT entry). v2: Get clarification on the reasons and spec is getting updated to reflect it now. Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Suggested-by:Ben Widawsky <benjamin.widawsky@intel.com> Signed-off-by:
Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20170829230907.21363-1-rodrigo.vivi@intel.com
-
Rodrigo Vivi authored
On CNL B0 stepping GAM is not able to detect some deadlock condition and then rise the rise the gam_coh_flush. WA database and spec both mentions to set 4AB8[24]=1 as workaround. Although register offset 0x4AB8 is not documented for any platform. References: HSD#1945815, BSID#1112 Cc: Mika Kuoppala <mika.kuoppala@intel.com> Signed-off-by:
Mika Kuoppala <mika.kuoppala@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20170829230751.21047-1-rodrigo.vivi@intel.com
-
Rodrigo Vivi authored
WA to enable HW L1 Banking fix that allows aniso to operate at full sample rate. References: HSD#1937670 Cc: Mika Kuoppala <mika.kuoppala@intel.com> Cc: Oscar Mateo <oscar.mateo@intel.com> Cc: Ben Widawsky <ben@bwidawsk.net> Cc: Anuj Phogat <anuj.phogat@intel.com> Signed-off-by:
-
Rodrigo Vivi authored
No functional changes. Our code was only a bit messy with mixed style there so let's clean up a bit using the short codenames for the platforms. Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> Signed-off-by:
Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20170829052026.15038-1-rodrigo.vivi@intel.com
-
- 30 Aug, 2017 3 commits
-
-
Ville Syrjälä authored
The CCS won't have the same stride as the main surface anyway so trying to guard against the fence stride not matching the CCS stride is not sensible. Just skip the fence vs. fb alignment check for the aux plane. Cc: Ben Widawsky <ben@bwidawsk.net> Cc: Jason Ekstrand <jason@jlekstrand.net> Cc: Daniel Stone <daniels@collabora.com> Link: https://patchwork.freedesktop.org/patch/msgid/20170824191100.10949-3-ville.syrjala@linux.intel.comReviewed-by:
Ben Widawsky <ben@bwidawsk.net> Fixes: 2e2adb05 ("drm/i915: Add render decompression support") Signed-off-by:
-
Ville Syrjälä authored
Userspace wants to treat fb->offsets[] as raw byte offsets into the gem bo. Adjust the kernel code to match. Cc: Ben Widawsky <ben@bwidawsk.net> Cc: Jason Ekstrand <jason@jlekstrand.net> Cc: Daniel Stone <daniels@collabora.com> Link: https://patchwork.freedesktop.org/patch/msgid/20170824191100.10949-2-ville.syrjala@linux.intel.comAcked-by:
-
Chris Wilson authored
Since we hold the device wakeref when writing through the GTT (otherwise the writes would fail), we presumed that before the device sleeps those writes would naturally be flushed and that we wouldn't need our mmio read trick. However, that presumption seems false and a sleepy bxt seems to require us to always manually flush the GTT writes prior to direct access. Fixes: e2a2aa36 ("drm/i915: Check we have an wake device before flushing GTT writes") Signed-off-by:
Chris Wilson <chris@chris-wilson.co.uk> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Reviewed-by:
-
- 29 Aug, 2017 6 commits
-
-
Chris Wilson authored
If we fail to clear the outstanding request queue before suspending, mark those requests as lost. References: https://bugs.freedesktop.org/show_bug.cgi?id=102037Signed-off-by:
-
Chris Wilson authored
When we wake up from suspend, the device has been powered down and should come back afresh. We should be able to safely remove the wedged status from the previous session and start afresh. Signed-off-by:
-
Chris Wilson authored
When we do a locked idle we know that afterwards all requests have been completed and the engines have been cleared of tasks. For whatever reason, this doesn't always happen and we may go into a suspend with ELSP still full, and this causes an issue upon resume as we get very, very confused. If the engines refuse to idle, mark the device as wedged. In the process we get rid of the maybe unused open-coded version of wait_for_engines reported by Nick Desaulniers and Matthias Kaehlcke. v2: Suppress the -EIO before suspend, but keep it for seqno wrap. References: https://bugs.freedesktop.org/show_bug.cgi?id=101891 References: https://bugs.freedesktop.org/show_bug.cgi?id=102456Signed-off-by:
Mika Kuoppala <mika.kuoppala@linux.intel.com>
-
Chris Wilson authored
If we are using the cmdparser, we will have to copy the batch and so stall for the relocations. Rather than prolong that stall by adding more relocation requests, just use CPU relocations and do the stall upfront. Signed-off-by:
-
Chris Wilson authored
Sometimes we know we are the only user of the bo, but since we take a protective pin_pages early on, an attempt to change the vmap on the object is denied because it is busy. i915_gem_object_pin_map() cannot tell from our single pin_count if the operation is safe. Instead we must pass that information down from the caller in the manner of I915_MAP_OVERRIDE. This issue has existed from the introduction of the mapping, but was never noticed as the only place where this conflict might happen is for cached kernel buffers (such as allocated by i915_gem_batch_pool_get()). Until recently there was only a single user (the cmdparser) so no conflicts ever occurred. However, we now use it to allocate batches for different operations (using MAP_WC on !llc for writes) in addition to the existing shadow batch (using MAP_WB for reads). We could either keep both mappings cached, or use a different write mechanism if we detect a MAP_WB already exists (i.e. clflush afterwards), but as we haven't seen this issue in the wild (it requires hitting the GPU reloc path in addition to the cmdparser) for simplicity just allow the mappings to be recreated. v2: Include the i915_MAP_OVERRIDE bit in the enum so the compiler knows about all the valid values. Fixes: 7dd4f672 ("drm/i915: Async GPU relocation processing") Testcase: igt/gem_lut_handle # byt, completely by accident Signed-off-by:
-
Chris Wilson authored
CHECK drivers/gpu/drm/i915/intel_display.c drivers/gpu/drm/i915/intel_display.c:3753 intel_finish_reset() warn: inconsistent indenting Signed-off-by:
Daniel Vetter <daniel.vetter@ffwll.ch>
-
- 28 Aug, 2017 5 commits
-
-
Marta Lofstedt authored
Commit 6e644626 ("drm/i915: Beef up the IPS vs. CRC workaround") was supposed to solve below bug. However, the patch I tested is not the same as the one that got merged. With this addition the test pass. V2: removed unused: "struct intel_crtc *intel_crtc" Fixes: 6e644626 ("drm/i915: Beef up the IPS vs. CRC workaround") Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101664Signed-off-by:
Marta Lofstedt <marta.lofstedt@intel.com> Signed-off-by:
-
Jani Nikula authored
Copy over some fields defined in the intel_vbt_decode tool. No functional changes. Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by:
-
Jani Nikula authored
Copy over some fields defined in the intel_vbt_decode tool. No functional changes. Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by:
-
Jani Nikula authored
Copy over some fields defined in the intel_vbt_tool. No functional changes. Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by:
-
Jani Nikula authored
This is according to the style all over the place. No functional changes. Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Suggested-by:
-
- 26 Aug, 2017 3 commits
-
-
Chris Wilson authored
Since we use a worker to enable FBC on the CRTC, it is possible for the CRTC to be switched off before we run. In this case, the CRTC will not allow us to wait upon a vblank, so remove the DRM_ERROR as this is very much expected. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102410 Fixes: ca18d51d ("drm/i915/fbc: wait for a vblank instead of 50ms when enabling") Signed-off-by:
-
Praveen Paneri authored
When FBC is enabled for linear, legacy Y-tiled and Yf-tiled surfaces on gen9, the cfb stride must be programmed by SW as cfb_stride = ceiling[(at least plane width in pixels)/ (32 * compression limit factor)] * 8 v2: Minor fix for a build error v3: Fixed subject, register name and platform check (Ville) v4: Added WA details in comment (Paulo) v5: - Read modified reg write to preserve other bit values (Paulo) - Store modified stride value in reg_params (Paulo) - Keep GLK out of the WA (Paulo) v6: - added additional field in reg_params for gen9_wa_cfb_stride (Paulo) - Used appropriate bit mask while writing the register (Paulo) v7 (from Paulo): - Fix coding style and spacing issues. - Mask the old values before writing. - Bikeshed comments and unnecessary checks. Signed-off-by:
Praveen Paneri <praveen.paneri@intel.com> Signed-off-by:
Paulo Zanoni <paulo.r.zanoni@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/1502389833-32621-1-git-send-email-praveen.paneri@intel.com
-
Paulo Zanoni authored
We have the macro, use it. Makes the code a little easier to understand. Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by:
-
- 25 Aug, 2017 11 commits
-
-
Jani Nikula authored
Not really kernel style, and sticks out like a sore thumb. No functional changes. Cc: Animesh Manna <animesh.manna@intel.com> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by:
-
Jani Nikula authored
Apparently meant to be additional DEVICE_PORT_* or DVO_PORT_* macros, but left unused at some point. Remove. No functional changes. Cc: Animesh Manna <animesh.manna@intel.com> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by:
-
Jani Nikula authored
No idea why some definitions were defined at a different place from the rest. Move them together. No functional changes. Cc: Animesh Manna <animesh.manna@intel.com> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by:
-
Jani Nikula authored
Move closer to child device config struct while at it. No functional changes. Cc: Animesh Manna <animesh.manna@intel.com> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by:
-
Jani Nikula authored
The old_child_dev_config struct is no longer needed except for its size; replace with a macro. No functional change. Cc: Animesh Manna <animesh.manna@intel.com> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by:
-
Jani Nikula authored
All the child device config fields, including legacy, are now available in the same struct, so use it for everything. As this change touches plenty of code with "p_child", rename them to "child" while at it. Also do some simple unification and constification where not intrusive. This in the name of avoiding extra cleanup churn for the same lines as here. No functional changes. Cc: Animesh Manna <animesh.manna@intel.com> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by:
-
Jani Nikula authored
Add legacy contents to common child device config, in preparation for using a single child device config. Use unions where BDB versions of the config differ. Use the naming from old_child_dev_config for legacy fields. No functional changes. Cc: Animesh Manna <animesh.manna@intel.com> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by:
-
Jani Nikula authored
Convert the only user of the raw field, switching to the recently added struct fields. No functional changes. Cc: Animesh Manna <animesh.manna@intel.com> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by:
-
Jani Nikula authored
Document everything that was introduced after version 155, which seems to be the baseline for some of the later documentation. No functional changes. Cc: Animesh Manna <animesh.manna@intel.com> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by:
-
Jani Nikula authored
Add both some new and some old fields to child device config parameters. Prepare for switching to just one child device config. Use naming from struct old_child_dev_config for common fields. No functional changes. Cc: Animesh Manna <animesh.manna@intel.com> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by:
-
Ville Syrjälä authored
Oneshot disabling of IPS when CRC capturing is started is insufficient. IPS may get re-enabled by any plane update, and hence tests that keep CRC capturing on across plane updates will start to see inconsistent results as soon as IPS kicks back in. Add a new knob into the crtc state to make sure IPS stays disabled as long as CRC capturing is enabled. Forcing a modeset is the easiest way to handle this since that's already how we do the panel fitter workaround. It's a little heavy handed just for IPS, but seeing as we might already do the panel fitter workaround I think it's better to follow that. We migth want to optimize both cases later if someone gets too upset by the extra delay from the modeset. v2: Check the right thing when deciding whether to force a modeset v3: Rebase, check HAS_IPS before forcing a modeset, move ips_force_disable check into pipe_config_supports_ips() Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Cc: Marta Lofstedt <marta.lofstedt@intel.com> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101664Reviewed-by:
-
- 24 Aug, 2017 4 commits
-
-
Oscar Mateo authored
They are not used anywhere else. Also, fix a small typo in a comment. No functional changes. Cc: Sagar Arun Kamble <sagar.a.kamble@intel.com> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by:
Oscar Mateo <oscar.mateo@intel.com> Reviewed-by:
Sagar Arun Kamble <sagar.a.kamble@intel.com> Signed-off-by:
-
Chris Wilson authored
By using drm_gem_flink/drm_gem_open on an object using the same fd, it is possible for a client to create multiple handles pointing to the same object (tied to the same contexts and VMA), as exemplified by igt::gem_handle_to_libdrm_bo(). Since this duplication has been possible since forever, we cannot assume that the handle:(fpriv, object) is unique and so must handle the multiple users of a single VMA. v2: Added commentary noise. Testcase: igt/gem_close Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102355 Fixes: d1b48c1e ("drm/i915: Replace execbuf vma ht with an idr") Signed-off-by:
Michał Winiarski <michal.winiarski@intel.com>
-
Chris Wilson authored
Make sure that we are not leaking an entry in the ctx->handles_lut by asserting that the object was removed prior to being freed. This should be enforced by all such handles being removed by i915_gem_close_object. Signed-off-by:
-
Chris Wilson authored
During the context-close, we should be decoupling all the vma from the object so that upon object-closing we shouldn't see any vma from the already closed contexts. So include a check upon closing the object that the context is still open. v2: Eek, the fpriv check is required for shared objects. Double eek, BAT passed? Signed-off-by:
-
- 23 Aug, 2017 2 commits
-
-
Rodrigo Vivi authored
To avoid a potential hang condition with TLB invalidation we need to enable masked bit 5 of MMIO 0xE5F0 at boot. Same workaround was in place for previous platforms, but the register offset has changed for CNL. But also BSpec doesn't mention the bit 15 as set on gen9 platforms and mark bit as reserved on CNL. v2: Improve commit message accepting Oscar's suggestion. Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> Cc: Oscar Mateo <oscar.mateo@intel.com> Signed-off-by:
-
Oscar Mateo authored
CS sometimes hangs on 3D Push Constant dispatches with the new deref enhancement logic in CNL. v2: Improve the commit message (Rodrigo) Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> Signed-off-by:
-
