1. 29 Jul, 2020 8 commits
  2. 28 Jul, 2020 1 commit
  3. 27 Jul, 2020 4 commits
  4. 24 Jul, 2020 9 commits
  5. 20 Jul, 2020 14 commits
  6. 16 Jul, 2020 4 commits
    • Mikhail Malygin's avatar
      RDMA/rxe: Prevent access to wr->next ptr afrer wr is posted to send queue · 5f0b2a60
      Mikhail Malygin authored
      rxe_post_send_kernel() iterates over linked list of wr's, until the
      wr->next ptr is NULL.  However if we've got an interrupt after last wr is
      posted, control may be returned to the code after send completion callback
      is executed and wr memory is freed.
      
      As a result, wr->next pointer may contain incorrect value leading to
      panic. Store the wr->next on the stack before posting it.
      
      Fixes: 8700e3e7 ("Soft RoCE driver")
      Link: https://lore.kernel.org/r/20200716190340.23453-1-m.malygin@yadro.comSigned-off-by: default avatarMikhail Malygin <m.malygin@yadro.com>
      Signed-off-by: default avatarSergey Kojushev <s.kojushev@yadro.com>
      Signed-off-by: default avatarJason Gunthorpe <jgg@nvidia.com>
      5f0b2a60
    • Michal Kalderon's avatar
      RDMA/qedr: Add EDPM max size to alloc ucontext response · eb7f84e3
      Michal Kalderon authored
      User space should receive the maximum edpm size from kernel driver,
      similar to other edpm/ldpm related limits.  Add an additional parameter to
      the alloc_ucontext_resp structure for the edpm maximum size.
      
      In addition, pass an indication from user-space to kernel
      (and not just kernel to user) that the DPM sizes are supported.
      
      This is for supporting backward-forward compatibility between driver and
      lib for everything related to DPM transaction and limit sizes.
      
      This should have been part of commit mentioned in Fixes tag.
      
      Link: https://lore.kernel.org/r/20200707063100.3811-3-michal.kalderon@marvell.com
      Fixes: 93a3d05f ("RDMA/qedr: Add kernel capability flags for dpm enabled mode")
      Signed-off-by: default avatarAriel Elior <ariel.elior@marvell.com>
      Signed-off-by: default avatarMichal Kalderon <michal.kalderon@marvell.com>
      Signed-off-by: default avatarJason Gunthorpe <jgg@nvidia.com>
      eb7f84e3
    • Michal Kalderon's avatar
      RDMA/qedr: Add EDPM mode type for user-fw compatibility · bbe4f424
      Michal Kalderon authored
      In older FW versions the completion flag was treated as the ack flag in
      edpm messages.  commit ff937b91 ("qed: Add EDPM mode type for user-fw
      compatibility") exposed the FW option of setting which mode the QP is in
      by adding a flag to the qedr <-> qed API.
      
      This patch adds the qedr <-> libqedr interface so that the libqedr can set
      the flag appropriately and qedr can pass it down to FW.  Flag is added for
      backward compatibility with libqedr.
      
      For older libs, this flag didn't exist and therefore set to zero.
      
      Fixes: ac1b36e5 ("qedr: Add support for user context verbs")
      Link: https://lore.kernel.org/r/20200707063100.3811-2-michal.kalderon@marvell.comSigned-off-by: default avatarYuval Bason <yuval.bason@marvell.com>
      Signed-off-by: default avatarMichal Kalderon <michal.kalderon@marvell.com>
      Signed-off-by: default avatarJason Gunthorpe <jgg@nvidia.com>
      bbe4f424
    • Christophe JAILLET's avatar
      RDMA/usnic: switch from 'pci_' to 'dma_' API · 3e9fed7f
      Christophe JAILLET authored
      The wrappers in include/linux/pci-dma-compat.h should go away.
      
      The patch has been generated with the coccinelle script bellow.
      It has been compile tested.
      
      When memory is allocated, GFP_ATOMIC should be used to be consistent with
      the surrounding code.
      
      @@
      @@
      -    PCI_DMA_BIDIRECTIONAL
      +    DMA_BIDIRECTIONAL
      
      @@
      @@
      -    PCI_DMA_TODEVICE
      +    DMA_TO_DEVICE
      
      @@
      @@
      -    PCI_DMA_FROMDEVICE
      +    DMA_FROM_DEVICE
      
      @@
      @@
      -    PCI_DMA_NONE
      +    DMA_NONE
      
      @@
      expression e1, e2, e3;
      @@
      -    pci_alloc_consistent(e1, e2, e3)
      +    dma_alloc_coherent(&e1->dev, e2, e3, GFP_)
      
      @@
      expression e1, e2, e3;
      @@
      -    pci_zalloc_consistent(e1, e2, e3)
      +    dma_alloc_coherent(&e1->dev, e2, e3, GFP_)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_free_consistent(e1, e2, e3, e4)
      +    dma_free_coherent(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_map_single(e1, e2, e3, e4)
      +    dma_map_single(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_unmap_single(e1, e2, e3, e4)
      +    dma_unmap_single(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4, e5;
      @@
      -    pci_map_page(e1, e2, e3, e4, e5)
      +    dma_map_page(&e1->dev, e2, e3, e4, e5)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_unmap_page(e1, e2, e3, e4)
      +    dma_unmap_page(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_map_sg(e1, e2, e3, e4)
      +    dma_map_sg(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_unmap_sg(e1, e2, e3, e4)
      +    dma_unmap_sg(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_dma_sync_single_for_cpu(e1, e2, e3, e4)
      +    dma_sync_single_for_cpu(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_dma_sync_single_for_device(e1, e2, e3, e4)
      +    dma_sync_single_for_device(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_dma_sync_sg_for_cpu(e1, e2, e3, e4)
      +    dma_sync_sg_for_cpu(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_dma_sync_sg_for_device(e1, e2, e3, e4)
      +    dma_sync_sg_for_device(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2;
      @@
      -    pci_dma_mapping_error(e1, e2)
      +    dma_mapping_error(&e1->dev, e2)
      
      @@
      expression e1, e2;
      @@
      -    pci_set_dma_mask(e1, e2)
      +    dma_set_mask(&e1->dev, e2)
      
      @@
      expression e1, e2;
      @@
      -    pci_set_consistent_dma_mask(e1, e2)
      +    dma_set_coherent_mask(&e1->dev, e2)
      
      Link: https://lore.kernel.org/r/20200711073120.249146-1-christophe.jaillet@wanadoo.frSigned-off-by: default avatarChristophe JAILLET <christophe.jaillet@wanadoo.fr>
      Signed-off-by: default avatarJason Gunthorpe <jgg@nvidia.com>
      3e9fed7f