- 11 Mar, 2009 1 commit
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Benjamin Herrenschmidt authored
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- 09 Mar, 2009 7 commits
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Martyn Welch authored
The registers for the local bus are incorrectly set to 0xf8005000 rather than there actual location of 0xfef05000. Signed-off-by:
Martyn Welch <martyn.welch@gefanuc.com> Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Xiaotian Feng authored
After UART interrupt handler is installed and rx is enabled, if an rx interrupt comes before hardware init, rx->cur will be updated. Then the hardware init will reset BD and make rx->cur out of sync, move the hardware init code before request_irq. Signed-off-by:
Xiaotian Feng <xiaotian.feng@windriver.com> Signed-off-by:
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Timur Tabi authored
The Freescale Serial Synchronous Interface (SSI) is an audio device present on some Freescale SOCs. Various implementations of the SSI have a different transmit and receive FIFO depth, but are otherwise identical. To support these variations, add a new property fsl,fifo-depth to the SSI node that specifies the depth of the FIFOs. Also update the MPC8610 HPCD device tree with this property. Signed-off-by:
Timur Tabi <timur@freescale.com> Signed-off-by:
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Kumar Gala authored
The e500mc core supports the new tlbilx instructions that do core local invalidates and also provide us the ability to take down all TLB entries matching a given PID. Signed-off-by: -
Anton Vorontsov authored
On MPC837X CPUs Dual-Role USB isn't always available (for example DR USB pins can be muxed away to eSDHC). U-Boot adds status = "disabled" property into the DR USB nodes to indicate that we must not try to configure or probe Dual-Role USB, otherwise we'll break eSDHC support on targets with MPC837X CPUs. Signed-off-by:
Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by:
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dayu@datangmobile.cn authored
The interrupt pending register is write 1 clear. If there are more than one external interrupts pending at the same time, acking the first interrupt by reading pending register then OR the corresponding bit and write back to pending register will also clear other interrupt pending bits. That will cause loss of interrupt. Signed-off-by:
Da Yu <dayu@datangmobile.cn> Signed-off-by:
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Timur Tabi authored
The i2c_wait() function is using wait_event_interruptible_timeout() to wait for the I2C controller to signal that it has completed an I2C bus operation. If the process that causes the I2C operation terminated abruptly, the wait will be interrupted, returning an error. It is better to let the I2C operation finished before the process exits. It is safe to use wait_event_timeout() instead, because the timeout will allow the process to exit if the I2C bus hangs. It's also better to allow the I2C operation to finish, because unacknowledged I2C operations can cause the I2C bus to hang. Signed-off-by:
Ben Dooks <ben-linux@fluff.org> Signed-off-by:
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- 06 Mar, 2009 1 commit
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Grant Likely authored
This patch updates the Xilinx ML507 device tree to match the released ML507 powerpc reference design (ml507_ppc440_emb_ref). This patch is needed to boot Linux on the ML507 powerpc reference design without manually generating and tweaking a device tree from the project directory. Signed-off-by:Grant Likely <grant.likely@secretlab.ca>
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- 03 Mar, 2009 1 commit
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Benjamin Herrenschmidt authored
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- 27 Feb, 2009 3 commits
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Grant Likely authored
To better match the ePAPR specification, device nodes which claim "simple-bus" compatibility should be probed by default. Signed-off-by: -
Grzegorz Bernacki authored
On digsy MTC PSC4 and PSC5 should be configured as UART, not PSC3 and PSC4. Signed-off-by:
Grzegorz Bernacki <gjb@semihalf.com> Signed-off-by:
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Grzegorz Bernacki authored
The following options are enabled to support the digsy-mtc. - LXT phy - AT24 eeprom - RTC (DS1337) - MTD partitioning based on OF description Signed-off-by:
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- 23 Feb, 2009 19 commits
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Anton Blanchard authored
Randomise ELF_ET_DYN_BASE, which is used when loading position independent executables. Signed-off-by:
Anton Blanchard <anton@samba.org> Signed-off-by:
Benjamin Herrenschmidt <benh@kernel.crashing.org>
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Anton Blanchard authored
On 64bit there is a possibility our stack and mmap randomisation will put the two close enough such that we can't expand our stack to match the ulimit specified. To avoid this, start the upper mmap address at 1GB + 128MB below the top of our address space, so in the worst case we end up with the same ~128MB hole as in 32bit. This works because we randomise the stack over a 1GB range. Signed-off-by:
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Anton Blanchard authored
get_random_int() returns the same value within a 1 jiffy interval. This means that the mmap and stack regions will almost always end up the same distance apart, making a relative offset based attack possible. To fix this, shift the randomness we use for the mmap region by 1 bit. Signed-off-by:
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Anton Blanchard authored
Randomize the heap. before: tundro2:~ # sleep 1 & cat /proc/${!}/maps | grep heap 10017000-10118000 rw-p 10017000 00:00 0 [heap] 10017000-10118000 rw-p 10017000 00:00 0 [heap] 10017000-10118000 rw-p 10017000 00:00 0 [heap] 10017000-10118000 rw-p 10017000 00:00 0 [heap] 10017000-10118000 rw-p 10017000 00:00 0 [heap] after tundro2:~ # sleep 1 & cat /proc/${!}/maps | grep heap 19419000-1951a000 rw-p 19419000 00:00 0 [heap] 325ff000-32700000 rw-p 325ff000 00:00 0 [heap] 1a97c000-1aa7d000 rw-p 1a97c000 00:00 0 [heap] 1cc60000-1cd61000 rw-p 1cc60000 00:00 0 [heap] 1afa9000-1b0aa000 rw-p 1afa9000 00:00 0 [heap] Signed-off-by: -
Anton Blanchard authored
Randomise the lower bits of the stack address. More randomisation is good for security but the scatter can also help with SMT threads that share an L1. A quick test case shows this working: int main() { int sp; printf("%x\n", (unsigned long)&sp & 4095); } before: 80 80 80 80 80 after: 610 490 300 6b0 d80 Signed-off-by: -
Anton Blanchard authored
At the moment we randomise the stack by 8MB on 32bit and 64bit tasks. Since we have a lot more address space to play with on 64bit, lets do what x86 does and increase that randomisation to 1GB: before: # for i in seq `1 10` ; do sleep 1 & cat /proc/${!}/maps | grep stack; done fffffebc000-fffffed1000 rw-p ffffffeb000 00:00 0 [stack] ffffff5a000-ffffff6f000 rw-p ffffffeb000 00:00 0 [stack] fffffdb2000-fffffdc7000 rw-p ffffffeb000 00:00 0 [stack] fffffd3e000-fffffd53000 rw-p ffffffeb000 00:00 0 [stack] fffffad9000-fffffaee000 rw-p ffffffeb000 00:00 0 [stack] after: # for i in seq `1 10` ; do sleep 1 & cat /proc/${!}/maps | grep stack; done ffff5c27000-ffff5c3c000 rw-p ffffffeb000 00:00 0 [stack] fffebe5e000-fffebe73000 rw-p ffffffeb000 00:00 0 [stack] fffcb298000-fffcb2ad000 rw-p ffffffeb000 00:00 0 [stack] fffc719d000-fffc71b2000 rw-p ffffffeb000 00:00 0 [stack] fffe01af000-fffe01c4000 rw-p ffffffeb000 00:00 0 [stack] Signed-off-by: -
Anton Blanchard authored
Randomise mmap start address - 8MB on 32bit and 1GB on 64bit tasks. Until ppc32 uses the mmap.c functionality, this is ppc64 specific. Before: # ./test & cat /proc/${!}/maps|tail -2|head -1 f75fe000-f7fff000 rw-p f75fe000 00:00 0 f75fe000-f7fff000 rw-p f75fe000 00:00 0 f75fe000-f7fff000 rw-p f75fe000 00:00 0 f75fe000-f7fff000 rw-p f75fe000 00:00 0 f75fe000-f7fff000 rw-p f75fe000 00:00 0 After: # ./test & cat /proc/${!}/maps|tail -2|head -1 f718b000-f7b8c000 rw-p f718b000 00:00 0 f7551000-f7f52000 rw-p f7551000 00:00 0 f6ee7000-f78e8000 rw-p f6ee7000 00:00 0 f74d4000-f7ed5000 rw-p f74d4000 00:00 0 f6e9d000-f789e000 rw-p f6e9d000 00:00 0 Similar for 64bit, but with 1GB of scatter: # ./test & cat /proc/${!}/maps|tail -2|head -1 fffb97b5000-fffb97b6000 rw-p fffb97b5000 00:00 0 fffce9a3000-fffce9a4000 rw-p fffce9a3000 00:00 0 fffeaaf2000-fffeaaf3000 rw-p fffeaaf2000 00:00 0 fffd88ac000-fffd88ad000 rw-p fffd88ac000 00:00 0 fffbc62e000-fffbc62f000 rw-p fffbc62e000 00:00 0 Signed-off-by: -
Anton Blanchard authored
Rearrange mmap.c to better match the x86 version. Signed-off-by:
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Anton Blanchard authored
Move is_32bit_task into asm/thread_info.h, that allows us to test for 32/64bit tasks without an ugly CONFIG_PPC64 ifdef. Signed-off-by:
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Giuliano Pochini authored
On Wed, 18 Feb 2009 22:18:21 +0100 Giuliano Pochini <pochini@shiny.it> wrote: Since 2.6.28, /sys/devices/system/cpu/cpu*/online don't exist anymore on 32-bit PowerMacs due to change in the generic powerpc code. Signed-off-by:
Giuliano Pochini <pochini@shiny.it> Signed-off-by:
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Benjamin Krill authored
The new firmware release exports further RTC calls. This patch adds these calls to the QPACE platform setup file. Signed-off-by:
Benjamin Krill <ben@codiert.org> Signed-off-by:
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Michael Neuling authored
When we introduced VSX, we changed the way FPRs are stored in the thread_struct. Unfortunately we missed the load/store float double alignment handler code when updating how we access FPRs in the thread_struct. Below fixes this and merges the little/big endian case. Signed-off-by:
Michael Neuling <mikey@neuling.org> Signed-off-by:
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Michael Neuling authored
lfiwzx is a new floating point load instruction in 2.06 that needs an alignment handler for Linux. Turns out to be the worlds easiest handler to add. Signed-off-by:
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Nathan Fontenot authored
This patch reworks the hot_add_scn_to_nid and its supporting functions to make them easier to understand. There are no functional changes in this patch and has been tested on machine with memory represented in the device tree as memory nodes and in the ibm,dynamic-memory property. My previous patch that introduced support for hotplug memory add on systems whose memory was represented by the ibm,dynamic-memory property of the device tree only left the code more unintelligible. This will hopefully makes things easier to understand. Signed-off-by:
Nathan Fontenot <nfont@austin.ibm.com> Signed-off-by:
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Brian King authored
While testing partition migration with heavy CPU load using shared processors, it was observed that sometimes the migration would never complete and would appear to hang. Currently, the migration code assumes that if H_SUCCESS is returned from the H_JOIN then the migration is complete and the processor is waking up on the target system. If there was an outstanding PROD to the processor when the H_JOIN is called, however, it will return H_SUCCESS on the source system, causing the migration to hang, or in some scenarios cause the kernel to crash on the complete call waking the caller of rtas_percpu_suspend_me. Fix this by calling H_JOIN multiple times if necessary during the migration. Signed-off-by:
Brian King <brking@linux.vnet.ibm.com> Signed-off-by:
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Michael Ellerman authored
There are hardware limitations on the number of available MSIs, which firmware expresses using a property named "ibm,pe-total-#msi". This property tells us how many MSIs are available for devices below the point in the PCI tree where we find the property. For old firmwares which don't have the property, we assume there are 8 MSIs available per "partitionable endpoint" (PE). The PE can be found using existing EEH code, which uses the methods described in PAPR. For our purposes we want the parent of the node that's identified using this method. When a driver requests n MSIs for a device, we first establish where the "ibm,pe-total-#msi" property above that device is, or we find the PE if the property is not found. In both cases we call this node the "pe_dn". We then count all non-bridge devices below the pe_dn, to establish how many devices in total may need MSIs. The quota is then simply the total available divided by the number of devices, if the request is less than or equal to the quota, the request is fine and we're done. If the request is greater than the quota, we try to determine if there are any "spare" MSIs which we can give to this device. Spare MSIs are found by looking for other devices which can never use their full quota, because their "req#msi(-x)" property is less than the quota. If we find any spare, we divide the spares by the number of devices that could request more than their quota. This ensures the spare MSIs are spread evenly amongst all over-quota requestors. Signed-off-by:
Michael Ellerman <michael@ellerman.id.au> Signed-off-by:
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Michael Ellerman authored
If a driver asks for more MSIs than the devices "req#msi(-x)" property, we currently return -ENOSPC. This doesn't give the driver any chance to make a new request with a number that might work. So if "req#msi(-x)" is less than the request, return its value. To be 100% safe, make sure we return an error if req_msi == 0. Signed-off-by:
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Kumar Gala authored
The e500mc supports the new msgsnd/doorbell mechanisms that were added in the Power ISA 2.05 architecture. We use the normal level doorbell for doing SMP IPIs at this point. Signed-off-by:
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Arnd Bergmann authored
cbe_cpufreq has a partial dependency on cbe_cpufreq_pmi, which cannot be easily expressed in Kconfig. This fixes it by introducing an extra Kconfig symbol CBE_CPUFREQ_PMI_ENABLE. To make the dependency clearer, turn PPC_PMI into an automatic symbol. Reported-by:
Arnd Bergmann <arnd@arndb.de> Acked-by:
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- 22 Feb, 2009 8 commits
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Jeremy Kerr authored
The spufs context directory contents definitions are not changed after initialisation, so we can declare them as const. We can do the same with the spu coredump reader callbacks too. Signed-off-by:
Jeremy Kerr <jk@ozlabs.org> Signed-off-by:
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Jeremy Kerr authored
Currently, we may setup the MFC for isolated mode initilaisation with the purge still active. This means that DMAs required to perform the init do not happen. This change clears the purge status after doing the purge, so that the isolated init can proceed. Signed-off-by:
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Jeremy Kerr authored
Currently, spu_handle_mm_fault disregards the 'ret' variable and always returns -EFAULT on error. This change refactos spu_handle_mm_fault a little, to return the ret variable as appropriate. This allows us to combine the error and sucess paths. Also, remove the #if-0-ed IS_VALID_EA() check, it has never been used. Signed-off-by:
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Anton Blanchard authored
At the moment we size the hashtable based on 4kB pages / 2, even on a 64kB kernel. This results in a hashtable that is much larger than it needs to be. Grab the real page size and size the hashtable based on that Note: This only has effect on non hypervisor machines. Signed-off-by:
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Ilya Yanok authored
This patch rewrites consistent dma allocations support to use vmalloc layer to allocate virtual memory space from vmalloc pool and get rid of CONFIG_CONSISTENT_{START,SIZE}. This greatly simplifies the code by effectively removing a custom allocator we had for virtual space. Signed-off-by:Ilya Yanok <yanok@emcraft.com> Signed-off-by:
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Kumar Gala authored
include/asm/bootx.h:12: include of <linux/types.h> is preferred over <asm/types.h> include/asm/bootx.h:57: found __[us]{8,16,32,64} type without #include <linux/types.h> include/asm/elf.h:5: include of <linux/types.h> is preferred over <asm/types.h> include/asm/kvm.h:23: include of <linux/types.h> is preferred over <asm/types.h> include/asm/kvm.h:26: found __[us]{8,16,32,64} type without #include <linux/types.h> include/asm/ps3fb.h:33: found __[us]{8,16,32,64} type without #include <linux/types.h> include/asm/spu_info.h:27: found __[us]{8,16,32,64} type without #include <linux/types.h> include/asm/swab.h:11: include of <linux/types.h> is preferred over <asm/types.h> Signed-off-by: -
Tom Arbuckle authored
Old OF variants used to create a 'dummy' parent node "multifunc-device" for devices with more than one PCI function. Our code that matches OF nodes to PCI devices dealt with that in one place but not in another, this fixes it. This has the practical effect of fixing interrupt routing of multifunction PCI cards on some older PowerMac machines. Signed-off-by:
Tom Arbuckle <tom.d.arbuckle@gmail.com> Signed-off-by:
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Kumar Gala authored
Create a new header that becomes a single location for defining PowerPC opcodes used by code that is either generationg instructions at runtime (fixups, debug, etc.), emulating instructions, or just compiling instructions old assemblers don't know about. We currently don't handle the floating point emulation or alignment decode as both are better handled by the specific decode support they already have. Added support for the new dcbzl, dcbal, msgsnd, tlbilx, & wait instructions since older assemblers don't know about them. Signed-off-by:
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