1. 24 May, 2018 2 commits
    • Yunwei Zhang's avatar
      drm/i915/icl: Enable WaProgramMgsrForCorrectSliceSpecificMmioReads · d78fa508
      Yunwei Zhang authored
      WaProgramMgsrForCorrectSliceSpecificMmioReads applies for Icelake as
      well.
      
      References: HSD#1405586840, BSID#0575
      
      v2:
       - GEN11 mask is different from its predecessors. (Oscar)
       - Better separate GEN10 and GEN11. (Oscar)
      
      Cc: Oscar Mateo <oscar.mateo@intel.com>
      Cc: Michel Thierry <michel.thierry@intel.com>
      Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
      Cc: Chris Wilson <chris@chris-wilson.co.uk>
      Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
      Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
      Signed-off-by: default avatarYunwei Zhang <yunwei.zhang@intel.com>
      Reviewed-by: default avatarOscar Mateo <oscar.mateo@intel.com>
      Signed-off-by: default avatarMika Kuoppala <mika.kuoppala@linux.intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/1526683232-24753-1-git-send-email-yunwei.zhang@intel.com
      d78fa508
    • Yunwei Zhang's avatar
      drm/i915/cnl: Implement WaProgramMgsrForCorrectSliceSpecificMmioReads · 1e40d4ae
      Yunwei Zhang authored
      WaProgramMgsrForCorrectSliceSpecificMmioReads dictate that before any MMIO
      read into Slice/Subslice specific registers, MCR packet control
      register(0xFDC) needs to be programmed to point to any enabled
      slice/subslice pair. Otherwise, incorrect value will be returned.
      
      However, that means each subsequent MMIO read will be forwarded to a
      specific slice/subslice combination as read is unicast. This is OK since
      slice/subslice specific register values are consistent in almost all cases
      across slice/subslice. There are rare occasions such as INSTDONE that this
      value will be dependent on slice/subslice combo, in such cases, we need to
      program 0xFDC and recover this after. This is already covered by
      read_subslice_reg.
      
      Also, 0xFDC will lose its information after TDR/engine reset/power state
      change.
      
      References: HSD#1405586840, BSID#0575
      
      v2:
       - use fls() instead of find_last_bit() (Chris)
       - added INTEL_SSEU to extract sseu from device info. (Chris)
      v3:
       - rebase on latest tip
      v5:
       - Added references (Mika)
       - Change the ordered of passing arguments and etc. (Ursulin)
      v7:
       - Moved WA explanation Comments(Oscar)
       - Rebased.
      v8:
       - Renamed sanitize_mcr to calculate_s_ss_select. (Oscar)
       - calculate s/ss selector instead of whole mcr. (Oscar)
      v9:
       - Updated function name (Oscar)
       - Remove redundant variables (Oscar)
      v10:
       - Separate pre-GEN10 and GEN11 mask. (Oscar)
      
      Cc: Oscar Mateo <oscar.mateo@intel.com>
      Cc: Michel Thierry <michel.thierry@intel.com>
      Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
      Cc: Chris Wilson <chris@chris-wilson.co.uk>
      Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
      Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
      Signed-off-by: default avatarYunwei Zhang <yunwei.zhang@intel.com>
      Reviewed-by: default avatarOscar Mateo <oscar.mateo@intel.com>
      Signed-off-by: default avatarMika Kuoppala <mika.kuoppala@linux.intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/1526683197-24656-1-git-send-email-yunwei.zhang@intel.com
      1e40d4ae
  2. 23 May, 2018 9 commits
  3. 22 May, 2018 8 commits
  4. 21 May, 2018 1 commit
  5. 19 May, 2018 6 commits
  6. 18 May, 2018 10 commits
  7. 17 May, 2018 4 commits