1. 11 Oct, 2018 25 commits
  2. 10 Oct, 2018 15 commits
    • David S. Miller's avatar
      Merge branch 'octeontx2-af-Add-RVU-Admin-Function-driver' · a6deaa99
      David S. Miller authored
      Sunil Goutham says:
      
      ====================
      octeontx2-af: Add RVU Admin Function driver
      
      Resource virtualization unit (RVU) on Marvell's OcteonTX2 SOC maps HW
      resources from the network, crypto and other functional blocks into
      PCI-compatible physical and virtual functions. Each functional block
      again has multiple local functions (LFs) for provisioning to PCI devices.
      RVU supports multiple PCIe SRIOV physical functions (PFs) and virtual
      functions (VFs). PF0 is called the administrative / admin function (AF)
      and has privileges to provision RVU functional block's LFs to each of the
      PF/VF.
      
      RVU managed networking functional blocks
       - Network pool allocator (NPA)
       - Network interface controller (NIX)
       - Network parser CAM (NPC)
       - Schedule/Synchronize/Order unit (SSO)
      
      RVU managed non-networking functional blocks
       - Crypto accelerator (CPT)
       - Scheduled timers unit (TIM)
       - Schedule/Synchronize/Order unit (SSO)
         Used for both networking and non networking usecases
       - Compression (upcoming in future variants of the silicons)
      
      Resource provisioning examples
       - A PF/VF with NIX-LF & NPA-LF resources works as a pure network device
       - A PF/VF with CPT-LF resource works as a pure cyrpto offload device.
      
      This admin function driver neither receives any data nor processes it i.e
      no I/O, a configuration only driver.
      
      PF/VFs communicates with AF via a shared memory region (mailbox). Upon
      receiving requests from PF/VF, AF does resource provisioning and other
      HW configuration. AF is always attached to host, but PF/VFs may be used
      by host kernel itself, or attached to VMs or to userspace applications
      like DPDK etc. So AF has to handle provisioning/configuration requests
      sent by any device from any domain.
      
      This patch series adds logic for the following
       - RVU AF driver with functional blocks provisioning support.
       - Mailbox infrastructure for communication between AF and PFs.
       - CGX (MAC controller) driver which communicates with firmware for
         managing  physical ethernet interfaces. AF collects info from this
         driver and forwards the same to the PF/VFs uaing these interfaces.
      
      This is the first set of patches out of 80+ patches.
      
      Changes from v8:
       1 Removed unnecessary typecasts in entire series
         - Suggested by David Miller
       2 Added COMPILE_TEST to AF driver
         - Suggested by Arnd Bergmann
       3 Changed udelay() to usleep_range() in rvu_poll_reg
         - Suggested by Arnd Bergmann
       4 MSIX vector base IOMMU mapping is done using dma_map_resource()
         API instead of dma_map_single() as it accepts physical address.
         - Issue pointed by Arnd Bergmann
      
      Changes from v7:
       1 Removed unnecessary typecasts in mbox infra code.
         - Suggested by David Miller
       2 Fixed MAINTAINERS patch
         - Suggested by Joe Perches
      
      Changes from v6:
       Fixed ordering of local variables from longest to shortest line.
         - Suggested by David Miller
      
      Changes from v5:
       Modified bitfield based command structures to bitmasks for communication
       with firmware, to address endianness issues.
         - Suggested by Arnd Bergmann
      
      Changes from v4:
       1 Removed module author/version/description from CGX driver as it's now
         merged with AF driver module.
         - Suggested by Arnd Bergmann
       2 Added big-endian bitfields for CGX's kernel <=> firmware communication
         command structures.
         - Suggested by Arnd Bergmann
      
      Changes from v3:
       Moved driver from drivers/soc to drivers/net/ethernet
         - Suggested by Arnd Bergmann
       https://patchwork.kernel.org/cover/10587635/
      
      Changes from v2:
       No changes, submitted again with netdev mailing list in loop.
         - Suggested by Arnd Bergmann and Andrew Lunn
      
      Changes from v1:
       1 Merged RVU admin function and CGX drivers into a single module
         - Suggested by Arnd Bergmann
       2 Pulled mbox communication APIs into a separate module to remove
         admin function driver dependency in a VM where AF is not attached.
         - Suggested by Arnd Bergmann
      ====================
      Reviewed-by: default avatarArnd Bergmann <arnd@arndb.de>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      a6deaa99
    • Sunil Goutham's avatar
      MAINTAINERS: Add entry for Marvell OcteonTX2 Admin Function driver · 1f2cf1b3
      Sunil Goutham authored
      Added maintainers entry for Marvell OcteonTX2 SOC's RVU
      admin function driver.
      Signed-off-by: default avatarSunil Goutham <sgoutham@marvell.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      1f2cf1b3
    • Linu Cherian's avatar
      octeontx2-af: Register for CGX lmac events · afb8902c
      Linu Cherian authored
      Added support in RVU AF driver to register for
      CGX LMAC link status change events from firmware
      and managing them. Processing part will be added
      in followup patches.
      
      - Introduced eventqueue for posting events from cgx lmac.
        Queueing mechanism will ensure that events can be posted
        and firmware can be acked immediately and hence event
        reception and processing are decoupled.
      - Events gets added to the queue by notification callback.
        Notification callback is expected to be atomic, since it
        is called from interrupt context.
      - Events are dequeued and processed in a worker thread.
      Signed-off-by: default avatarLinu Cherian <lcherian@marvell.com>
      Signed-off-by: default avatarSunil Goutham <sgoutham@marvell.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      afb8902c
    • Linu Cherian's avatar
      octeontx2-af: Add support for CGX link management · 1463f382
      Linu Cherian authored
      CGX LMAC initialization, link status polling etc is done
      by low level secure firmware. For link management this patch
      adds a interface or communication mechanism between firmware
      and this kernel CGX driver.
      
      - Firmware interface specification is defined in cgx_fw_if.h.
      - Support to send/receive commands/events to/form firmware.
      - events/commands implemented
        * link up
        * link down
        * reading firmware version
      Signed-off-by: default avatarLinu Cherian <lcherian@marvell.com>
      Signed-off-by: default avatarNithya Mani <nmani@marvell.com>
      Signed-off-by: default avatarSunil Goutham <sgoutham@marvell.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      1463f382
    • Linu Cherian's avatar
      octeontx2-af: Set RVU PFs to CGX LMACs mapping · 3a4fa841
      Linu Cherian authored
      Each of the enabled CGX LMAC is considered a physical
      interface and RVU PFs are mapped to these. VFs of these
      SRIOV PFs will be virtual interfaces and share CGX LMAC
      along with PF.
      
      This mapping info will be used later on for Rx/Tx pkt steering.
      Signed-off-by: default avatarLinu Cherian <lcherian@marvell.com>
      Signed-off-by: default avatarGeetha sowjanya <gakula@marvell.com>
      Signed-off-by: default avatarSunil Goutham <sgoutham@marvell.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      3a4fa841
    • Sunil Goutham's avatar
      octeontx2-af: Add Marvell OcteonTX2 CGX driver · 8e22f040
      Sunil Goutham authored
      This patch adds basic template for Marvell OcteonTX2's
      CGX ethernet interface driver. Just the probe.
      RVU AF driver will use APIs exported by this driver
      for various things like PF to physical interface mapping,
      loopback mode, interface stats etc. Hence marged both
      drivers into a single module.
      Signed-off-by: default avatarSunil Goutham <sgoutham@marvell.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      8e22f040
    • Geetha sowjanya's avatar
      octeontx2-af: Reconfig MSIX base with IOVA · 34b34ee0
      Geetha sowjanya authored
      HW interprets RVU_AF_MSIXTR_BASE address as an IOVA, hence
      create a IOMMU mapping for the physcial address configured by
      firmware and reconfig RVU_AF_MSIXTR_BASE with IOVA.
      Signed-off-by: default avatarGeetha sowjanya <gakula@marvell.com>
      Signed-off-by: default avatarSunil Goutham <sgoutham@marvell.com>
      Reviewed-by: default avatarArnd Bergmann <arnd@arndb.de>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      34b34ee0
    • Sunil Goutham's avatar
      octeontx2-af: Configure block LF's MSIX vector offset · 756051e2
      Sunil Goutham authored
      Firmware configures a certain number of MSIX vectors to each of
      enabled RVU PF/VF. When a block LF is attached to a PF/VF, number
      of MSIX vectors needed by that LF are set aside (out of PF/VF's
      total MSIX vectors) and LF's msix_offset is configured in HW.
      
      Also added support for a RVU PF/VF to retrieve that block LF's
      MSIX vector offset information from AF via mbox.
      Signed-off-by: default avatarSunil Goutham <sgoutham@marvell.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      756051e2
    • Sunil Goutham's avatar
      octeontx2-af: Add RVU block LF provisioning support · 746ea742
      Sunil Goutham authored
      Added support for a RVU PF/VF to request AF via mailbox
      to attach or detach NPA/NIX/SSO/SSOW/TIM/CPT block LFs.
      Also supports partial detachment and modifying current
      LF attached count of a certian block type.
      Signed-off-by: default avatarSunil Goutham <sgoutham@marvell.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      746ea742
    • Sunil Goutham's avatar
      octeontx2-af: Scan blocks for LFs provisioned to PF/VF · 114a767e
      Sunil Goutham authored
      Scan all RVU blocks to find any 'LF to RVU PF/VF' mapping done by
      low level firmware. If found any, mark them as used in respective
      block's LF bitmap and also save mapped PF/VF's PF_FUNC info.
      
      This is done to avoid reattaching a block LF to a different RVU PF/VF.
      Signed-off-by: default avatarSunil Goutham <sgoutham@marvell.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      114a767e
    • Aleksey Makarov's avatar
      octeontx2-af: Convert mbox msg id check to a macro · 1f154625
      Aleksey Makarov authored
      With 10's of mailbox messages expected to be handled in future,
      checking for message id could become a lengthy switch case. Hence
      added a macro to auto generate the switch case for each msg id.
      Signed-off-by: default avatarAleksey Makarov <amakarov@marvell.com>
      Signed-off-by: default avatarSunil Goutham <sgoutham@marvell.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      1f154625
    • Sunil Goutham's avatar
      octeontx2-af: Add mailbox IRQ and msg handlers · 7304ac45
      Sunil Goutham authored
      This patch adds support for mailbox interrupt and message
      handling. Mapped mailbox region and registered a workqueue
      for message handling. Enabled mailbox IRQ of RVU PFs
      and registered a interrupt handler. When IRQ is triggered
      work is added to the mbox workqueue for msgs to get processed.
      Signed-off-by: default avatarSunil Goutham <sgoutham@marvell.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      7304ac45
    • Aleksey Makarov's avatar
      octeontx2-af: Add mailbox support infra · 021e2e53
      Aleksey Makarov authored
      This patch adds mailbox support infrastructure APIs.
      Each RVU device has a dedicated 64KB mailbox region
      shared with it's peer for communication. RVU AF has
      a separate mailbox region shared with each of RVU PFs
      and a RVU PF has a separate region shared with each of
      it's VF.
      
      These set of APIs are used by this driver (RVU AF) and
      other RVU PF/VF drivers eg netdev, crypto e.t.c.
      Signed-off-by: default avatarAleksey Makarov <amakarov@marvell.com>
      Signed-off-by: default avatarSunil Goutham <sgoutham@marvell.com>
      Signed-off-by: default avatarLukasz Bartosik <lbartosik@marvell.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      021e2e53
    • Sunil Goutham's avatar
      octeontx2-af: Gather RVU blocks HW info · 1054a622
      Sunil Goutham authored
      This patch gathers NPA/NIX/SSO/SSOW/TIM/CPT RVU blocks's
      HW info like number of LFs. Important register offsets
      saved for later use to avoid code duplication for each block.
      A bitmap is allocated for each of the blocks which later
      on will be used to allocate a LF for a RVU PF/VF.
      
      Also added RVU NIX/NPA block registers and few registers
      of other blocks.
      Signed-off-by: default avatarSunil Goutham <sgoutham@marvell.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      1054a622
    • Sunil Goutham's avatar
      octeontx2-af: Reset all RVU blocks · 54d55781
      Sunil Goutham authored
      Go through all BLKADDRs and check which ones are implemented
      on this silicon and do a HW reset of each implemented block.
      Also added all RVU AF and PF register offsets.
      Signed-off-by: default avatarSunil Goutham <sgoutham@marvell.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      54d55781