- 22 Sep, 2020 21 commits
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git://anongit.freedesktop.org/drm/drm-intelDave Airlie authored
Driver Changes: - Reduce INTEL_DISPLAY_ENABLED to just removed outputs treating it as disconnected (Ville) - Introducing new AUX, DVO, and TC ports and refactoring code around hot plug interrupts for those. (Ville) - Centralize PLL_ENABLE register lookup (Anusha) - Improvements around DP downstream facing ports (DFP). (Ville) - Enable YCbCr 444->420 conversion for HDMI DFPs. Ville - Remove the old global state on Display's atomic modeset (Ville) - Nuke force_min_cdclk_changed (Ville) - Extend a TGL W/A to all SKUs and to RKL (Swathi) Signed-off-by:
Dave Airlie <airlied@redhat.com> From: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200918173013.GA748558@intel.com
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Dave Airlie authored
Merge tag 'cdns-mhdp-5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux into drm-next Cadence MHDP8546 DisplayPort bridge driver Signed-off-by:
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Dave Airlie authored
Merge tag 'exynos-drm-next-v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos into drm-next Two cleanups - Simply use dev_err_probe() instead of returning -EPROBE_DEFER. - Drop drm_parms allocation and deallocation code which aren't needed. Signed-off-by:
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ssh://git.freedesktop.org/git/tegra/linuxDave Airlie authored
drm/tegra: Changes for v5.10-rc1 This is a handful of patches that add bridge support for Tegra devices and fix a couple of minor issues. Signed-off-by:
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git://linuxtv.org/pinchartl/mediaDave Airlie authored
Miscellaneous R-Car display driver changes: - R8A7742, R8A774E1 and R8A77961 support - Fixes for pitch of YUV planar formats, non-visible plane handling and VSP device reference count - Kconfig fix to avoid displaying disabled options in .config Signed-off-by:
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Laurent Pinchart authored
The reference to the VSP device acquired with of_find_device_by_node() in rcar_du_vsp_init() is never released. Fix it with a drmm action, which gets run both in the probe error path and in the remove path. Fixes: 6d62ef3a ("drm: rcar-du: Expose the VSP1 compositor through KMS planes") Reported-by:
Yu Kuai <yukuai3@huawei.com> Reviewed-by:
Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Signed-off-by:
Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
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Lad Prabhakar authored
The rcar_dw_hdmi driver is also used on Renesas RZ/G2 SoCs. Update the Kconfig entry description to reflect this. Signed-off-by:
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by:
Chris Paterson <Chris.Paterson2@renesas.com> Reviewed-by:
Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by:
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Laurent Pinchart authored
The DU driver handles non-visible planes (fully clipped by the display's boundaries) by considering them as disabled. It thus disables the plane at the hardware level when the plane is moved off-screen. However, if the plane was previously disabled and is non-visible when it gets enabled, the attempt to disable it crashes, as the plane wasn't previously enabled. Fix it. Signed-off-by:
Kieran Bingham <kieran.bingham@ideasonboard.com>
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Laurent Pinchart authored
When creating a frame buffer, the driver verifies that the pitches for the chroma planes match the luma plane. This is done incorrectly for fully planar YUV formats, without taking horizontal subsampling into account. Fix it. Signed-off-by:
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Kuninori Morimoto authored
This patch adds R-Car M3-W+ (R8A77961) support which is compatible with the R-Car M3-W (R8A77960). Signed-off-by:
Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Reviewed-by:
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Kuninori Morimoto authored
This patch adds R-Car M3-W+ (R8A77961) SoC bindings. Signed-off-by:
Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by:
Rob Herring <robh@kernel.org> Signed-off-by:
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Kuninori Morimoto authored
The DT example erronously uses the "renesas,r8a7795-dw-hdmi", when the correct value is "renesas,r8a7795-hdmi". It is furthermore missing the generic "renesas,rcar-gen3-hdmi" compatible string. Fix it. Signed-off-by:
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Kuninori Morimoto authored
Document the R-Car M3-W+ (R8A77961) SoC in the R-Car DU bindings. Signed-off-by:
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Marian-Cristian Rotariu authored
The LVDS encoder on RZ/G2H (R8A774E1) SoC is identical to R-Car Gen3 so just reuse the rcar_lvds_gen3_info structure to hookup R8A774E1 to LVDS encoder driver. Signed-off-by:
Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> Signed-off-by:
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Marian-Cristian Rotariu authored
Document RZ/G2H (R8A774E1) SoC bindings. Signed-off-by:
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Marian-Cristian Rotariu authored
Document the RZ/G2H (R8A774E1) LVDS bindings. Signed-off-by:
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Marian-Cristian Rotariu authored
Hookup RZ/G2H (R8A774E1) to DU driver. R8A774E1 has one RGB output, one LVDS output and one HDMI output. Signed-off-by:
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Marian-Cristian Rotariu authored
Document the RZ/G2H (a.k.a. r8a774e1) SoC in the R-Car DU bindings. Signed-off-by:
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Biju Das authored
Add the support for enabling optional regulator that may be used as VCC source. Signed-off-by:
Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by:
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Biju Das authored
Document optional power-supply property that may be used to specify the regulator powering up the device. Signed-off-by:
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Marek Szyprowski authored
Since commit 9495b7e9 ("driver core: platform: Initialize dma_parms for platform devices") driver core handles allocation of the dma_parms structure for platform device, so there is no need to manually allocate nor free it. Reported-by:
Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by:
Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by:
Inki Dae <inki.dae@samsung.com>
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- 21 Sep, 2020 2 commits
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Krzysztof Kozlowski authored
Common pattern of handling deferred probe can be simplified with dev_err_probe(). Less code and also it prints the error value. Signed-off-by:
Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by:
Andrzej Hajda <a.hajda@samsung.com> Signed-off-by:
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Krzysztof Kozlowski authored
Common pattern of handling deferred probe can be simplified with dev_err_probe(). Less code and also it prints the error value. Signed-off-by:
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- 18 Sep, 2020 4 commits
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Swapnil Jakhade authored
Add J721E wrapper for mhdp, which sets up the clock and data muxes. Signed-off-by:
Jyri Sarha <jsarha@ti.com> Signed-off-by:
Yuti Amonkar <yamonkar@cadence.com> Signed-off-by:
Swapnil Jakhade <sjakhade@cadence.com> Reviewed-by:
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Swapnil Jakhade authored
Add a new DRM bridge driver for Cadence MHDP8546 DPTX IP used in TI J721E SoC. MHDP DPTX IP is the component that complies with VESA DisplayPort (DP) and embedded Display Port (eDP) standards. It integrates uCPU running the embedded Firmware (FW) interfaced over APB interface. Basically, it takes a DPI stream as input and outputs it encoded in DP format. Currently, it supports only SST mode. Co-developed-by:
Quentin Schulz <quentin.schulz@free-electrons.com> Signed-off-by:
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Yuti Amonkar authored
Document the bindings used for the Cadence MHDP8546 DPI/DP bridge in yaml format. Signed-off-by:
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Tomi Valkeinen authored
Merge tag 'phy-attrs-5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy into 5.10/dp-pull New phy attributes slated for kernel release v5.10. These are needed by the Cadence MHDP driver.
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- 17 Sep, 2020 13 commits
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Rodrigo Vivi authored
Signed-off-by:Rodrigo Vivi <rodrigo.vivi@intel.com>
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Swathi Dhanavanthri authored
This workaround applies to all TGL and RKL steppings. Signed-off-by:
Swathi Dhanavanthri <swathi.dhanavanthri@intel.com> Reviewed-by:
José Roberto de Souza <jose.souza@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200911221158.4700-1-swathi.dhanavanthri@intel.com
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Ville Syrjälä authored
Since we now have proper old and new cdclk state we no longer need to keep this flag to indicate that the force min cdclk has changed. Instead just check if the old vs. new value are different. Signed-off-by:
Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200714152626.380-4-ville.syrjala@linux.intel.comReviewed-by:
Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
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Ville Syrjälä authored
With the dbuf code mostly converted over to the new global state handling we can remove the leftovers of the old global state stuff. Signed-off-by:
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Ville Syrjälä authored
For platforms that can't do native 4:2:0 outout we may still be able to do it by getting the DP->HDMI protocol converter to perform the 4:4:4->4:2:0 downsamling for us. In this case we have to configure our hardware to output YCbCr 4:4:4, which we've already hooked up so all we need to do is flip the switch. Signed-off-by:
Lyude Paul <lyude@redhat.com> Acked-by:
Daniel Vetter <daniel.vetter@ffwll.ch>
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Ville Syrjälä authored
Add helpers to determine whether the DFP supports YCbCr 4:2:0 passthrough or YCbCr 4:4:4->4:2:0 conversion. v2: Add kdocs (Lyude) Signed-off-by:
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Ville Syrjälä authored
Account for the TMDS clock limits declared by the DFP when determining what color depth we're going to use. v2: Drop the reference to DP++ dongle since it's not handled here Signed-off-by:
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Ville Syrjälä authored
Pull the "do we want to enable audio?" computation into a small helper to make intel_hdmi_compute_config() less messy. Will make it easier to add more checks for this later (eg. we should actually be checking at the hblank is long enough for audio transmission). Signed-off-by:
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Ville Syrjälä authored
Use drm_dp_downstream_mode() to get a suitable mode for downstream facing ports which don't have an EDID. Signed-off-by:
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Ville Syrjälä authored
The downstream facing port caps in the DPCD can give us a hint as to what kind of display mode the sink can use if it doesn't have an EDID. Use that information to pick a suitable mode. v2: Use Returns: for kdoc (Lyude) Add kdocs for drm_display_mode_from_cea_vic() (Lyude) Signed-off-by: -
Ville Syrjälä authored
DP 1.3 adds some extra control knobs for DP->HDMI protocol conversion. Let's use that to configure the "HDMI mode" (ie. infoframes vs. not) based on the capabilities of the sink. Signed-off-by:
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Ville Syrjälä authored
Use the new helpers to extract the TMDS clock limits from the downstream facing port and check them in .mode_valid(). TODO: we should check these in .compute_config() too to eg. determine if we can do deep color on the HDMI side or not Signed-off-by:
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Ville Syrjälä authored
Add helpers to get the TMDS clock limits for HDMI/DVI downstream facing ports. Signed-off-by:
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