- 31 Jan, 2018 12 commits
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Vinod Koul authored
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Vinod Koul authored
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Vinod Koul authored
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Vinod Koul authored
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Vinod Koul authored
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Vinod Koul authored
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Vinod Koul authored
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Vinod Koul authored
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Vinod Koul authored
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Vinod Koul authored
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Vinod Koul authored
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Vinod Koul authored
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- 30 Jan, 2018 1 commit
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Yang Shunyong authored
The type of arg passed to dmatest_callback is struct dmatest_done. It refers to test_done in struct dmatest_thread, not done_wait. Fixes: 6f6a23a2 ("dmaengine: dmatest: move callback wait ...") Signed-off-by: Yang Shunyong <shunyong.yang@hxt-semitech.com> Acked-by: Adam Wallis <awallis@codeaurora.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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- 19 Jan, 2018 1 commit
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Wei Yongjun authored
devm_ioremap_resource() already checks if the resource is NULL, so remove the unnecessary platform_get_resource() error check. Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> Acked-by: Pierre-Yves MORDRET <pierre-yves.mordret@st.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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- 15 Jan, 2018 1 commit
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Vinod Koul authored
Sparse warns that 'sprd_dma_prep_dma_memcpy' should be static so make it static. drivers/dma/sprd-dma.c:713:32: warning: symbol'sprd_dma_prep_dma_memcpy' was not declared. Should it be static? Reviewed-by: Baolin Wang <baolin.wang@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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- 08 Jan, 2018 3 commits
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Rob Herring authored
The hidma driver open codes populating address and IRQ resources from DT. We have standard functions of_address_to_resource and of_irq_to_resource for this, so use them instead. The DT binding states each child should have 2 addresses and 1 IRQ, so we can simplify the logic and do a fixed size resource allocation. Using the standard of_address_to_resource will also do any address translation which was missing. Signed-off-by: Rob Herring <robh@kernel.org> Reviewed-by: Sinan Kaya <okaya@codeaurora.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Luca Ceresoli authored
Monospace is more readable and is also used elsewhere in the docs. Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Luca Ceresoli authored
The bullet list documenting the 'struct dma_device' fields has several nesting errors, making it render improperly. It also has incoherent formatting: some fields have a description in the same bullet, some in a sub-bullet. Fix both to have a correct and coherent formatting. Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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- 22 Dec, 2017 3 commits
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Vignesh R authored
Register layout of a typical TPCC_EVT_MUX_M_N register is such that the lowest numbered event is at the lowest byte address and highest numbered event at highest byte address. But TPCC_EVT_MUX_60_63 register layout is different, in that the lowest numbered event is at the highest address and highest numbered event is at the lowest address. Therefore, modify ti_am335x_xbar_write() to handle TPCC_EVT_MUX_60_63 register accordingly. Signed-off-by: Vignesh R <vigneshr@ti.com> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Gomonovych, Vasyl authored
The test should be >= ARRAY_SIZE() instead of > ARRAY_SIZE(). Signed-off-by: Vasyl Gomonovych <gomonovych@gmail.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Nicolas Chauvet authored
This avoid the following error when using an initramfs on wandboard quad Direct firmware load for imx/sdma/sdma-imx6q.bin failed with error -2 Signed-off-by: Nicolas Chauvet <kwizart@gmail.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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- 15 Dec, 2017 1 commit
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Andreas Platschek authored
Previously enabled clks are only disabled if clk_prepare_enable() fails. However, there are other error paths were the previously enabled clocks are not disabled. To fix the problem, fsl_disable_clocks() now takes the number of clocks that shall be disabled + unprepared. For existing calls were all clocks were already successfully prepared + enabled, DMAMUX_NR is passed to disable + unprepare all clocks. In error paths were only some clocks were successfully prepared + enabled the loop counter is passed, in order to disable + unprepare all successfully prepared + enabled clocks. Found by Linux Driver Verification project (linuxtesting.org). Signed-off-by: Andreas Platschek <andreas.platschek@opentech.at> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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- 13 Dec, 2017 8 commits
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Sinan Kaya authored
The location for destination event channel register has been relocated from offset 0x28 to 0x40. Update the code accordingly. Signed-off-by: Sinan Kaya <okaya@codeaurora.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Sinan Kaya authored
Add support for probing the newer HW and also organize MSI capable hardware into an array for maintenance reasons. Signed-off-by: Sinan Kaya <okaya@codeaurora.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Sinan Kaya authored
A new version of the HIDMA IP has been released with bug fixes. Bumping the hardware version to differentiate from others. Signed-off-by: Sinan Kaya <okaya@codeaurora.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Vinod Koul authored
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Sinan Kaya authored
Now that we have a get_match_data() callback as part of the firmware node, implement the ACPI specific piece for it. Signed-off-by: Sinan Kaya <okaya@codeaurora.org> Acked-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Sinan Kaya authored
Now that we have a get_match_data() callback as part of the firmware node, implement the OF specific piece for it. Signed-off-by: Sinan Kaya <okaya@codeaurora.org> Reviewed-by: Rob Herring <robh@kernel.org> Acked-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Sinan Kaya authored
There is an OF/ACPI function to obtain the driver data. We want to hide OF/ACPI details from the device drivers and abstract following the device family of functions. Signed-off-by: Sinan Kaya <okaya@codeaurora.org> Reviewed-by: Rob Herring <robh@kernel.org> Acked-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Sinan Kaya authored
OF has of_device_get_match_data() function to extract driver specific data structure. Add a similar function for ACPI. Signed-off-by: Sinan Kaya <okaya@codeaurora.org> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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- 12 Dec, 2017 1 commit
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Sinan Kaya authored
Driver is missing the interrupts if two requests are queued up at the same time as the interrupt handler is servicing a request that was just delivered. The ISR clears the interrupt at the end but it could be clearing the interrupt for an outstanding event. Therefore, second interrupt never arrives. Clear the interrupt first and then check for completions. Also, make sure that request start and interrupt clear do not overlap in time by using a spinlock. Signed-off-by: Sinan Kaya <okaya@codeaurora.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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- 11 Dec, 2017 2 commits
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Tobias Jordan authored
in error path of jz4740_dma_probe(), call clk_disable_unprepare() to clean up. Found by Linux Driver Verification project (linuxtesting.org). Fixes: 25ce6c35 MIPS: jz4740: Remove custom DMA API Signed-off-by: Tobias Jordan <Tobias.Jordan@elektrobit.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Adam Wallis authored
Commit adfa543e ("dmatest: don't use set_freezable_with_signal()") introduced a bug (that is in fact documented by the patch commit text) that leaves behind a dangling pointer. Since the done_wait structure is allocated on the stack, future invocations to the DMATEST can produce undesirable results (e.g., corrupted spinlocks). Commit a9df21e3 ("dmaengine: dmatest: warn user when dma test times out") attempted to WARN the user that the stack was likely corrupted but did not fix the actual issue. This patch fixes the issue by pushing the wait queue and callback structs into the the thread structure. If a failure occurs due to time, dmaengine_terminate_all will force the callback to safely call wake_up_all() without possibility of using a freed pointer. Cc: stable@vger.kernel.org Bug: https://bugzilla.kernel.org/show_bug.cgi?id=197605 Fixes: adfa543e ("dmatest: don't use set_freezable_with_signal()") Reviewed-by: Sinan Kaya <okaya@codeaurora.org> Suggested-by: Shunyong Yang <shunyong.yang@hxt-semitech.com> Signed-off-by: Adam Wallis <awallis@codeaurora.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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- 04 Dec, 2017 1 commit
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Vasyl Gomonovych authored
Fix ptr_ret.cocci warnings: drivers/dma/mic_x100_dma.c:483:1-3: WARNING: PTR_ERR_OR_ZERO can be used Use PTR_ERR_OR_ZERO rather than if(IS_ERR(...)) + PTR_ERR Generated by: scripts/coccinelle/api/ptr_ret.cocci Signed-off-by: Vasyl Gomonovych <gomonovych@gmail.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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- 29 Nov, 2017 5 commits
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Gustavo A. R. Silva authored
_xt_ is being dereferenced before it is null checked, hence there is a potential null pointer dereference. Fix this by moving the pointer dereference after _xt_ has been null checked. This issue was detected with the help of Coccinelle. Fixes: 4483320e ("dmaengine: Use Pointer xt after NULL check.") Signed-off-by: Gustavo A. R. Silva <garsilva@embeddedor.com> Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Christophe JAILLET authored
If the last test in 'ioat_dma_self_test()' fails, we must release all the allocated resources and not just part of them. Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Acked-by: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Kuninori Morimoto authored
SYS/RT/Audio DMAC includes independent data buffers for reading and writing. Therefore, the read transfer counter and write transfer counter have different values. TCR indicates read counter, and TCRB indicates write counter. The relationship is like below. TCR TCRB [SOURCE] -> [DMAC] -> [SINK] In the MEM_TO_DEV direction, what really matters is how much data has been written to the device. If the DMA is interrupted between read and write, then, the data doesn't end up in the destination, so shouldn't be counted. TCRB is thus the register we should use in this cases. In the DEV_TO_MEM direction, the situation is more complex. Both the read and write side are important. What matters from a data consumer point of view is how much data has been written to memory. On the other hand, if the transfer is interrupted between read and write, we'll end up losing data. It can also be important to report. In the MEM_TO_MEM direction, what matters is of course how much data has been written to memory from data consumer point of view. Here, because read and write have independent data buffers, it will take a while for TCR and TCRB to become equal. Thus we should check TCRB in this case, too. Thus, all cases we should check TCRB instead of TCR. Without this patch, Sound Capture has noise after PulseAudio support (= 07b7acb5 ("ASoC: rsnd: update pointer more accurate")), because the recorder will use wrong residue counter which indicates transferred from sound device, but in reality the data was not yet put to memory and recorder will record it. However, because DMAC is buffering data until it can be transferable size, TCRB might not be updated. For example, if consumer doesn't know how much data can be received, it requests enough size to DMAC. But in reality, it might receive very few data. In such case, DMAC just buffered it until transferable size, and no TCRB updated. In such case, this buffered data will be transferred if CHCR::DE bit was cleared, and this is happen if rcar_dmac_chan_halt(). In other word, it happen when consumer called dmaengine_terminate_all(). Because of this behavior, it need to flush buffered data when it returns "residue" (= dmaengine_tx_status()). Otherwise, consumer might calculate wrong things if it called dmaengine_tx_status() and dmaengine_terminate_all() consecutively. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Tested-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Tested-by: Ryo Kodama <ryo.kodama.vz@renesas.com> Tested-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Kuninori Morimoto authored
DMAC reads data from source device, and buffered it until transferable size for sink device. Because of this behavior, DMAC is including buffered data . Now, CHCR DE bit is controlling DMA transfer enable/disable. If DE bit was cleared during data transferring, or during buffering, it will flush buffered data if source device was peripheral device (The buffered data will be removed if source device was memory). Because of this behavior, driver should ensure that DE bit is actually 0 after clearing. This patch adds new rcar_dmac_chcr_de_barrier() and call it after CHCR register access. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Tested-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Tested-by: Ryo Kodama <ryo.kodama.vz@renesas.com> Tested-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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Dmitry Osipenko authored
This allows DMA client to issue a non-flow controlled TX. In particular it is needed for the fuse driver that reads fuse registers using APBDMA to workaround a HW bug that results in hang when CPU and DMA perform simultaneous access to fuse peripheral. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Reviewed-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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- 27 Nov, 2017 1 commit
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Linus Torvalds authored
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