- 10 Aug, 2020 4 commits
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Amelie Delaunay authored
This patch adds pinctrl power management, and reconfigure spi controller in case of resume. Fixes: 038ac869 ("spi: stm32: add runtime PM support") Signed-off-by:
Amelie Delaunay <amelie.delaunay@st.com> Signed-off-by:
Alain Volmat <alain.volmat@st.com> Link: https://lore.kernel.org/r/1597043558-29668-5-git-send-email-alain.volmat@st.comSigned-off-by:
Mark Brown <broonie@kernel.org>
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Amelie Delaunay authored
Fix spi->clk_rate when it is odd to the nearest lowest even value because minimum SPI divider is 2. Signed-off-by:
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Amelie Delaunay authored
When transfer is shorter than half of the fifo, set the data packet size up to transfer size instead of up to half of the fifo. Check also that threshold is set at least to 1 data frame. Signed-off-by:
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Antonio Borneo authored
The caller of stm32_spi_transfer_one(), spi_transfer_one_message(), is waiting for us to call spi_finalize_current_transfer() and will eventually schedule a new transfer, if available. We should guarantee that the spi controller is really available before calling spi_finalize_current_transfer(). Move the call to spi_finalize_current_transfer() _after_ the call to stm32_spi_disable(). Signed-off-by:
Antonio Borneo <antonio.borneo@st.com> Signed-off-by:
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- 05 Aug, 2020 1 commit
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Tobias Schramm authored
Previously the stm32h7 interrupt thread cleared all non-masked interrupts. If an interrupt was to occur during the handling of another interrupt its flag would be unset, resulting in a lost interrupt. This patches fixes the issue by clearing only the currently set interrupt flags. Signed-off-by:
Tobias Schramm <t.schramm@manjaro.org> Link: https://lore.kernel.org/r/20200804195136.1485392-1-t.schramm@manjaro.orgSigned-off-by:
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- 03 Aug, 2020 1 commit
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Lukas Wunner authored
CONFIG_OF_DYNAMIC and CONFIG_ACPI allow adding SPI devices at runtime using a DeviceTree overlay or DSDT patch. CONFIG_SPI_SLAVE allows the same via sysfs. But there are no precautions to prevent adding a device below a controller that's being removed. Such a device is unusable and may not even be able to unbind cleanly as it becomes inaccessible once the controller has been torn down. E.g. it is then impossible to quiesce the device's interrupt. of_spi_notify() and acpi_spi_notify() do hold a ref on the controller, but otherwise run lockless against spi_unregister_controller(). Fix by holding the spi_add_lock in spi_unregister_controller() and bailing out of spi_add_device() if the controller has been unregistered concurrently. Fixes: ce79d54a ("spi/of: Add OF notifier handler") Signed-off-by:
Lukas Wunner <lukas@wunner.de> Cc: stable@vger.kernel.org # v3.19+ Cc: Geert Uytterhoeven <geert+renesas@glider.be> Cc: Octavian Purdila <octavian.purdila@intel.com> Cc: Pantelis Antoniou <pantelis.antoniou@konsulko.com> Link: https://lore.kernel.org/r/a8c3205088a969dc8410eec1eba9aface60f36af.1596451035.git.lukas@wunner.deSigned-off-by:
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- 29 Jul, 2020 5 commits
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Mark Brown authored
Hi, This patchset mainly fixes some recently discovered problems about CS for LPSPI module on i.MX8DXLEVK. Add the dt-bindings description for the new property. Clark Wang (4): spi: lpspi: Fix kernel warning dump when probe fail after calling spi_register spi: lpspi: remove unused fsl_lpspi->chipselect spi: lpspi: fix using CS discontinuously on i.MX8DXLEVK dt-bindings: lpspi: New property in document DT bindings for LPSPI .../bindings/spi/spi-fsl-lpspi.yaml | 7 ++++++ drivers/spi/spi-fsl-lpspi.c | 25 +++++++++++-------- 2 files changed, 21 insertions(+), 11 deletions(-) -- 2.17.1 -
Clark Wang authored
Add "fsl,spi-only-use-cs1-sel" to fit i.MX8DXL-EVK. Spi common code does not support use of CS signals discontinuously. It only uses CS1 without using CS0. So, add this property to re-config chipselect value. Signed-off-by:
Clark Wang <xiaoning.wang@nxp.com> Link: https://lore.kernel.org/r/20200727031513.31774-1-xiaoning.wang@nxp.comSigned-off-by:
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Clark Wang authored
SPI common code does not support using CS discontinuously for now. However, i.MX8DXL-EVK only uses CS1 without CS0. Therefore, add a flag is_only_cs1 to set the correct TCR[PCS]. Signed-off-by:
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Clark Wang authored
The cs-gpio is initailized by spi_get_gpio_descs() now. Remove the chipselect. Signed-off-by:
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Clark Wang authored
Calling devm_spi_register_controller() too early will cause problem. When probe failed occurs after calling devm_spi_register_controller(), the call of spi_controller_put() will trigger the following warning dump. [ 2.092138] ------------[ cut here ]------------ [ 2.096876] kernfs: can not remove 'uevent', no directory [ 2.102440] WARNING: CPU: 0 PID: 181 at fs/kernfs/dir.c:1503 kernfs_remove_by_name_ns+0xa0/0xb0 [ 2.111142] Modules linked in: [ 2.114207] CPU: 0 PID: 181 Comm: kworker/0:7 Not tainted 5.4.24-05024-g775c6e8a738c-dirty #1314 [ 2.122991] Hardware name: Freescale i.MX8DXL EVK (DT) [ 2.128141] Workqueue: events deferred_probe_work_func [ 2.133281] pstate: 60000005 (nZCv daif -PAN -UAO) [ 2.138076] pc : kernfs_remove_by_name_ns+0xa0/0xb0 [ 2.142958] lr : kernfs_remove_by_name_ns+0xa0/0xb0 [ 2.147837] sp : ffff8000122bba70 [ 2.151145] x29: ffff8000122bba70 x28: ffff8000119d6000 [ 2.156462] x27: 0000000000000000 x26: ffff800011edbce8 [ 2.161779] x25: 0000000000000000 x24: ffff00003ae4f700 [ 2.167096] x23: ffff000010184c10 x22: ffff00003a3d6200 [ 2.172412] x21: ffff800011a464a8 x20: ffff000010126a68 [ 2.177729] x19: ffff00003ae5c800 x18: 000000000000000e [ 2.183046] x17: 0000000000000001 x16: 0000000000000019 [ 2.188362] x15: 0000000000000004 x14: 000000000000004c [ 2.193679] x13: 0000000000000000 x12: 0000000000000001 [ 2.198996] x11: 0000000000000000 x10: 00000000000009c0 [ 2.204313] x9 : ffff8000122bb7a0 x8 : ffff00003a3d6c20 [ 2.209630] x7 : ffff00003a3d6380 x6 : 0000000000000001 [ 2.214946] x5 : 0000000000000001 x4 : ffff00003a05eb18 [ 2.220263] x3 : 0000000000000005 x2 : ffff8000119f1c48 [ 2.225580] x1 : 2bcbda323bf5a800 x0 : 0000000000000000 [ 2.230898] Call trace: [ 2.233345] kernfs_remove_by_name_ns+0xa0/0xb0 [ 2.237879] sysfs_remove_file_ns+0x14/0x20 [ 2.242065] device_del+0x12c/0x348 [ 2.245555] device_unregister+0x14/0x30 [ 2.249492] spi_unregister_controller+0xac/0x120 [ 2.254201] devm_spi_unregister+0x10/0x18 [ 2.258304] release_nodes+0x1a8/0x220 [ 2.262055] devres_release_all+0x34/0x58 [ 2.266069] really_probe+0x1b8/0x318 [ 2.269733] driver_probe_device+0x54/0xe8 [ 2.273833] __device_attach_driver+0x80/0xb8 [ 2.278194] bus_for_each_drv+0x74/0xc0 [ 2.282034] __device_attach+0xdc/0x138 [ 2.285876] device_initial_probe+0x10/0x18 [ 2.290063] bus_probe_device+0x90/0x98 [ 2.293901] deferred_probe_work_func+0x64/0x98 [ 2.298442] process_one_work+0x198/0x320 [ 2.302451] worker_thread+0x1f0/0x420 [ 2.306208] kthread+0xf0/0x120 [ 2.309352] ret_from_fork+0x10/0x18 [ 2.312927] ---[ end trace 58abcdfae01bd3c7 ]--- So put this function at the end of the probe sequence. Signed-off-by:
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- 28 Jul, 2020 5 commits
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Jon Lin authored
The RXFLR is possible larger than rx_left in Rockchip SPI, fix it. Fixes: 01b59ce5 ("spi: rockchip: use irq rather than polling") Signed-off-by:
Jon Lin <jon.lin@rock-chips.com> Tested-by:
Emil Renner Berthing <kernel@esmil.dk> Reviewed-by:
Heiko Stuebner <heiko@sntech.de> Reviewed-by:
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Jon Lin authored
The FIFO depth of SPI V2 is 64 instead of 32, add support for it. Signed-off-by:
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Jon Lin authored
The burst length can be adjusted according to the transmission length to improve the transmission rate Signed-off-by:
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Vaibhav Gupta authored
Before generic upgrade, both .suspend() and .resume() were invoking pci_enable_wake(pci_dev, PCI_D3hot, 0). Hence, disabling wakeup in both states. (Normal trend is .suspend() enables and .resume() disables the wakeup.) This was ambiguous and may be buggy. Instead of replicating the legacy behavior, drop the wakeup-disable call. Fixes: f185bcc7 ("spi: spi-topcliff-pch: use generic power management") Reported-by:
Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by:
Vaibhav Gupta <vaibhavgupta40@gmail.com> Reviewed-by:
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Christian Eggers authored
Simply copying all xfers from userspace into one bounce buffer causes alignment problems if the SPI controller uses DMA. Ensure that all transfer data blocks within the rx and tx bounce buffers are aligned for DMA (according to ARCH_KMALLOC_MINALIGN). Alignment may increase the usage of the bounce buffers. In some cases, the buffers may need to be increased using the "bufsiz" module parameter. Signed-off-by:
Christian Eggers <ceggers@arri.de> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20200728100832.24788-1-ceggers@arri.deSigned-off-by:
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- 27 Jul, 2020 3 commits
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Colton Lewis authored
Silence documentation build warnings by correcting kernel-doc comment for spi_transfer struct. Signed-off-by:
Colton Lewis <colton.w.lewis@protonmail.com> Link: https://lore.kernel.org/r/20200725050242.279548-1-colton.w.lewis@protonmail.comSigned-off-by:
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Jonathan Liu authored
The spi-sun4i driver already has the ability to do large transfers. However, the max transfer size reported is still fifo depth - 1. Update the max transfer size reported to the max value possible. Fixes: 19673791 ("spi: sun4i: Allow transfers larger than FIFO size") Signed-off-by:
Jonathan Liu <net147@gmail.com> Acked-by:
Maxime Ripard <mripard@kernel.org> Link: https://lore.kernel.org/r/20200727072328.510798-1-net147@gmail.comSigned-off-by:
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Clark Wang authored
Enable runtime pm support for spi-imx driver. Signed-off-by:
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- 22 Jul, 2020 14 commits
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leilk.liu authored
Add a DT binding documentation for the MT8192 soc. Signed-off-by:
leilk.liu <leilk.liu@mediatek.com> Link: https://lore.kernel.org/r/20200721122436.31544-1-leilk.liu@mediatek.comSigned-off-by:
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leilk.liu authored
This patch add spi support for mt8192 IC. Signed-off-by:
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Dilip Kota authored
Add support to SPI controller on Intel Atom based Lightning Mountain SoC which reuses the Lantiq SPI controller IP. Signed-off-by:
Dilip Kota <eswara.kota@linux.intel.com> Reviewed-by:
Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/7d644e5d03ef534f719763e5c823c1673e53d1a5.1594957019.git.eswara.kota@linux.intel.comSigned-off-by:
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Dilip Kota authored
Add support to SPI controller on Intel Atom based Lightning Mountain SoC which reuses Lantiq SPI controller IP. Signed-off-by:
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Dilip Kota authored
Moving interrupt configuration to SoC specific data structure helps to add support for newer SoCs on which SPI controller with lesser interrupt lines compared to existing chipsets. Signed-off-by:
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Dilip Kota authored
On newer chipsets, SPI controller has fifos of larger size. So add the fifo size bit mask entry in SoC specific data structure. Signed-off-by:
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Dilip Kota authored
On newer chipsets interrupt need to be acknowledged as they use different interrupt controller which does not acknowledge the interrupts automatically. Signed-off-by:
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Dilip Kota authored
Address of Interrupt control registers are different on new chipsets. So move them to SoC specific data structure. Signed-off-by:
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Dilip Kota authored
Existing driver supports only single core SoC. New multicore platforms uses the same driver/IP so SMP support is required. This patch adds multicore support in the driver. Signed-off-by:
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Dilip Kota authored
In full duplex mode, rx overflow error is observed. To overcome the error, wait until the complete data got received and proceed further. Fixes: 17f84b79 ("spi: lantiq-ssc: add support for Lantiq SSC SPI controller") Signed-off-by:
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Vaibhav Gupta authored
Drivers using legacy PM have to manage PCI states and device's PM states themselves. They also need to take care of configuration registers. With improved and powerful support of generic PM, PCI Core takes care of above mentioned, device-independent, jobs. This driver makes use of PCI helper functions like pci_save/restore_state(), pci_enable/disable_device(), pci_enable_wake() and pci_set_power_state() to do required operations. In generic mode, they are no longer needed. Change function parameter in both .suspend() and .resume() to "struct device*" type. Use dev_get_drvdata() to get drv data. Compile-tested only. Signed-off-by:
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Linus Walleij authored
This converts the PPC4xx SPI driver to use GPIO descriptors. The driver is already just picking some GPIOs from the device tree so the conversion is pretty straight forward. However this driver is looking form a pure "gpios" property rather than the standard binding "cs-gpios" so we need to add a new exception to the gpiolib OF parser to allow this for this driver's compatibles. Signed-off-by:
Linus Walleij <linus.walleij@linaro.org> Cc: linuxppc-dev@lists.ozlabs.org Link: https://lore.kernel.org/r/20200714072226.26071-1-linus.walleij@linaro.orgSigned-off-by:
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Shreyas Joshi authored
The spi cadence driver should support spi-cs-high in mode bits so that the peripherals that needs the chip select to be high active can use it. Add the SPI-CS-HIGH flag in the supported mode bits. Signed-off-by:
Shreyas Joshi <shreyas.joshi@biamp.com> Link: https://lore.kernel.org/r/20200710211655.1564-1-shreyas.joshi@biamp.comSigned-off-by:
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Clark Wang authored
Call the put function after probe successfully. Otherwise, the lpspi module will keep active status until the first spi transfer called. Disable runtime pm when probe fails. There is no need to active runtime pm after probe failed. Signed-off-by:
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- 17 Jul, 2020 7 commits
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Mark Brown authored
Merge series "Add support for [H]SCIF/TMU/CMT/THS/SDHI/MSIOF/CAN[FD]/I2C/IIC/RWDT on R8A774E1" from Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>: Hi All, This patch series enables support for following on RZ/G2H SoC, * CPU OPP * THS * CMT/TMU * I2C/IIC * MSIOF * RWDT * SDHI * SCIF/HSCIF * CAN/CANFD Cheers, Prabhakar Lad Prabhakar (14): dt-bindings: thermal: rcar-gen3-thermal: Add r8a774e1 support dt-bindings: timer: renesas,cmt: Document r8a774e1 CMT support arm64: dts: renesas: r8a774e1: Add SCIF and HSCIF nodes arm64: dts: renesas: r8a774e1: Add SDHI nodes dt-bindings: i2c: renesas,i2c: Document r8a774e1 support dt-bindings: i2c: renesas,iic: Document r8a774e1 support arm64: dts: renesas: r8a774e1: Add I2C and IIC-DVFS support dt-bindings: spi: renesas,sh-msiof: Add r8a774e1 support arm64: dts: renesas: r8a774e1: Add MSIOF nodes dt-bindings: watchdog: renesas,wdt: Document r8a774e1 support arm64: dts: renesas: r8a774e1: Add RWDT node dt-bindings: can: rcar_can: Document r8a774e1 support dt-bindings: can: rcar_canfd: Document r8a774e1 support arm64: dts: renesas: r8a774e1: Add CAN[FD] support Marian-Cristian Rotariu (6): arm64: dts: renesas: r8a774e1: Add operating points thermal: rcar_gen3_thermal: Add r8a774e1 support arm64: dts: renesas: r8a774e1: Add RZ/G2H thermal support arm64: dts: renesas: r8a774e1: Add CMT device nodes dt-bindings: timer: renesas,tmu: Document r8a774e1 bindings arm64: dts: renesas: r8a774e1: Add TMU device nodes .../devicetree/bindings/i2c/renesas,i2c.txt | 1 + .../devicetree/bindings/i2c/renesas,iic.txt | 1 + .../devicetree/bindings/net/can/rcar_can.txt | 1 + .../bindings/net/can/rcar_canfd.txt | 1 + .../bindings/spi/renesas,sh-msiof.yaml | 1 + .../bindings/thermal/rcar-gen3-thermal.yaml | 1 + .../bindings/timer/renesas,cmt.yaml | 2 + .../devicetree/bindings/timer/renesas,tmu.txt | 1 + .../bindings/watchdog/renesas,wdt.yaml | 1 + arch/arm64/boot/dts/renesas/r8a774e1.dtsi | 713 +++++++++++++++++- drivers/thermal/rcar_gen3_thermal.c | 4 + 11 files changed, 715 insertions(+), 12 deletions(-) -- 2.17.1
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Lee Jones authored
Since ACPI_PTR() is used to NULLify the value when !CONFIG_ACPI, struct 'spi_acpi_match' becomes defined but unused. Fixes the following W=1 kernel build warning(s): drivers/spi/spi-amd.c:297:36: warning: ‘spi_acpi_match’ defined but not used [-Wunused-const-variable=] 297 | static const struct acpi_device_id spi_acpi_match[] = { | ^~~~~~~~~~~~~~ Signed-off-by:Lee Jones <lee.jones@linaro.org> Cc: Sanjay R Mehta <sanju.mehta@amd.com> Link: https://lore.kernel.org/r/20200717135424.2442271-15-lee.jones@linaro.orgSigned-off-by:
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Lee Jones authored
Since ACPI_PTR() is used to NULLify the value when !CONFIG_ACPI, struct 'pxa2xx_spi_acpi_match' becomes defined but unused. Fixes the following W=1 kernel build warning(s): drivers/spi/spi-pxa2xx.c:1435:36: warning: ‘pxa2xx_spi_acpi_match’ defined but not used [-Wunused-const-variable=] 1435 | static const struct acpi_device_id pxa2xx_spi_acpi_match[] = { | ^~~~~~~~~~~~~~~~~~~~~ Signed-off-by: -
Lee Jones authored
The only way this driver can be probed by MFD via its parent device. No other reference to 'microchip,at91sam9g45-usart-spi' exists in the kernel. Fixes the following W=1 kernel build warning(s): drivers/spi/spi-at91-usart.c:684:34: warning: ‘at91_usart_spi_dt_ids’ defined but not used [-Wunused-const-variable=] 684 | static const struct of_device_id at91_usart_spi_dt_ids[] = { | ^~~~~~~~~~~~~~~~~~~~~ Suggested-by:Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by:
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Lee Jones authored
Fixes the following W=1 kernel build warning(s): drivers/spi/spi-topcliff-pch.c:184: warning: Function parameter or member 'io_base_addr' not described in 'pch_spi_data' drivers/spi/spi-topcliff-pch.c:184: warning: Function parameter or member 'pkt_tx_buff' not described in 'pch_spi_data' drivers/spi/spi-topcliff-pch.c:184: warning: Function parameter or member 'pkt_rx_buff' not described in 'pch_spi_data' drivers/spi/spi-topcliff-pch.c:184: warning: Function parameter or member 'dma' not described in 'pch_spi_data' drivers/spi/spi-topcliff-pch.c:184: warning: Function parameter or member 'use_dma' not described in 'pch_spi_data' drivers/spi/spi-topcliff-pch.c:184: warning: Function parameter or member 'save_total_len' not described in 'pch_spi_data' Signed-off-by:
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Lee Jones authored
Fixes the following W=1 kernel build warning(s): drivers/spi/spi-zynqmp-gqspi.c:205: warning: Function parameter or member 'slavecs' not described in 'zynqmp_gqspi_selectslave' drivers/spi/spi-zynqmp-gqspi.c:205: warning: Function parameter or member 'slavebus' not described in 'zynqmp_gqspi_selectslave' drivers/spi/spi-zynqmp-gqspi.c:205: warning: Excess function parameter 'flashcs' description in 'zynqmp_gqspi_selectslave' drivers/spi/spi-zynqmp-gqspi.c:205: warning: Excess function parameter 'flashbus' description in 'zynqmp_gqspi_selectslave' drivers/spi/spi-zynqmp-gqspi.c:902: warning: Function parameter or member 'dev' not described in 'zynqmp_qspi_suspend' drivers/spi/spi-zynqmp-gqspi.c:902: warning: Excess function parameter '_dev' description in 'zynqmp_qspi_suspend' Signed-off-by:
Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/20200717135424.2442271-11-lee.jones@linaro.orgSigned-off-by:
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Lee Jones authored
Fixes the following W=1 kernel build warning(s): drivers/spi/spi-zynq-qspi.c:143: warning: Function parameter or member 'dev' not described in 'zynq_qspi' drivers/spi/spi-zynq-qspi.c:334: warning: Function parameter or member 'spi' not described in 'zynq_qspi_config_op' drivers/spi/spi-zynq-qspi.c:334: warning: Excess function parameter 'qspi' description in 'zynq_qspi_config_op' Signed-off-by:
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