- 29 Aug, 2019 20 commits
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Yufeng Mo authored
The current loopback mode is to add 0x1F to the SMAC address as the DMAC address and enable the promiscuous mode. However, if the VF address is the same as the DMAC address, the loopback test fails. Loopback can be enabled in three places: SSU, MAC, and serdes. By default, SSU loopback is enabled, so if the SMAC and the DMAC are the same, the packets are looped back in the SSU. If SSU loopback is disabled, packets can reach MAC even if SMAC is the same as DMAC. Therefore, this patch disables the SSU loopback before the loopback test. In this way, the SMAC and DMAC can be the same, and the promiscuous mode does not need to be enabled. And this is not valid in version 0x20. This patch also uses a macro to replace 0x1F. Fixes: c39c4d98 ("net: hns3: Add mac loopback selftest support in hns3 driver") Signed-off-by:
Yufeng Mo <moyufeng@huawei.com> Reviewed-by:
Peng Li <lipeng321@huawei.com> Signed-off-by:
Huazhong Tan <tanhuazhong@huawei.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Huazhong Tan authored
Currently, the reset interrupt will be cleared firstly, so when reset fails, if interrupt status register has reset interrupt, it means there is a new coming reset. Fixes: 72e2fb07 ("net: hns3: clear reset interrupt status in hclge_irq_handle()") Signed-off-by:
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Yufeng Mo authored
Currently, the loopback test supports only mac selftest and serdes selftest. This patch adds phy selftest. Signed-off-by:
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Weihang Li authored
When hardware or IMP get specified error it may need the client to take some special operations. This patch implements the hns3 client's process_hw_errorx. Signed-off-by:
Weihang Li <liweihang@hisilicon.com> Signed-off-by:
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Zhongzhu Liu authored
This patch optimizes the waiting time for TQP reset. Signed-off-by:
Zhongzhu Liu <liuzhongzhu@huawei.com> Reviewed-by:
Yunsheng Lin <linyunsheng@huawei.com> Reviewed-by:
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Guojia Liao authored
This patch fixes some incorrect type in assignment reported by sparse. Those sparse warning as below: - warning : restricted __le16 degrades to integer - warning : cast from restricted __le32 - warning : expected restricted __le32 - warning : cast from restricted __be32 - warning : cast from restricted __be16 - warning : cast to restricted __le16 Signed-off-by:
Guojia Liao <liaoguojia@huawei.com> Reviewed-by:
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Yonglong Liu authored
In hclge_dcb.c, these pair of codes: hclge_notify_client(hdev, HNAE3_DOWN_CLIENT); hclge_notify_client(hdev, HNAE3_UNINIT_CLIENT); and hclge_notify_client(hdev, HNAE3_INIT_CLIENT); hclge_notify_client(hdev, HNAE3_UP_CLIENT); are called many times, so make them into a function. Signed-off-by:
Yonglong Liu <liuyonglong@huawei.com> Reviewed-by:
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Yufeng Mo authored
To better identify abnormal conditions, this patch modifies or adds some logs to show driver status more accurately. Signed-off-by:
Guangbin Huang <huangguangbin2@huawei.com> Signed-off-by:
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Guojia Liao authored
This patch simplifies parameters of some functions by deleting unused parameter. Signed-off-by:
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Huazhong Tan authored
This patch replaces kstrtouint()'s patameter base with 0 in the hclge_dbg_dump_tm_mac(), which makes it more flexible. Also uses a macro to replace string "dump tm map", since it has been used multiple times. Signed-off-by:
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Huazhong Tan authored
This patch uses macro to replace some magic number. Signed-off-by:
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Zhongzhu Liu authored
For making the code more readable, this patch uses a array to keep the information about the dumping register, and then uses it to parse the parameter cmd_buf which passing into hclge_dbg_dump_reg_cmd(). Also replaces parameter "base" of kstrtouint with 0 in the hclge_dbg_dump_reg_common(), which makes it more flexible. Signed-off-by:
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Ioana Radulescu authored
Starting with firmware version MC10.18.0, we have support for L2 flow control. Asymmetrical configuration (Rx or Tx only) is supported, but not pause frame autonegotioation. Pause frame configuration is done via ethtool. By default, we start with flow control enabled on both Rx and Tx. Changes are propagated to hardware through firmware commands, using two flags (PAUSE, ASYM_PAUSE) to specify Rx and Tx pause configuration, as follows: PAUSE | ASYM_PAUSE | Rx pause | Tx pause ---------------------------------------- 0 | 0 | disabled | disabled 0 | 1 | disabled | enabled 1 | 0 | enabled | enabled 1 | 1 | enabled | disabled The hardware can automatically send pause frames when the number of buffers in the pool goes below a predefined threshold. Due to this, flow control is incompatible with Rx frame queue taildrop (both mechanisms target the case when processing of ingress frames can't keep up with the Rx rate; for large frames, the number of buffers in the pool may never get low enough to trigger pause frames as long as taildrop is enabled). So we set pause frame generation and Rx FQ taildrop as mutually exclusive. Signed-off-by:
Ioana Radulescu <ruxandra.radulescu@nxp.com> Reviewed-by:
Andrew Lunn <andrew@lunn.ch> Signed-off-by:
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Ioana Radulescu authored
Whenever a link state change occurs, we get notified and save the new link settings in the device's private data. In ethtool get_link_ksettings, use the stored state instead of interrogating the firmware each time. Signed-off-by:
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Ioana Radulescu authored
We only support fixed-link for now, so there is no point in offering users the option to change link settings via ethtool. Functionally there is no change, since firmware prevents us from changing link parameters anyway. Signed-off-by:
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David S. Miller authored
Ido Schimmel says: ==================== mlxsw: Various updates Patch #1 from Amit removes 56G speed support. The reasons for this are detailed in the commit message. Patch #2 from Shalom ensures that the hardware does not auto negotiate the number of used lanes. For example, if a four lane port supports 100G over both two and four lanes, it will not advertise the two lane link mode. Patch #3 bumps the firmware version supported by the driver. Patch #4 from Petr adds ethtool counters to help debug the internal PTP implementation in mlxsw. I copied Richard on this patch in case he has comments. ==================== Signed-off-by: -
Petr Machata authored
On Spectrum-1, timestamped PTP packets and the corresponding timestamps need to be kept in caches until both are available, at which point they are matched up and packets forwarded as appropriate. However, not all packets will ever see their timestamp, and not all timestamps will ever see their packet. It is necessary to dispose of such abandoned entries, so a garbage collector was introduced in commit 5d23e415 ("mlxsw: spectrum: PTP: Garbage-collect unmatched entries"). If these GC events happen often, it is a sign of a problem. However because this whole mechanism is taking place behind the scenes, there is no direct way to determine whether garbage collection took place. Therefore to fix this, on Spectrum-1 only, expose four artificial ethtool counters for the GC events: GCd timestamps and packets, in TX and RX directions. Cc: Richard Cochran <richardcochran@gmail.com> Signed-off-by:
Petr Machata <petrm@mellanox.com> Signed-off-by:
Ido Schimmel <idosch@mellanox.com> Signed-off-by:
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Ido Schimmel authored
The new version supports extended error reporting from firmware via a new TLV in the EMAD packet. Similar to netlink extended ack. It also fixes an issue in the PCI code that can result in false AER errors under high Tx rate. Signed-off-by:
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Shalom Toledo authored
After 50G-1-lane and 100G-2-lanes link modes were introduced, the driver is facing situations in which the hardware auto negotiates not only on speed and type, but also on number of lanes. Prevent auto negotiation on number of lanes by allowing only port speeds that can be supported on a given port according to its width. Signed-off-by:
Shalom Toledo <shalomt@mellanox.com> Acked-by:
Jiri Pirko <jiri@mellanox.com> Signed-off-by:
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Amit Cohen authored
Commit 275e928f ("mlxsw: spectrum: Prevent force of 56G") prevented the driver from setting a speed of 56G when auto-negotiation is off. This is the only speed supported by mlxsw that cannot be set when auto-negotiation is off, which makes it difficult to write generic tests. Further, the speed is not supported by newer ASICs such as Spectrum-2 and to the best of our knowledge it is not used by current users. Therefore, remove 56G support from mlxsw. Signed-off-by:
Amit Cohen <amitc@mellanox.com> Signed-off-by:
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- 28 Aug, 2019 20 commits
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Jian Shen authored
Some ethernet drivers may call phy_start() and phy_stop() from ndo_open() and ndo_close() respectively. When network cable is unconnected, and operate like below: step 1: ifconfig ethX up -> ndo_open -> phy_start ->start autoneg, and phy is no link. step 2: ifconfig ethX down -> ndo_close -> phy_stop -> just stop phy state machine. This patch forces phy suspend even phydev->link is off. Signed-off-by:
Jian Shen <shenjian15@huawei.com> Reviewed-by:
Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by:
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git://git.kernel.org/pub/scm/linux/kernel/git/jkirsher/next-queueDavid S. Miller authored
Jeff Kirsher says: ==================== 100GbE Intel Wired LAN Driver Updates 2019-08-26 This series contains updates to ice driver only. Usha fixes the statistics reported on 4 port NICs which were reporting the incorrect statistics due to using the incorrect port identifier. Victor fixes an issue when trying to traverse to the first node of a requested layer by adding a sibling head pointer for each layer per traffic class. Anirudh cleans up the locking and logic for enabling and disabling VSI's to make it more consistent. Updates the driver to do dynamic allocation of queue management bitmaps and arrays, rather than statically allocating them which consumes more memory than required. Refactor the logic in ice_ena_msix_range() for clarity and add additional checks for when requested resources exceed what is available. Jesse updates the debugging print statements to make it more useful when dealing with link and PHY related issues. Krzysztof adds a local variable to the VSI rebuild path to improve readability. Akeem limits the reporting of MDD events from VFs so that the kernel log is not clogged up with MDD events which are duplicate or potentially false positives. Fixed a reset issue that would result in the system getting into a state that could only be resolved by a reboot by testing if the VF is in a disabled state during a reset. Michal adds a check to avoid trying to access memory that has not be allocated by checking the number of queue pairs. Jake fixes a static analysis warning due to a cast of a u8 to unsigned long, so just update ice_is_tc_ena() to take a unsigned long so that a cast is not necessary. Colin Ian King fixes a potential infinite loop where a u8 is being compared to an int. Maciej refactors the queue handling functions that work on queue arrays so that the logic can be done for a single queue. Paul adds support for VFs to enable and disable single queues. Henry fixed the order of operations in ice_remove() which was trying to use adminq operations that were already disabled. ==================== Signed-off-by: -
YueHaibing authored
Use devm_platform_ioremap_resource() to simplify the code a bit. This is detected by coccinelle. Reported-by:
Hulk Robot <hulkci@huawei.com> Signed-off-by:
YueHaibing <yuehaibing@huawei.com> Signed-off-by:
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YueHaibing authored
Use devm_platform_ioremap_resource() to simplify the code a bit. This is detected by coccinelle. Reported-by:
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YueHaibing authored
Use devm_platform_ioremap_resource() to simplify the code a bit. This is detected by coccinelle. Reported-by:
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YueHaibing authored
Use devm_platform_ioremap_resource() to simplify the code a bit. This is detected by coccinelle. Reported-by:
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YueHaibing authored
Use devm_platform_ioremap_resource() to simplify the code a bit. This is detected by coccinelle. Reported-by:
Ray Jui <ray.jui@broadcom.com> Signed-off-by:
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Colin Ian King authored
Variable result is being assigned a value that is never read and result is being re-assigned a little later on. The assignment is redundant and hence can be removed. Addresses-Coverity: ("Ununsed value") Signed-off-by:Colin Ian King <colin.king@canonical.com> Signed-off-by:
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Eric Dumazet authored
Remove two holes on 64bit arches, to bring the size to one cache line exactly. Signed-off-by:
Eric Dumazet <edumazet@google.com> Signed-off-by:
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David S. Miller authored
Voon Weifeng says: ==================== stmmac: Add EHL and TGL PCI info and PCI ID In order to keep PCI info simple and neat, this patch series have introduced a 3 hierarchy of struct. First layer will be the intel_mgbe_common_data struct which keeps all Intel common configuration. Second layer will be xxx_common_data which keeps all the different Intel microarchitecture, e.g tgl, ehl. The third layer will be configuration that tied to the PCI ID only based on speed and RGMII/SGMII interface. EHL and TGL will also having a higher system clock which is 200Mhz. ==================== Signed-off-by: -
Voon Weifeng authored
EHL DW EQOS is running on a 200MHz clock. Setting up stmmac-clk, ptp clock and ptp_max_adj to 200MHz. Signed-off-by:
Voon Weifeng <weifeng.voon@intel.com> Signed-off-by:
Ong Boon Leong <boon.leong.ong@intel.com> Signed-off-by:
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Voon Weifeng authored
Added EHL RGMII 1Gbps PCI ID. Different MII and speed will have different PCI ID. Signed-off-by:
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Voon Weifeng authored
Added TGL SGMII 1Gbps PCI ID. Different MII and speed will have different PCI ID. Signed-off-by:
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Voon Weifeng authored
Added EHL SGMII 1Gbps PCI ID. Different MII and speed will have different PCI ID. Signed-off-by:
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David S. Miller authored
Marek Behún says: ==================== net: dsa: mv88e6xxx: Peridot/Topaz SERDES changes this is the fifth version of changes for the Topaz/Peridot family of switches. The patches apply on net-next. Changes since v4: - added Reviewed-by and Tested-by tags on first 2 patches, the others are changed are affected by changes in patch 3/6, so I did not add the tags, except for 5/6, which is just macro renaming - patch 3 was changed: the serdes_get_lane returns 0 on success (lane was discovered), -ENODEV if not lane is present on the port, and other error if other error occured. Lane is put into a pointer of type u8 - patches 4 and 6 were affected by this (error detecting from serdes_get_lane) - Andrew's complaint about the two additional parameters (allow_over_2500 and make_cmode_writable) was addressed, by Vivien's advice: I put a new method into chip operations structure, named port_set_cmode_writable. This is called from mv88e6xxx_port_setup_mac just before port_set_cmode. The method is implemented for Topaz. The check if cmodes over 2500 should be allowed on given port is now done in the specific port_set_cmode() that requires it, thus the allow_over_2500 argument is not needed Again, tested on Turris Mox with Peridot, Topaz, and Peridot + Topaz. ==================== Signed-off-by: -
Marek Behún authored
Currently we support SERDES on the Topaz family in a limited way: no IRQs and the cmode is not writable, thus the mode is determined by strapping pins. Marvell's examples though show how to make cmode writable on port 5 and support SGMII autonegotiation. It is done by writing hidden registers, for which we already have code. This patch adds support for making the cmode for the SERDES port writable on the Topaz family, via a new chip operation, .port_set_cmode_writable, which is called from mv88e6xxx_port_setup_mac just before .port_set_cmode. SERDES IRQs are also enabled for Topaz. Tested on Turris Mox. Signed-off-by:
Marek Behún <marek.behun@nic.cz> Reviewed-by:
Vivien Didelot <vivien.didelot@gmail.com> Reviewed-by:
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Marek Behún authored
This is a cosmetic update. We are removing the last underscore from macros MV88E6XXX_PORT_STS_CMODE_100BASE_X and MV88E6XXX_PORT_STS_CMODE_1000BASE_X. The 2500base-x version does not have that underscore. Also PHY_INTERFACE_MODE_ macros do not have it there. Signed-off-by:
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Marek Behún authored
By adding an additional serdes_get_lane implementation (for Topaz), we can merge the implementations of other SERDES functions (powering and IRQs). We can skip checking port numbers, since the serdes_get_lane() methods inform if there is no lane on a port or if the lane cannot be used for given cmode. Signed-off-by:
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Marek Behún authored
Create a serdes_get_lane() method in the mv88e6xxx operations structure. Use it instead of calling the different implementations. Also change the methods so that their return value is used only for error. The lane number is put into a place referred to by a pointer given as argument. If the port does not have a lane, return -ENODEV. Lanes are phy addresses, so use u8 as their type. Signed-off-by:
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Marek Behún authored
This patch moves the functions operating on the hidden debug registers into it's own file, port_hidden.c. The functions prefix is renamed from mv88e6390_hidden_ to mv88e6xxx_port_hidden_, to be consistent with the rest of this driver. The macros are prefixed with MV88E6XXX_ prefix, and are changed not to use the BIT() macro nor bit shifts, since the rest of the port.h file does not use it. We also add the support for setting the Block Address field when operating hidden registers. Marvell's mdio examples for SERDES settings on Topaz use Block Address 0x7 when reading/writing hidden registers, and although the specification says that block must be set to 0xf, those settings are reachable only with Block Address 0x7. Signed-off-by:
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