This patch introduces ARCH_BERLIN to enable Marvell Berlin SoC family in
Kconfig.
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Olof Johansson <olof@lixom.net>

arm: Xilinx ZynqMP dt patches for v4.3

- Add SATA, GPIO, CAN, SMMU, USB, SPI, I2C, watchdog and sdhci for zynqmp
- Sort nodes in dtsi

* tag 'zynqmp-dt-for-4.3' of https://github.com/Xilinx/linux-xlnx:
  ARM64: zynqmp: Move SPI nodes to the right location
  ARM64: zynqmp: Move uart and ttcs to the right location
  ARM64: zynqmp: Enable spi flashes on ep108
  ARM64: zynqmp: Add eeprom memories on i2c bus
  ARM64: zynqmp: Enable sdhci on ep108
  ARM64: zynqmp: Enable watchdog on ep108
  ARM64: zynqmp: Add DWC3 usb support
  ARM64: zynqmp: Add SMMU support
  ARM64: zynqmp: Add CANs node for platform
  ARM64: zynqmp: Use zynqmp specific compatible string for gpio
  devicetree: xilinx: zynqmp: add sata node
Signed-off-by: Olof Johansson <olof@lixom.net>

Qualcomm ARM64 Updates for v4.3

* Add BLSP and required pinctrl info for MSM8916
* Add SDHC aliases and nodes for MSM8916
* Add USB nodes for MSM8916
* Add APQ8016 SBC specific USB configuration
* Add APQ8016 LED configuration

* tag 'qcom-arm64-for-4.3' of git://codeaurora.org/quic/kernel/agross-msm:
  arm64: dts: qcom: Add apq8016-sbc board LED's related device nodes
  arm64: dts: qcom: Fix apq8016-sbc board USB related pin definitions
  arm64: dts: qcom: apq8016-sbc: Don't hog client driver pins
  arm64: dts: qcom: Add msm8916 USB configuration nodes
  arm64: dts: qcom: Add msm8916 sdhci configuration nodes
  arm64: dts: qcom: Add msm8916 BLSP device nodes
  arm64: dts: qcom: Extend msm8916 pinctrl device coverage
Signed-off-by: Olof Johansson <olof@lixom.net>

Keep nodes sorted.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

Sort nodes in DTSI.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

Enable spi flashes on ep108.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

Add i2c eeprom memories on i2c bus.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Shubhrajyoti Datta <shubhraj@xilinx.com>

Enable both sdhcis on ep108.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

Enable watchdog on ep108.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

Add usb nodes to DTSI and enable both of them on ep108.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

Add SMMU DT node to DTSI.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

Also enable can0 for ep108.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

The patch:
"gpio: Added support to Zynq Ultrascale+ MPSoC"
(sha1: bdf7a4ae)
added zynqmp specific features. This patch is switching the driver to
use the zynqmp compatible string.
Also enable the driver for ep108 platform.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

add sata node with sata fixed clock nodes in dtsi file.
enable sata in zynqmp-ep108.dts with broken-gen2.
Signed-off-by: Suneel Garapati <suneel.garapati@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

The current iProc BCMA front-end driver can only work on ARM32 based
platforms; therefore its config option in Kconfig should be changed to
reflect that. This fixes arm64 allmodconfig build failure when compiling
the the iProc BCMA driver that contains struct pci_sys_data that is
arm32 specific
Signed-off-by: Ray Jui <rjui@broadcom.com>
Signed-off-by: Olof Johansson <olof@lixom.net>

Add Broadcom NS2 device tree binding document. Also add initial device
tree dtsi for Broadcom North Star 2 (NS2) SoC and board support for NS2
SVK board
Signed-off-by: Jon Mason <jonmason@broadcom.com>
Signed-off-by: Ray Jui <rjui@broadcom.com>
Reviewed-by: Scott Branden <sbranden@broadcom.com>
Signed-off-by: Olof Johansson <olof@lixom.net>

This patch adds support to Broadcom's iProc family of arm64 based SoCs
in the arm64 Kconfig and defconfig files
Signed-off-by: Ray Jui <rjui@broadcom.com>
Reviewed-by: Scott Branden <sbranden@broadcom.com>
Signed-off-by: Olof Johansson <olof@lixom.net>

Allow Broadcom iProc PCIe core driver to be compiled for ARM64
Signed-off-by: Ray Jui <rjui@broadcom.com>
Reviewed-by: Vikram Prakash <vikramp@broadcom.com>
Reviewed-by: Scott Branden <sbranden@broadcom.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Olof Johansson <olof@lixom.net>

PCI: iproc: Add arm64 support

Add arm64 support to the iProc PCIe driver.

Note that on arm32, bus->sysdata points to the arm32-specific
pci_sys_data struct, and pci_sys_data.private_data contains the
iproc_pcie pointer. For arm64, there's nothing corresponding to
pci_sys_data, so we keep the iproc_pcie pointer directly in
bus->sysdata.

In addition, arm64 does IRQ mapping in pcibios_add_device(), so it
doesn't need pci_fixup_irqs() as arm32 does.
Signed-off-by: Ray Jui <rjui@broadcom.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Scott Branden <sbranden@broadcom.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Olof Johansson <olof@lixom.net>

APQ8016 SBC board have 6 user controllable LED's.

Add following devices:

LED1 green LED triggered by system heartbeat.
LED2 green LED triggered by access to eMMC device.
LED3 green LED triggered by access to SD card.
LED4 green LED no trigger assigned.
LED5 yellow LED triggered by access to WLAN.
LED6 blue LED triggered by access to Bluetooth.
Signed-off-by: Ivan T. Ivanov <ivan.ivanov@linaro.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>

USB2513B HUB reset line is connected to PMIC GPIO3 not GPIO1.

Fix TC7USB40MU Dual SPDT Switch select input line control, which is
connected to PMIC GPIO4 not GPIO2 and disable the pin. It is not used
for now.

Remove user LEDs definitions, because they clash with above numbers.
Signed-off-by: Ivan T. Ivanov <ivan.ivanov@linaro.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>

Hogging pins from pinctrl driver prevents client drivers
to probe.
Signed-off-by: Ivan T. Ivanov <ivan.ivanov@linaro.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>

Add Host, Device and OTG configuration nodes.
Signed-off-by: Ivan T. Ivanov <ivan.ivanov@linaro.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>

Add sdhci1 and sdhci2 device configuration nodes.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Ivan T. Ivanov <ivan.ivanov@linaro.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>

Add device nodes for SPI1, SPI2, SPI3, I2C4, SPI5, SPI6 and
BAM(DMA) engine connected to them.
Signed-off-by: Stanimir Varbanov <stanimir.varbanov@linaro.org>
Signed-off-by: Ivan T. Ivanov <ivan.ivanov@linaro.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>

Create separate file for MSM8916 pinctrl default/sleep pins state
definitions. Move in UART2 states and add SPI, I2C and SDC configurations.
Signed-off-by: Stanimir Varbanov <stanimir.varbanov@linaro.org>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Ivan T. Ivanov <ivan.ivanov@linaro.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>

- arm64: dts: mediatek: add mt6795 support
- Document: DT: Add bindings for mediatek MT6795 SoC Platform
- arm64: dts: mediatek: Add MT8173 MMC dts
- arm64: dts: mt8173: Add afe device node
- arm64: dts: mt8173-evb: Add PMIC support
- dts: mt8173-evb: Add da9211 to i2c1
- ARM: dts: mt8173: support arm64 cpuidle-dt
- ARM64: MediaTek MT8173: Add SCPSYS device node
- arm64: dts: mt8173: Add I2C device node
- arm64: dts: mt8173: Add watchdog device node
- arm64: dts: mt8173: Add PMIC wrapper device node
- arm64: dts: mt8173: Use real clock for UARTs
- arm64: dts: mt8173: Add clock controller device nodes

* tag 'v4.2-next-arm64' of https://github.com/mbgg/linux-mediatek:
  arm64: dts: mediatek: add mt6795 support
  Document: DT: Add bindings for mediatek MT6795 SoC Platform
  arm64: dts: mediatek: Add MT8173 MMC dts
  arm64: dts: mt8173: Add afe device node
  arm64: dts: mt8173-evb: Add PMIC support
  dts: mt8173-evb: Add da9211 to i2c1
  ARM: dts: mt8173: support arm64 cpuidle-dt
  ARM64: MediaTek MT8173: Add SCPSYS device node
  arm64: dts: mt8173: Add I2C device node
  arm64: dts: mt8173: Add watchdog device node
  arm64: dts: mt8173: Add PMIC wrapper device node
  arm64: dts: mt8173: Use real clock for UARTs
  arm64: dts: mt8173: Add clock controller device nodes
Signed-off-by: Olof Johansson <olof@lixom.net>

This adds basic chip support for MT6795 SoC
Signed-off-by: Mars Cheng <mars.cheng@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>

This adds DT binding documentation for Mediatek MT6795.
Signed-off-by: Mars Cheng <mars.cheng@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>

Add node mmc0 ~ mmc3 for mt8173.dtsi
Add node mmc0, mmc1 for mt8173-evb.dts
Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com>
Signed-off-by: Eddie Huang <eddie.huang@mediatek.com>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>

They're not relative. My builder failed silently and never notified me of the
error. Sigh.
Signed-off-by: Olof Johansson <olof@lixom.net>

This adds afe (audio front end) device node to the MT8173 dtsi file.
Signed-off-by: Koro Chen <koro.chen@mediatek.com>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>

In terms of peripherals the rk3368 is quite similar to the rk3288, which
makes it possible to have a lot basic components working in the first go.
More to follow once I tracked down all the tiny differences that still
exist in some parts.

With these dts files, the R88 board is able to boot from an attached
usb device and most likely from its emmc too, if the emmc uses a standard
partition table instead of Rockchip's own one - the emmc itself is
detected correctly.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Olof Johansson <olof@lixom.net>

Merge in dependent stable branch with clk driver for RK3368, needed for the
dt binding header files.

* depends/clk-rk3368:
  clk: rockchip: add rk3368 clock controller
  clk: rockchip: add missing include guards
  clk: rockchip: add dt-binding header for rk3368
  dt-bindings: add documentation of rk3668 clock controller
  clk: rockchip: define the inverters of rk3066/rk3188 and rk3288
  clk: rockchip: fix issues in the mmc-phase clock
  clk: rockchip: add support for phase inverters
  clk: rockchip: add COMPOSITE_NOGATE_DIVTBL variant
  clk: rockchip: protect register macros against multipart values
  clk: rockchip: fix faulty vip parent name on rk3288
  clk: rockchip: rk3288: add CLK_SET_RATE_PARENT to sclk_mac
Signed-off-by: Olof Johansson <olof@lixom.net>

Enable building Rockchip support in the defconfig.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Olof Johansson <olof@lixom.net>

The rk3368 is Rockchip's first ARM64 soc, build around 8 Cortex-A53 cores.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Olof Johansson <olof@lixom.net>

Let's move out the platform Kconfig entries to a separate file, since these
changes usually get moved through arm-soc instead of the arm64 arch tree, and
this will lead to fewer conflicts
Signed-off-by: Olof Johansson <olof@lixom.net>
Acked-by: Will Deacon <will.deacon@arm.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>

Since ETMv4 driver has been merged, this patch adds ETM nodes for SC9836,
and four funnel input ports to connect with ETM output ports.
Signed-off-by: Chunyan Zhang <zhang.chunyan@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>

This reverts commit dec4f799.

Jörg Otte reports a NULL pointder dereference due to this commit, as
'crtc_state' very much can be NULL:

        crtc_state = state->base.state ?
                intel_atomic_get_crtc_state(state->base.state, intel_crtc) : NULL;

So the change to test 'crtc_state->base.active' cannot possibly be
correct as-is.

There may be some other minimal fix (like just checking crtc_state for
NULL), but I'm just reverting it now for the rc2 release, and people
like Daniel Vetter who actually know this code will figure out what the
right solution is in the longer term.
Reported-and-bisected-by: Jörg Otte <jrg.otte@gmail.com>
Cc: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Daniel Vetter <daniel.vetter@intel.com>
CC: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>