1. 06 Nov, 2013 1 commit
  2. 04 Nov, 2013 1 commit
    • Martin Schwidefsky's avatar
      s390/mm,tlb: correct tlb flush on page table upgrade · 10607864
      Martin Schwidefsky authored
      The IDTE instruction used to flush TLB entries for a specific address
      space uses the address-space-control element (ASCE) to identify
      affected TLB entries. The upgrade of a page table adds a new top
      level page table which changes the ASCE. The TLB entries associated
      with the old ASCE need to be flushed and the ASCE for the address space
      needs to be replaced synchronously on all CPUs which currently use it.
      The concept of a lazy ASCE update with an exception handler is broken.
      Signed-off-by: default avatarMartin Schwidefsky <schwidefsky@de.ibm.com>
      10607864
  3. 31 Oct, 2013 5 commits
  4. 28 Oct, 2013 3 commits
  5. 24 Oct, 2013 30 commits