- 28 Apr, 2017 40 commits
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Evan Quan authored
Updated interface between the driver and the SMU controller. Signed-off-by:
Evan Quan <evan.quan@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com> Reviewed-by:
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Tom St Denis authored
So it's more obvious which rings are using which INV engines. Signed-off-by:
Tom St Denis <tom.stdenis@amd.com> Reviewed-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
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Tom St Denis authored
umr expects the ring name to be a complete word. This also makes it consistent with GFXv7/8. Signed-off-by:
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Tom St Denis authored
umr expects the ring name to be a complete word. This also makes it consistent with GFXv7/8. Signed-off-by:
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Trigger Huang authored
Apply commit 4e683cb2644f ("drm/amdgpu: Fix module unload hang by KIQ IRQ set")to vega10 V2: delete reduant kiq irq funcs type check (suggested by Rex.Zhu) Signed-off-by:Trigger Huang <trigger.huang@amd.com> Reviewed-by:
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Rex Zhu authored
if we set only lowest mclk level enabled, when we enable uvd dpm during boot time, mclk will be fixed in the lowest level. the mclk switch will fail if try to enable other level of mclk at this time. so set all mclk levels enabled. Signed-off-by:
Rex Zhu <Rex.Zhu@amd.com> Reviewed-by:
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Xiangliang Yu authored
For SRIOV doesn't need clockgating, bypass it. Signed-off-by:
Xiangliang Yu <Xiangliang.Yu@amd.com> Reviewed-by:
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Xiangliang Yu authored
For SRIOV doesn't need CG, so bypass it. Signed-off-by:
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Christian König authored
Based on commit "drm/radeon: remove useless and potentially wrong message". The size of the info printing is incorrect and the PCI subsystems prints the same info on boot anyway. Signed-off-by:
Edward O'Callaghan <funfunctor@folklore1984.net> Signed-off-by:
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Pixel Ding authored
The interrupt after FLR is missed sometimes due to hardware reason, so guest driver get the notification of FLR completion via polling message. Then host doesn't write VALID bit to avoid sending interrupt, otherwise the completion will be handled twice. So there's a valid message without VALID bit for FLR completion, driver should handle it without checking. Signed-off-by:
Pixel Ding <Pixel.Ding@amd.com> Reviewed-by:
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Junwei Zhang authored
Was incorrect for SI. Signed-off-by:
Junwei Zhang <Jerry.Zhang@amd.com> Reviewed-by:
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Rex Zhu authored
Vega10 does not support AVFS BTC, remove function. Signed-off-by:
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Rex Zhu authored
Replace 8 spaces with tabs. correct {} braces, etc. Signed-off-by: -
Rex Zhu authored
Signed-off-by:
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Huang Rui authored
The ret must be 0 here, otherwise, the function will return after init_mem_type. Signed-off-by:
Huang Rui <ray.huang@amd.com> Reviewed-by:
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Huang Rui authored
Signed-off-by:
Michel Dänzer <michel.daenzer@amd.com> Signed-off-by:
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Huang Rui authored
Driver must free the console lock whether driver resuming successful or not. Otherwise, fb_console will be always waiting for the lock and then cause system stuck. [ 244.405541] INFO: task kworker/0:0:4 blocked for more than 120 seconds. [ 244.405543] Tainted: G OE 4.9.0-custom #1 [ 244.405544] "echo 0 > /proc/sys/kernel/hung_task_timeout_secs" disables this message. [ 244.405541] INFO: task kworker/0:0:4 blocked for more than 120 seconds. [ 244.405543] Tainted: G OE 4.9.0-custom #1 [ 244.405544] "echo 0 > /proc/sys/kernel/hung_task_timeout_secs" disables this message. [ 244.405550] kworker/0:0 D 0 4 2 0x00080000 [ 244.405559] Workqueue: events console_callback [ 244.405564] ffff88045a2cfc00 0000000000000000 ffff880462b75940 ffffffff81c0e500 [ 244.405568] ffff880476419280 ffffc900018f7c90 ffffffff817dcf62 000000000000003c [ 244.405572] 0000000100000000 0000000000000002 ffff880462b75940 ffff880462b75940 [ 244.405573] Call Trace: [ 244.405580] [<ffffffff817dcf62>] ? __schedule+0x222/0x6a0 [ 244.405584] [<ffffffff817dd416>] schedule+0x36/0x80 [ 244.405588] [<ffffffff817e041c>] schedule_timeout+0x1fc/0x390 [ 244.405592] [<ffffffff817df1b4>] __down_common+0xa5/0xf8 [ 244.405598] [<ffffffff810b2ca8>] ? put_prev_entity+0x48/0x710 [ 244.405601] [<ffffffff817df224>] __down+0x1d/0x1f [ 244.405606] [<ffffffff810c71a1>] down+0x41/0x50 [ 244.405611] [<ffffffff810d380a>] console_lock+0x1a/0x40 [ 244.405614] [<ffffffff814e3c03>] console_callback+0x13/0x160 [ 244.405617] [<ffffffff817dcf6a>] ? __schedule+0x22a/0x6a0 [ 244.405623] [<ffffffff810954e3>] process_one_work+0x153/0x3f0 [ 244.405628] [<ffffffff81095cab>] worker_thread+0x12b/0x4b0 [ 244.405633] [<ffffffff81095b80>] ? rescuer_thread+0x350/0x350 [ 244.405637] [<ffffffff8109b473>] kthread+0xd3/0xf0 [ 244.405641] [<ffffffff8109b3a0>] ? kthread_park+0x60/0x60 [ 244.405645] [<ffffffff8109b3a0>] ? kthread_park+0x60/0x60 [ 244.405649] [<ffffffff817e1ee5>] ret_from_fork+0x25/0x30 Signed-off-by:
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Christian König authored
Seems to be mandatory for WMV playback. Bugs: https://bugs.freedesktop.org/show_bug.cgi?id=100510Signed-off-by:
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Alex Deucher authored
fixed in: "drm/amdgpu:fix race condition" Reviewed-by:
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Alex Deucher authored
Reviewed-by:
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Christian König authored
Trace on which hub we are doing the flush. v2: fix typo in commit message Signed-off-by:
Andres Rodriguez <andresx7@gmail.com> Signed-off-by:
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Christian König authored
Trace on which VMHUB we assigned an VMID. Signed-off-by:
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Christian König authored
Enable concurrent VM flushes for Vega10. Signed-off-by:
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Christian König authored
For Vega10 we have 18 VM invalidation engines for each VMHUB. Start to assign them manually to the rings. v2: add a BUG_ON if we use to many engines Signed-off-by:
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Christian König authored
Drop invalidating both hubs from each engine. v2: don't use hardcoded values Signed-off-by:
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Christian König authored
This way GFX and MM won't fight for VMIDs any more. Initially disabled since we need to stop flushing all HUBS at the same time as well. Signed-off-by:
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Christian König authored
David suggested this a long time ago, instead of checking each ring just walk over all the VMIDs in reverse LRU order. Signed-off-by:
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Christian König authored
Add the info which ring belonging to which VMHUB. Signed-off-by:
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Frank Min authored
Now VCE block can work for SRIOV, enable ring & ib test. Signed-off-by:
Frank Min <Frank.Min@amd.com> Acked-by:
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Xiangliang Yu authored
Add VCE ring test slow workaround for SRIOV. Signed-off-by:
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Frank Min authored
Update the initialization sequence of VCE to make VCE work. Signed-off-by:
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Trigger Huang authored
In Tonga's virtualization environment, for firmware UCODE_ID_STORAGE, there is no actual firmware data, but we still need alloc a BO and tell the BO's mc address to HW, or world switch will hang on VFs. v2: fix coding style (Alex) Signed-off-by:
Monk Liu <monk.liu@amd.com> Acked-by:
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Huang Rui authored
This patch fixes the case when buffer funcs is empty and bo evict is executing. It must double check buffer funcs, otherwise, a NULL pointer dereference kernel panic will be encountered. BUG: unable to handle kernel NULL pointer dereference at 00000000000001a4 IP: [<ffffffffa067b6cd>] amdgpu_evict_flags+0x3d/0xf0 [amdgpu] PGD 0 Oops: 0000 [#1] SMP Modules linked in: amdgpu(OE) ttm drm_kms_helper drm i2c_algo_bit fb_sys_fops syscopyarea sysfillrect sysimgblt fmem(OE) physmem_drv(OE) rpcsec_gss_krb5 nfsv4 nfs fscache intel_rapl x86_pkg_temp_thermal intel_powerclamp snd_hda_codec_realtek snd_hda_codec_hdmi snd_hda_codec_generic kvm_intel snd_hda_intel snd_hda_codec kvm snd_hda_core joydev eeepc_wmi asus_wmi sparse_keymap snd_hwdep snd_pcm irqbypass crct10dif_pclmul snd_seq_midi snd_seq_midi_event snd_rawmidi snd_seq crc32_pclmul snd_seq_device ghash_clmulni_intel aesni_intel aes_x86_64 snd_timer lrw gf128mul mei_me snd glue_helper ablk_helper cryptd tpm_infineon mei lpc_ich serio_raw soundcore shpchp mac_hid nfsd auth_rpcgss nfs_acl lockd grace coretemp sunrpc parport_pc ppdev lp parport autofs4 hid_generic mxm_wmi r8169 usbhid ahci psmouse libahci nvme mii hid nvme_core wmi video CPU: 3 PID: 1627 Comm: kworker/u8:17 Tainted: G OE 4.9.0-custom #1 Hardware name: ASUS All Series/Z87-A, BIOS 1802 01/28/2014 Workqueue: events_unbound async_run_entry_fn task: ffff88021e7057c0 task.stack: ffffc9000262c000 RIP: 0010:[<ffffffffa067b6cd>] [<ffffffffa067b6cd>] amdgpu_evict_flags+0x3d/0xf0 [amdgpu] RSP: 0018:ffffc9000262fb30 EFLAGS: 00010246 RAX: 0000000000000000 RBX: ffff88021e8a5858 RCX: 0000000000000000 RDX: 0000000000000001 RSI: ffffc9000262fb58 RDI: ffff88021e8a5800 RBP: ffffc9000262fb48 R08: 0000000000000000 R09: ffff88021e8a5814 R10: 000000001def8f01 R11: ffff88021def8c80 R12: ffffc9000262fb58 R13: ffff88021d2b1990 R14: 0000000000000000 R15: ffff88021e8a5858 FS: 0000000000000000(0000) GS:ffff88022ed80000(0000) knlGS:0000000000000000 CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 CR2: 00000000000001a4 CR3: 0000000001c07000 CR4: 00000000001406e0 DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000 DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000400 Signed-off-by:
Ken Wang <Qingqing.Wang@amd.com> Signed-off-by:
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Huang Rui authored
ASIC_INIT_COMPLETE bit must be cleared during S3 resuming phase, because VBIOS will check the bit to decide if execute ASIC_Init posting via kernel driver. Signed-off-by:
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Huang Rui authored
Fence buf needs to be used on suspend/resume phase. Signed-off-by:
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Huang Rui authored
Don't fail if DPM is disabled. Signed-off-by:
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Monk Liu authored
sequence is protected by spinlock so don't access sequence in paramter seq when invoking this function. ~0 means to get the latest sequence number and 0 means none to get. Change-Id: Ib7a03f3cf5594deeb4ad333cc59b47a6bddfd1ad Signed-off-by:
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Tom St Denis authored
Signed-off-by:
Chunming Zhou <david1.zhou@amd.com> Signed-off-by:
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Tom St Denis authored
Signed-off-by:
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Huang Rui authored
Rework in order to properly support suspend. Signed-off-by:
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