1. 25 Feb, 2023 9 commits
    • Youling Tang's avatar
      LoongArch: Add support for kernel address space layout randomization (KASLR) · e5f02b51
      Youling Tang authored
      This patch adds support for relocating the kernel to a random address.
      
      Entropy is derived from the banner, which will change every build and
      random_get_entropy() which should provide additional runtime entropy.
      
      The kernel is relocated by up to RANDOMIZE_BASE_MAX_OFFSET bytes from
      its link address. Because relocation happens so early during the kernel
      booting, the amount of physical memory has not yet been determined. This
      means the only way to limit relocation within the available memory is
      via Kconfig. So we limit the maximum value of RANDOMIZE_BASE_MAX_OFFSET
      to 256M (0x10000000) because our memory layout has many holes.
      Signed-off-by: default avatarYouling Tang <tangyouling@loongson.cn>
      Signed-off-by: Xi Ruoyao <xry111@xry111.site> # Fix compiler warnings
      Signed-off-by: default avatarHuacai Chen <chenhuacai@loongson.cn>
      e5f02b51
    • Youling Tang's avatar
      LoongArch: Add support for kernel relocation · d8da19fb
      Youling Tang authored
      This config allows to compile kernel as PIE and to relocate it at any
      virtual address at runtime: this paves the way to KASLR.
      
      Runtime relocation is possible since relocation metadata are embedded
      into the kernel.
      Signed-off-by: default avatarYouling Tang <tangyouling@loongson.cn>
      Signed-off-by: Xi Ruoyao <xry111@xry111.site> # Use arch_initcall
      Signed-off-by: Jinyang He <hejinyang@loongson.cn> # Provide la_abs relocation code
      Signed-off-by: default avatarHuacai Chen <chenhuacai@loongson.cn>
      d8da19fb
    • Youling Tang's avatar
      LoongArch: Add la_abs macro implementation · 396233c6
      Youling Tang authored
      Use the "la_abs macro" instead of the "la.abs pseudo instruction" to
      prepare for the subsequent PIE kernel. When PIE is not enabled, la_abs
      is equivalent to la.abs.
      Signed-off-by: default avatarYouling Tang <tangyouling@loongson.cn>
      Signed-off-by: default avatarHuacai Chen <chenhuacai@loongson.cn>
      396233c6
    • Youling Tang's avatar
      LoongArch: Add JUMP_VIRT_ADDR macro implementation to avoid using la.abs · 8cbd5ebf
      Youling Tang authored
      Add JUMP_VIRT_ADDR macro implementation to avoid using la.abs directly.
      This is a preparation for subsequent patches.
      Signed-off-by: default avatarYouling Tang <tangyouling@loongson.cn>
      Signed-off-by: default avatarHuacai Chen <chenhuacai@loongson.cn>
      8cbd5ebf
    • Xi Ruoyao's avatar
      LoongArch: Use la.pcrel instead of la.abs when it's trivially possible · f733f119
      Xi Ruoyao authored
      Let's start to kill la.abs in preparation for the subsequent support of
      the PIE kernel.
      
      BTW, Re-tab the indention in arch/loongarch/kernel/entry.S for alignment.
      Signed-off-by: default avatarXi Ruoyao <xry111@xry111.site>
      Signed-off-by: default avatarHuacai Chen <chenhuacai@loongson.cn>
      f733f119
    • Huacai Chen's avatar
      LoongArch: Make -mstrict-align configurable · 41596803
      Huacai Chen authored
      Introduce Kconfig option ARCH_STRICT_ALIGN to make -mstrict-align be
      configurable.
      
      Not all LoongArch cores support h/w unaligned access, we can use the
      -mstrict-align build parameter to prevent unaligned accesses.
      
      CPUs with h/w unaligned access support:
      Loongson-2K2000/2K3000/3A5000/3C5000/3D5000.
      
      CPUs without h/w unaligned access support:
      Loongson-2K500/2K1000.
      
      This option is enabled by default to make the kernel be able to run on
      all LoongArch systems. But you can disable it manually if you want to
      run kernel only on systems with h/w unaligned access support in order to
      optimise for performance.
      Reviewed-by: default avatarArnd Bergmann <arnd@arndb.de>
      Signed-off-by: default avatarHuacai Chen <chenhuacai@loongson.cn>
      41596803
    • Tiezhu Yang's avatar
      LoongArch: Only call get_timer_irq() once in constant_clockevent_init() · bb7a78e3
      Tiezhu Yang authored
      Under CONFIG_DEBUG_ATOMIC_SLEEP=y and CONFIG_DEBUG_PREEMPT=y, we can see
      the following messages on LoongArch, this is because using might_sleep()
      in preemption disable context.
      
      [    0.001127] smp: Bringing up secondary CPUs ...
      [    0.001222] Booting CPU#1...
      [    0.001244] 64-bit Loongson Processor probed (LA464 Core)
      [    0.001247] CPU1 revision is: 0014c012 (Loongson-64bit)
      [    0.001250] FPU1 revision is: 00000000
      [    0.001252] BUG: sleeping function called from invalid context at kernel/locking/mutex.c:283
      [    0.001255] in_atomic(): 1, irqs_disabled(): 1, non_block: 0, pid: 0, name: swapper/1
      [    0.001257] preempt_count: 1, expected: 0
      [    0.001258] RCU nest depth: 0, expected: 0
      [    0.001259] Preemption disabled at:
      [    0.001261] [<9000000000223800>] arch_dup_task_struct+0x20/0x110
      [    0.001272] CPU: 1 PID: 0 Comm: swapper/1 Not tainted 6.2.0-rc7+ #43
      [    0.001275] Hardware name: Loongson Loongson-3A5000-7A1000-1w-A2101/Loongson-LS3A5000-7A1000-1w-A2101, BIOS vUDK2018-LoongArch-V4.0.05132-beta10 12/13/202
      [    0.001277] Stack : 0072617764726148 0000000000000000 9000000000222f1c 90000001001e0000
      [    0.001286]         90000001001e3be0 90000001001e3be8 0000000000000000 0000000000000000
      [    0.001292]         90000001001e3be8 0000000000000040 90000001001e3cb8 90000001001e3a50
      [    0.001297]         9000000001642000 90000001001e3be8 be694d10ce4139dd 9000000100174500
      [    0.001303]         0000000000000001 0000000000000001 00000000ffffe0a2 0000000000000020
      [    0.001309]         000000000000002f 9000000001354116 00000000056b0000 ffffffffffffffff
      [    0.001314]         0000000000000000 0000000000000000 90000000014f6e90 9000000001642000
      [    0.001320]         900000000022b69c 0000000000000001 0000000000000000 9000000001736a90
      [    0.001325]         9000000100038000 0000000000000000 9000000000222f34 0000000000000000
      [    0.001331]         00000000000000b0 0000000000000004 0000000000000000 0000000000070000
      [    0.001337]         ...
      [    0.001339] Call Trace:
      [    0.001342] [<9000000000222f34>] show_stack+0x5c/0x180
      [    0.001346] [<90000000010bdd80>] dump_stack_lvl+0x60/0x88
      [    0.001352] [<9000000000266418>] __might_resched+0x180/0x1cc
      [    0.001356] [<90000000010c742c>] mutex_lock+0x20/0x64
      [    0.001359] [<90000000002a8ccc>] irq_find_matching_fwspec+0x48/0x124
      [    0.001364] [<90000000002259c4>] constant_clockevent_init+0x68/0x204
      [    0.001368] [<900000000022acf4>] start_secondary+0x40/0xa8
      [    0.001371] [<90000000010c0124>] smpboot_entry+0x60/0x64
      
      Here are the complete call chains:
      
      smpboot_entry()
        start_secondary()
          constant_clockevent_init()
            get_timer_irq()
              irq_find_matching_fwnode()
                irq_find_matching_fwspec()
                  mutex_lock()
                    might_sleep()
                      __might_sleep()
                        __might_resched()
      
      In order to avoid the above issue, we should break the call chains,
      using timer_irq_installed variable as check condition to only call
      get_timer_irq() once in constant_clockevent_init() is a simple and
      proper way.
      Signed-off-by: default avatarTiezhu Yang <yangtiezhu@loongson.cn>
      Signed-off-by: default avatarHuacai Chen <chenhuacai@loongson.cn>
      bb7a78e3
    • Jinyang He's avatar
      LoongArch: Fix Chinese comma in cpu.h · fd200632
      Jinyang He authored
      Fix Chinese comma introduced by accident in cpu.h.
      Signed-off-by: default avatarJinyang He <hejinyang@loongson.cn>
      Signed-off-by: default avatarHuacai Chen <chenhuacai@loongson.cn>
      fd200632
    • Huacai Chen's avatar
      Merge 'pci/enumeration' into loongarch-next · 4093b006
      Huacai Chen authored
      LoongArch architecture changes for 6.3 depend on the pci changes
      to work well, so merge them to create a base.
      4093b006
  2. 19 Feb, 2023 4 commits
  3. 18 Feb, 2023 4 commits
    • Linus Torvalds's avatar
      Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm · 5e725d11
      Linus Torvalds authored
      Pull kvm/x86 fixes from Paolo Bonzini:
      
       - zero all padding for KVM_GET_DEBUGREGS
      
       - fix rST warning
      
       - disable vPMU support on hybrid CPUs
      
      * tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm:
        kvm: initialize all of the kvm_debugregs structure before sending it to userspace
        perf/x86: Refuse to export capabilities for hybrid PMUs
        KVM: x86/pmu: Disable vPMU support on hybrid CPUs (host PMUs)
        Documentation/hw-vuln: Fix rST warning
      5e725d11
    • Linus Torvalds's avatar
      Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux · 0c2822b1
      Linus Torvalds authored
      Pull arm64 regression fix from Will Deacon:
       "Apologies for the _extremely_ late pull request here, but we had a
        'perf' (i.e. CPU PMU) regression on the Apple M1 reported on Wednesday
        [1] which was introduced by bd275681 ("perf: Rewrite core context
        handling") during the merge window.
      
        Mark and I looked into this and noticed an additional problem caused
        by the same patch, where the 'CHAIN' event (used to combine two
        adjacent 32-bit counters into a single 64-bit counter) was not being
        filtered correctly. Mark posted a series on Thursday [2] which
        addresses both of these regressions and I queued it the same day.
      
        The changes are small, self-contained and have been confirmed to fix
        the original regression.
      
        Summary:
      
         - Fix 'perf' regression for non-standard CPU PMU hardware (i.e. Apple
           M1)"
      
      * tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
        arm64: perf: reject CHAIN events at creation time
        arm_pmu: fix event CPU filtering
      0c2822b1
    • Linus Torvalds's avatar
      Merge tag 'block-6.2-2023-02-17' of git://git.kernel.dk/linux · 0e9fd589
      Linus Torvalds authored
      Pull block fix from Jens Axboe:
       "I guess this is what can happen when you prep things early for going
        away, something else comes in last minute. This one fixes another
        regression in 6.2 for NVMe, from this release, and hence we should
        probably get it submitted for 6.2.
      
        Still waiting for the original reporter (see bugzilla linked in the
        commit) to test this, but Keith managed to setup and recreate the
        issue and tested the patch that way"
      
      * tag 'block-6.2-2023-02-17' of git://git.kernel.dk/linux:
        nvme-pci: refresh visible attrs for cmb attributes
      0e9fd589
    • Linus Torvalds's avatar
      Merge tag 'mm-hotfixes-stable-2023-02-17-15-16-2' of... · 38f8ccde
      Linus Torvalds authored
      Merge tag 'mm-hotfixes-stable-2023-02-17-15-16-2' of git://git.kernel.org/pub/scm/linux/kernel/git/akpm/mm
      
      Pull misc fixes from Andrew Morton:
       "Six hotfixes. Five are cc:stable: four for MM, one for nilfs2.
      
        Also a MAINTAINERS update"
      
      * tag 'mm-hotfixes-stable-2023-02-17-15-16-2' of git://git.kernel.org/pub/scm/linux/kernel/git/akpm/mm:
        nilfs2: fix underflow in second superblock position calculations
        hugetlb: check for undefined shift on 32 bit architectures
        mm/migrate: fix wrongly apply write bit after mkdirty on sparc64
        MAINTAINERS: update FPU EMULATOR web page
        mm/MADV_COLLAPSE: set EAGAIN on unexpected page refcount
        mm/filemap: fix page end in filemap_get_read_batch
      38f8ccde
  4. 17 Feb, 2023 20 commits
  5. 16 Feb, 2023 3 commits