- 13 Aug, 2014 19 commits
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Arnaldo Carvalho de Melo authored
The 'top' tool initially supported only kernel symbols, when making it support userspace symbols we forgot to make the symbol filter first check that the DSO is the kernel one. Fix it. Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: David Ahern <dsahern@gmail.com> Cc: Don Zickus <dzickus@redhat.com> Cc: Frederic Weisbecker <fweisbec@gmail.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Mike Galbraith <efault@gmx.de> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Paul Mackerras <paulus@samba.org> Cc: Peter Zijlstra <peterz@infradead.org> c: Stephane Eranian <eranian@google.com> Link: http://lkml.kernel.org/n/tip-54haztkeigmbump5sexxnzhv@git.kernel.orgSigned-off-by:
Arnaldo Carvalho de Melo <acme@redhat.com>
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Peter Zijlstra authored
Keeping track of all the various CPU names is hard enough; adding extra silly names for no reason is just not helping. If we know the base arch name (IvyBridge) then we can do the client/server parts with the well known {,EP,EX} postfixes, no need to remember endless amounts of unrelated and pointless names for this. Signed-off-by:Peter Zijlstra <peterz@infradead.org> Link: http://lkml.kernel.org/n/tip-8559jke61dsyr7d0i74iutli@git.kernel.org Cc: Arnaldo Carvalho de Melo <acme@kernel.org> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Stephane Eranian <eranian@google.com> Cc: Yan, Zheng <zheng.z.yan@intel.com> Signed-off-by:
Ingo Molnar <mingo@kernel.org>
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Stephane Eranian authored
This patch exposes two basic events for Ivytown IMC uncore PMU: - cas_count_read: number of full-cache line reads to memory controller - cas_count_write: number of full-cache line writes to memory controller Those events use the same encoding as for SNB-EP, so reuse the same event table. See specification in: http://www.intel.com/content/dam/www/public/us/en/documents/manuals/xeon-e5-2600-v2-uncore-manual.pdf By aggregating all the read and write events from all the memory controllers of each processor socket, one can determine the total memory bandwidth utilization. Signed-off-by:
Stephane Eranian <eranian@google.com> Signed-off-by:
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Stephane Eranian authored
This patch makes the code more readable. It also renames precise_store_data_hsw() to precise_datala_hsw() because the function is called for both loads and stores on HSW. The patch also gets rid of the hardcoded store events codes in that same function. Signed-off-by:
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Stephane Eranian authored
This patch fixes issues introuduce by Andi's previous patch 'Revamp PEBS' series. This patch fixes the following: - precise_store_data_hsw() encode the mem op type whenever we can - precise_store_data_hsw set the default data source correctly - 0 is not a valid init value for data source. Define PERF_MEM_NA as the default value This bug was actually introduced by commit 722e76e6 Author: Stephane Eranian <eranian@google.com> Date: Thu May 15 17:56:44 2014 +0200 fix Haswell precise store data source encoding Signed-off-by: -
Andi Kleen authored
Haswell supports reporting the data address for a range of PEBS events, including: UOPS_RETIRED.ALL MEM_UOPS_RETIRED.STLB_MISS_LOADS MEM_UOPS_RETIRED.STLB_MISS_STORES MEM_UOPS_RETIRED.LOCK_LOADS MEM_UOPS_RETIRED.SPLIT_LOADS MEM_UOPS_RETIRED.SPLIT_STORES MEM_UOPS_RETIRED.ALL_LOADS MEM_UOPS_RETIRED.ALL_STORES MEM_LOAD_UOPS_RETIRED.L1_HIT MEM_LOAD_UOPS_RETIRED.L2_HIT MEM_LOAD_UOPS_RETIRED.L3_HIT MEM_LOAD_UOPS_RETIRED.L1_MISS MEM_LOAD_UOPS_RETIRED.L2_MISS MEM_LOAD_UOPS_RETIRED.L3_MISS MEM_LOAD_UOPS_RETIRED.HIT_LFB MEM_LOAD_UOPS_L3_HIT_RETIRED.XSNP_MISS MEM_LOAD_UOPS_L3_HIT_RETIRED.XSNP_HIT MEM_LOAD_UOPS_L3_HIT_RETIRED.XSNP_HITM MEM_LOAD_UOPS_L3_HIT_RETIRED.XSNP_NONE MEM_LOAD_UOPS_L3_MISS_RETIRED.LOCAL_DRAM This facility was already enabled earlier with the original Haswell perf changes. However these addresses were always reports as stores by perf, which is wrong, as they could be loads too. The hardware does not distinguish loads and stores for these instructions, so there's no (cheap) way for the profiler to find out. Change the type to PERF_MEM_OP_NA instead. Signed-off-by:
Andi Kleen <ak@linux.intel.com> Reviewed-by:
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Andi Kleen authored
The basic idea is that it does not make sense to list all PEBS events individually. The list is very long, sometimes outdated and the hardware doesn't need it. If an event does not support PEBS it will just not count, there is no security issue. We need to only list events that something special, like supporting load or store addresses. This vastly simplifies the PEBS event selection. It also speeds up the scheduling because the scheduler doesn't have to walk as many constraints. Bugs fixed: - We do not allow setting forbidden flags with PEBS anymore (SDM 18.9.4), except for the special cycle event. This is done using a new constraint macro that also matches on the event flags. - Correct DataLA and load/store/na flags reporting on Haswell [Requires a followon patch] - We did not allow all PEBS events on Haswell: We were missing some valid subevents in d1-d2 (MEM_LOAD_UOPS_RETIRED.*, MEM_LOAD_UOPS_RETIRED_L3_HIT_RETIRED.*) This includes the changes proposed by Stephane earlier and obsoletes his patchkit (except for some changes on pre Sandy Bridge/Silvermont CPUs) I only did Sandy Bridge and Silvermont and later so far, mostly because these are the parts I could directly confirm the hardware behavior with hardware architects. Also I do not believe the older CPUs have any missing events in their PEBS list, so there's no pressing need to change them. I did not implement the flag proposed by Peter to allow setting forbidden flags. If really needed this could be implemented on to of this patch. v2: Fix broken store events on SNB/IVB (Stephane Eranian) v3: More fixes. Rename some arguments (Stephane Eranian) v4: List most Haswell events individually again to report memory operation type correctly. Add new flags to describe load/store/na for datala. Update description. Signed-off-by:
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Andi Kleen authored
This fixes a side effect of Kan's earlier patch to probe the LBRs at boot time. Normally when the LBRs are disabled cycles:pp is disabled too. So for example cycles:pp doesn't work. However this is not needed with PEBSv2 and later (Haswell) because it does not need LBRs to correct the IP-off-by-one. So add an extra check for PEBSv2 that also allows :pp Signed-off-by:
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Sebastian Andrzej Siewior authored
One should first enqueue to the waitqueue and then check for the condition. If the condition gets true after mutex_unlock() but before poll_wait() then we lose it and would have wait for another wakeup. This has been like this since v2.6.31-rc1 commit c7138f37 ("perf_counter: fix perf_poll()"). Before that it was slightly worse. I guess we get enough wakeups so if we miss here one it doesn't really matter. It is still a bad example. Signed-off-by:
Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by:
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Andi Kleen authored
HSW-EP has a larger offcore mask than the client Haswell CPUs. It is the same mask as on Sandy/IvyBridge-EP. All of Haswell was using the client mask, so some bits were missing. On the client parts some bits were also missing compared to Sandy/IvyBridge, in particular the bits to match on a L4 cache hit. The Haswell core in both client and server incarnations accepts the same bits (but some are nops), so we can use the same mask. So use the snbep extended mask, which is a superset of the client and the server, for all of Haswell. This allows specifying a number of extra offcore events, like for example for HSW-EP. % perf stat -e cpu/event=0xb7,umask=0x1,offcore_rsp=0x3fffc00100,name=offcore_response_pf_l3_rfo_l3_miss_any_response/ true which were <not supported> before. Signed-off-by:
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Fengguang Wu authored
arch/x86/kernel/cpu/perf_event_intel_uncore_nhmex.c:961:2-3: Unneeded semicolon arch/x86/kernel/cpu/perf_event_intel_uncore_nhmex.c:1100:2-3: Unneeded semicolon arch/x86/kernel/cpu/perf_event_intel_uncore_nhmex.c:1138:2-3: Unneeded semicolon Remove unneeded semicolon. Generated by: scripts/coccinelle/misc/semicolon.cocci Signed-off-by:
Fengguang Wu <fengguang.wu@intel.com> Signed-off-by:
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Yan, Zheng authored
Signed-off-by:
Yan, Zheng <zheng.z.yan@intel.com> Signed-off-by:
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Yan, Zheng authored
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Yan, Zheng authored
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Yan, Zheng authored
Prepare for moving hardware specific code to seperate files. Signed-off-by:
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Jiri Olsa authored
In cases when the owner task exits before the workload and the workload made some forks, all the events stay in until the last workload process exits. Thats' because each child event holds parent reference. We want to release all children events once the parent is gone, because at that time there's no process to read them anyway, so they're just eating resources. This removal races with process exit, which removes all events and fork, which clone events. To be clear of those two, adding work queue to remove orphaned child for context in case such event is detected. Using delayed work queue (with delay == 1), because we queue this work under perf scheduler callbacks. Normal work queue tries to wake up the queue process, which deadlocks on rq->lock in this place. Also preventing clones from abandoned parent event. Signed-off-by:
Jiri Olsa <jolsa@kernel.org> Signed-off-by:
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Jiri Olsa authored
Adding fake EVENT_OWNER_KERNEL owner pointer value for kernel perf events, so we could distinguish it from user events, which needs special care in following patch. Signed-off-by:
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Peter Zijlstra authored
The model number descriptions got a bit messy, clean them up. Signed-off-by:
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Ingo Molnar authored
Merge tag 'perf-core-for-mingo' of git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux into perf/core Pull perf/core improvements and fixes from Arnaldo Carvalho de Melo: User visible fixes and changes: * Show better error message in case we fail to open counters due to EBUSY error, for instance, when oprofile is running. (Jiri Olsa) * Honour -w in the report tools (report, top), allowing to specify the widths for the histogram entries columns. (Namhyung Kim) * Don't run workload if not told to, as happens when the user has no permission for profiling and even then the specified workload ends up running (Arnaldo Carvalho de Melo) * Do not ignore mmap events in 'perf kmem report'. This tool was using the kernel mmaps in the running machine instead of processing the mmap records from the perf.data file. (Namhyung Kim) * Properly show submicrosecond times in 'perf kvm stat' (Christian Borntraeger) * Honour existing 'perf record' --time/-T command line option (Andi Kleen) * Make sure --symfs usage includes the path separator (Arnaldo Carvalho de Melo) Development infrastructure fixes and changes: * Fix arm64 build error (Mark Salter) * Fix make PYTHON override (Namhyung Kim) * Rename ordered_samples to ordered_events and allow setting a queue size for ordering events (Jiri Olsa) * Default to python version 2 (Thomas Ilsche) Signed-off-by:
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- 12 Aug, 2014 21 commits
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Thomas Ilsche authored
According to PEP 394 recommendation [1], it's more portable to use python2 rather than plain python to refer python binary version 2. Since there're distros using python3 by default like Arch, and we don't support python3 (yet), it'd be better using python2 explicitly. But older versions (prior to 2.7) seem not to provide python2 but just python. Given that it's only old version, try python2 first and then fallback to python. It'll ensure that it always points to python 2.x. I tested (compiles and perf script runs) with the combinations: 1) python -> python2.x, python-config -> python2.x-config python2 N/A, python2-config N/A 2) python -> python3.x, python-config -> python3.x-config python2 -> python2.x, python2-config -> python2.x-config 3) python -> python2.x, python-config -> python2.x-config python2 -> python2.x, python2-config -> python2.x-config 4) python -> python2.x, python-config -> python2.x-config python2 -> python2.x, python2-config N/A Based on / replaces the patch 2/2 by Namhyung Kim. [1] https://www.python.org/dev/peps/pep-0394Based-on-patch-by:
Namhyung Kim <namhyung@kernel.org> Signed-off-by:
Thomas Ilsche <thomas.ilsche@tu-dresden.de> Cc: Ingo Molnar <mingo@kernel.org> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Paul Mackerras <paulus@samba.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/r/53DF8493.6070206@tu-dresden.deSigned-off-by:
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Jiri Olsa authored
We were using PERF_COUNT_SW_CPU_CLOCK as an probing event type. Using expected PERF_TYPE_SOFTWARE type instead. Signed-off-by:
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Namhyung Kim authored
If user sets ui.show-headers config option to false, it didn't calculate default column width so it broke the alignment. This is because it does the calculation just before showing headers. Move it to the beginning of the hist browser so that it can be called regardless of the config option. Reported-by:
Jiri Olsa <jolsa@redhat.com> Signed-off-by:
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Namhyung Kim authored
It makes the code a bit simpler and easier to debug IMHO. I guess it can also remove similar code in perf diff, but let's keep it for a future work. :) Signed-off-by:
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Namhyung Kim authored
Add -w/--column-widths option like perf report does so that users are able to see symbols even with some very long C++ library/functions. It can be a list separated by comma for each column. $ perf top -w 0,20,30 The value of 0 means there's no limit. Signed-off-by:
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Namhyung Kim authored
Set column width and do not change it if user gives -w/--column-widths option. It'll truncate longer symbols than the width if exists. Signed-off-by:
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Namhyung Kim authored
Save column length in the hpp format and pass it to print functions. This is a preparation for users to control column width in the output. Signed-off-by:
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Namhyung Kim authored
So that it can properly handle alignment requirements later. To do that, add percent_color_len_snprintf() fucntion to help coloring of overhead columns. Signed-off-by:
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Namhyung Kim authored
Now perf left-aligns column headers but the contents does not. It should have same alignment. This requires a change in pid sort key - it consists of two part (pid and comm). As length of comm can be vary it'd be better to change the order of them. Thanks to Jiri Olsa for pointing this out. Signed-off-by:
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Namhyung Kim authored
Thomas reported that make PYTHON=python2 is not work on some systems. I can reproduce it on my ArchLinux box too. This is because it's overridden by config/feature-checks/Makefile regardless of PYTHON setting. I guess it's a bug slipped into during the feature checking change. Actually, we don't need to check python-config in the feature-checks. We can just pass appropriate FEATURE_CHECK_*FLAGS. Reported-by:
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Namhyung Kim authored
The perf kmem command didn't process mmap events for some unknown reason and it instead gets symbol info from a running kernel. This is problematic if perf kmem record was run on a different kernel. This patch adds the mmap event handlers and reverts the commit e727ca73 ("perf kmem: Resolve kernel symbols again"). Signed-off-by:
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Jiri Olsa authored
Showing better error message in case we fail to open counters due to the EBUSY error. If we detect oprofile daemon process running, we now display following message for EBUSY error: $ perf record ls Error: The PMU counters are busy/taken by another profiler. We found oprofile daemon running, please stop it and try again. In case oprofiled was not detected the current error message stays: $ perf record ls Error: The sys_perf_event_open() syscall returned with 16 (Device or resource busy) for event (cycles). /bin/dmesg may provide additional information. No CONFIG_PERF_EVENTS=y kernel support configured? Also changing PERF_FLAG_FD_CLOEXEC detection code not to display error in case of EBUSY error, as it currently does: $ perf record ls Error: perf_event_open(..., PERF_FLAG_FD_CLOEXEC) failed with unexpected error 16 (Device or resource busy) perf_event_open(..., 0) failed unexpectedly with error 16 (Device or resource busy) The PMU counters are busy/taken by another profiler. We found oprofile daemon running, please stop it and try again. Signed-off-by:
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Jiri Olsa authored
In forced flush (OE_FLUSH__HALF) we break the rules of the flush timestamp via PERF_RECORD_FINISHED_ROUND event, so we could get out of order event. Do not force error in this case plus changing the output warning to use WARN_ONCE. Signed-off-by:
David Ahern <dsahern@gmail.com> Cc: Corey Ashford <cjashfor@linux.vnet.ibm.com> Cc: David Ahern <dsahern@gmail.com> Cc: Frederic Weisbecker <fweisbec@gmail.com> Cc: Ingo Molnar <mingo@kernel.org> Cc: Jean Pihet <jean.pihet@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Paul Mackerras <paulus@samba.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/n/tip-8q8794a8nlmpd1u8xrqmcyd2@git.kernel.orgSigned-off-by:
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Jiri Olsa authored
Adding some prints for ordered events queue, to help debug issues. Adding debug_ordered_events debug variable to be able to enable ordered events debug messages using: $ perf --debug ordered-events=2 report ... Also using oe pointer in perf_session__queue_event instead of chained session variable dereferencing. Signed-off-by:
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Jiri Olsa authored
Adding report.queue-size config file option to setup the maximum allocation size for session's struct ordered_events object. Signed-off-by:
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Jiri Olsa authored
Adding perf_config_u64 function to be able to parse 'llong' values out of config file. Signed-off-by:
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Jiri Olsa authored
Adding ordered_events__free function to release all the struct ordered_events data. It's replacement for former perf_session_free_sample_buffers function. Signed-off-by:
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Jiri Olsa authored
Adding ordered_events__init function for struct ordered_events struct initialization. Signed-off-by:
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Jiri Olsa authored
As Namhyung pointed out we can use list_move in ordered_events_delete. Signed-off-by:
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Jiri Olsa authored
Move ordered events code into separated object ordered-events.[ch]. No functional change was intended. Signed-off-by:
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Jiri Olsa authored
Making perf_session__deliver_event global function, as it will be called from another object in following patch. Signed-off-by:
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