- 19 Apr, 2022 4 commits
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Konrad Dybcio authored
Model and compatible are set per-device, so having them in the SoC DTSI is superfluous. Remove them. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220415115633.575010-3-konrad.dybcio@somainline.org
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Konrad Dybcio authored
SONY phones/tables are based on a common board ('platform'). Devices based on the same are often close to identical. Mention their association in filenames, like it's done in arm64 DTs. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220415115633.575010-2-konrad.dybcio@somainline.org
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Krzysztof Kozlowski authored
The clock controller of RPMH RSC does not have 'reg' property, so should not have unit address. Fixes: bae2f597 ("ARM: dts: qcom: Add SDX65 platform and MTP board support") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220411085935.130072-2-krzysztof.kozlowski@linaro.org
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Krzysztof Kozlowski authored
Align BCM voter node with DT schema by using hyphen instead of underscore. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220411085935.130072-1-krzysztof.kozlowski@linaro.org
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- 13 Apr, 2022 22 commits
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Rohit Agarwal authored
Add TCSR Mutex node to support Qualcomm Hardware Mutex block on SDX65 platform. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1649670615-21268-7-git-send-email-quic_rohiagar@quicinc.com
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Rohit Agarwal authored
Add a node for the ARM SMMU found in the SDX65. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1649670615-21268-6-git-send-email-quic_rohiagar@quicinc.com
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Rohit Agarwal authored
Add devicetree support for SDHCI controller found in Qualcomm SDX65 platform. The SDHCI controller is based on the MSM SDHCI v5 IP. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1649670615-21268-4-git-send-email-quic_rohiagar@quicinc.com
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Rohit Agarwal authored
Add reserved memory nodes to the SDX65 dtsi as defined by the memory map. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1649670615-21268-2-git-send-email-quic_rohiagar@quicinc.com
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Krzysztof Kozlowski authored
Align RPM requests node with DT schema by using hyphen instead of underscore. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> [bjorn: Fixed up qcom-{apq8074,msm8974}-*.dts to match the qcom-msm8974.dtsi] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220401201035.189106-8-krzysztof.kozlowski@linaro.org
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Krzysztof Kozlowski authored
The GPIO keys are not part of SoC and they should be defined inside of the root node. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220401201035.189106-6-krzysztof.kozlowski@linaro.org
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Krzysztof Kozlowski authored
The GPIO keys are not part of SoC and they should be defined inside of the root node. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220401201035.189106-5-krzysztof.kozlowski@linaro.org
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Rohit Agarwal authored
Add the regulators found on SDX65 MTP. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1647411447-25249-7-git-send-email-quic_rohiagar@quicinc.com
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Rohit Agarwal authored
Add rpmpd node and opps for this node to the SDX65 dts. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1647411447-25249-5-git-send-email-quic_rohiagar@quicinc.com
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Rohit Agarwal authored
SDX65-mtp features PMX65 pmic, so include the dts as well. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1647411447-25249-4-git-send-email-quic_rohiagar@quicinc.com
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Rohit Agarwal authored
Add DTS for PMIC PMX65 found in Qualcomm platforms. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1647411447-25249-6-git-send-email-quic_rohiagar@quicinc.com
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Rohit Agarwal authored
SDX65-mtp features PMK8350b and PM8150B pmic, so include the dts as well Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1647411447-25249-3-git-send-email-quic_rohiagar@quicinc.com
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Rohit Agarwal authored
Add SPMI node to SDX65 dtsi. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1647411447-25249-2-git-send-email-quic_rohiagar@quicinc.com
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Ansuel Smith authored
Add syscon compatible required for tsens driver to correctly probe driver and access the reg. Also add cxo and pxo tag and declare them as gcc clock now requires them for the ipq8064 gcc driver that has now been modernized. Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220226135235.10051-16-ansuelsmth@gmail.com
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Luca Weiss authored
Add support for this smartwatch, based on Snapdragon 400 SoC. Currently supported functionality: * Internal storage * USB * Charger * Power button * Vibration motor * Bluetooth * Wifi Signed-off-by: Luca Weiss <luca@z3ntu.xyz> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220226101939.1011551-2-luca@z3ntu.xyz
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Luca Weiss authored
Document the ASUS ZenWatch 2 ("sparrow") which is a smartwatch based on Snapdragon 400 SoC. Signed-off-by: Luca Weiss <luca@z3ntu.xyz> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220226101939.1011551-1-luca@z3ntu.xyz
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Dmitry Baryshkov authored
The number of interrupt cells for the mdss interrupt controller is 1, meaning there should only be one cell for the interrupt number, not two. Drop the second cell containing (unused) irq flags. Fixes: 5a9fc531 ("ARM: dts: msm8974: add display support") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220302225411.2456001-6-dmitry.baryshkov@linaro.org
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Rohit Agarwal authored
The APCS block on SDX65 acts as a mailbox controller and also provides clock output for the Cortex A7 CPU. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1645505785-2271-5-git-send-email-quic_rohiagar@quicinc.com
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Rohit Agarwal authored
On SDX65 there is a separate A7 PLL which is used to provide high frequency clock to the Cortex A7 CPU via a MUX. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1645505785-2271-4-git-send-email-quic_rohiagar@quicinc.com
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Rayyan Ansari authored
Add a node for the voltage ADC (VADC) found in PM8226. Signed-off-by: Rayyan Ansari <rayyan@ansari.sh> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220209163841.7360-1-rayyan@ansari.sh
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Kuldeep Singh authored
Qcom BAM DT spec expects generic DMA controller node name as "dma-controller" to enable validations. Signed-off-by: Kuldeep Singh <singh.kuldeep87k@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220410175056.79330-6-singh.kuldeep87k@gmail.com
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Kuldeep Singh authored
Qcom BAM DT spec expects generic DMA controller node name as "dma-controller" to enable validations. Signed-off-by: Kuldeep Singh <singh.kuldeep87k@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220410175056.79330-5-singh.kuldeep87k@gmail.com
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- 12 Apr, 2022 8 commits
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Kuldeep Singh authored
Qcom BAM DT spec expects generic DMA controller node name as "dma-controller" to enable validations. Signed-off-by: Kuldeep Singh <singh.kuldeep87k@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220410175056.79330-2-singh.kuldeep87k@gmail.com
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Kuldeep Singh authored
Qcom BAM DT spec expects generic DMA controller node name as "dma-controller" to enable validations. Signed-off-by: Kuldeep Singh <singh.kuldeep87k@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220410175056.79330-3-singh.kuldeep87k@gmail.com
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Jack Matthews authored
Add a node for PM8226's real time clock. Signed-off-by: Jack Matthews <jm5112356@gmail.com> Reviewed-by: Luca Weiss <luca@z3ntu.xyz> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220209165742.652890-1-jm5112356@gmail.com
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Krzysztof Kozlowski authored
The GSBI8 child node (I2C controller) is disabled, so as parent GSBI node should be the same. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220405063451.12011-6-krzysztof.kozlowski@linaro.org
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Krzysztof Kozlowski authored
The DT schema expects clocks core-iface order. No functional change. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220405063451.12011-5-krzysztof.kozlowski@linaro.org
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Krzysztof Kozlowski authored
The DT schema expects dma channels in tx-rx order. No functional change. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220405063451.12011-4-krzysztof.kozlowski@linaro.org
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Krzysztof Kozlowski authored
The "bluetooth" is more popular and more descriptive than "bt", for a Bluetooth device. The WCNSS DT schema will expect such naming. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220405065752.27389-1-krzysztof.kozlowski@linaro.org
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Krzysztof Kozlowski authored
The node names should be generic and SPI NOR dtschema expects "flash". Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220407143112.294930-1-krzysztof.kozlowski@linaro.org
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- 03 Apr, 2022 6 commits
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Linus Torvalds authored
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git://git.kernel.org/pub/scm/linux/kernel/git/rostedt/linux-traceLinus Torvalds authored
Pull more tracing updates from Steven Rostedt: - Rename the staging files to give them some meaning. Just stage1,stag2,etc, does not show what they are for - Check for NULL from allocation in bootconfig - Hold event mutex for dyn_event call in user events - Mark user events to broken (to work on the API) - Remove eBPF updates from user events - Remove user events from uapi header to keep it from being installed. - Move ftrace_graph_is_dead() into inline as it is called from hot paths and also convert it into a static branch. * tag 'trace-v5.18-2' of git://git.kernel.org/pub/scm/linux/kernel/git/rostedt/linux-trace: tracing: Move user_events.h temporarily out of include/uapi ftrace: Make ftrace_graph_is_dead() a static branch tracing: Set user_events to BROKEN tracing/user_events: Remove eBPF interfaces tracing/user_events: Hold event_mutex during dyn_event_add proc: bootconfig: Add null pointer check tracing: Rename the staging files for trace_events
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git://git.kernel.org/pub/scm/linux/kernel/git/clk/linuxLinus Torvalds authored
Pull clk fix from Stephen Boyd: "A single revert to fix a boot regression seen when clk_put() started dropping rate range requests. It's best to keep various systems booting so we'll kick this out and try again next time" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: Revert "clk: Drop the rate range on clk_put()"
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git://git.kernel.org/pub/scm/linux/kernel/git/tip/tipLinus Torvalds authored
Pull x86 fixes from Thomas Gleixner: "A set of x86 fixes and updates: - Make the prctl() for enabling dynamic XSTATE components correct so it adds the newly requested feature to the permission bitmap instead of overwriting it. Add a selftest which validates that. - Unroll string MMIO for encrypted SEV guests as the hypervisor cannot emulate it. - Handle supervisor states correctly in the FPU/XSTATE code so it takes the feature set of the fpstate buffer into account. The feature sets can differ between host and guest buffers. Guest buffers do not contain supervisor states. So far this was not an issue, but with enabling PASID it needs to be handled in the buffer offset calculation and in the permission bitmaps. - Avoid a gazillion of repeated CPUID invocations in by caching the values early in the FPU/XSTATE code. - Enable CONFIG_WERROR in x86 defconfig. - Make the X86 defconfigs more useful by adapting them to Y2022 reality" * tag 'x86-urgent-2022-04-03' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/fpu/xstate: Consolidate size calculations x86/fpu/xstate: Handle supervisor states in XSTATE permissions x86/fpu/xsave: Handle compacted offsets correctly with supervisor states x86/fpu: Cache xfeature flags from CPUID x86/fpu/xsave: Initialize offset/size cache early x86/fpu: Remove unused supervisor only offsets x86/fpu: Remove redundant XCOMP_BV initialization x86/sev: Unroll string mmio with CC_ATTR_GUEST_UNROLL_STRING_IO x86/config: Make the x86 defconfigs a bit more usable x86/defconfig: Enable WERROR selftests/x86/amx: Update the ARCH_REQ_XCOMP_PERM test x86/fpu/xstate: Fix the ARCH_REQ_XCOMP_PERM implementation
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git://git.kernel.org/pub/scm/linux/kernel/git/tip/tipLinus Torvalds authored
Pull RT signal fix from Thomas Gleixner: "Revert the RT related signal changes. They need to be reworked and generalized" * tag 'core-urgent-2022-04-03' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: Revert "signal, x86: Delay calling signals in atomic on RT enabled kernels"
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git://git.infradead.org/users/hch/dma-mappingLinus Torvalds authored
Pull more dma-mapping updates from Christoph Hellwig: - fix a regression in dma remap handling vs AMD memory encryption (me) - finally kill off the legacy PCI DMA API (Christophe JAILLET) * tag 'dma-mapping-5.18-1' of git://git.infradead.org/users/hch/dma-mapping: dma-mapping: move pgprot_decrypted out of dma_pgprot PCI/doc: cleanup references to the legacy PCI DMA API PCI: Remove the deprecated "pci-dma-compat.h" API
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